VISHAY IRFL9014 Power Mosfet Instruction Manual

June 1, 2024
VISHAY

VISHAY IRFL9014 Power Mosfet Instruction Manual
VISHAY IRFL9014 Power Mosfet Instruction Manual

Power MOSFET

FEATURES

  • Surface-mount
  • Available in tape and reel
  • Dynamic dV/dt rating
  • Repetitive avalanche rated
  • P-channel
  • Fast switching
  • Ease of paralleling
  • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

DESCRIPTION
Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance, and cost-effectiveness.
The SOT-223 package is designed for surface-mounting using vapor phase, infrared, or wave soldering techniques. Its unique package design allows for easy automatic pick-and-place as with other SOT or SOIC packages but has the added advantage of improved thermal performance due to an enlarged tab for heatsinking. Power dissipation of greater than 1.25 W is possible in a typical surface mount application.

PRODUCT SUMMARY|
---|---
VDS (V)| -60|
RDS(on) (W)| VGS = -10 V| 0.50|
Qg (Max.) (nC)| 12|
Qgs (nC)| 3.8|
Qgd (nC)| 5.1|
Configuration| Single|
ORDERING INFORMATION
Package| SOT-223
Lead (Pb)-free and halogen-free| SiHFL9014TR-GE3
IRFL9014TRPbF-BE3 a, b
Lead (Pb)-free| IRFL9014TRPbF a

Notes
a. See device orientation
b. “-BE3” denotes alternate manufacturing location

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| LIMIT| UNIT
Drain-source voltage| VDS| -60| V
Gate-source voltage| VGS| ± 20
Continuous drain current| VGS at -10 V| TC = 25 °C| ID| -1.8| A
TC = 100 °C| -1.1
Pulsed drain current a| IDM| -14
Linear derating factor| | 0.025| W/°C
Linear derating factor (PCB mount) e| 0.017
Single pulse avalanche energy b| EAS| 140| mJ
Avalanche current a| IAR| -1.8| A
Repetitive avalanche energy a| EAR| 0.31| mJ
Maximum power dissipation| TC = 25 °C| PD| 3.1| W
Maximum power dissipation (PCB mount) e| TA = 25 °C| 2.0
Peak diode recovery dv/dt c| dV/dt| -4.5| V/ns
Operating junction and storage temperature range| TJ, Tstg| -55 to +150| °C
Soldering recommendations (peak temperature) d| For 10 s| | 300

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = – 25 V, starting TJ = 25 °C, L = 50 mH, Rg = 25 , IAS = – 1.8 A (see fig. 12)
c. ISD  – 6.7 A, dI/dt  90 A/μs, VDD  VDS, TJ  150 °C
d. 1.6 mm from case
e. When mounted on 1″ square PCB (FR-4 or G-10 material)

THERMAL RESISTANCE RATINGS

PARAMETER| SYMBOL| TYP.| MAX.| UNIT
Maximum junction-to-ambient (PCB mount) a| RthJA| –| 60| °C/W
Maximum junction-to-case (drain)| RthJC| –| 40

Note
a. When mounted on 1″ square PCB (FR-4 or G-10 material)

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| TEST CONDITIONS| MIN.| TYP.| MAX.| UNIT
Static
Drain-source breakdown voltage| VDS| VGS = 0 V, ID = 250 μA| -60| –| –| V
VDS temperature coefficient| DVDS/TJ| Reference to 25 °C, ID = 1 mA| –| -0.059| –| V/°C
Gate-source threshold voltage| VGS(th)| VDS = VGS, ID = 250 μA| -2.0| –| -4.0| V
Gate-source leakage| IGSS| VGS = ± 20 V| –| –| ± 100| nA
Zero gate voltage drain current| IDSS| VDS = -60 V, VGS = 0 V| –| –| – 100| μA
VDS = -48 V, VGS = 0 V, TJ = 125 °C| –| –| -500
Drain-source on-state resistance| RDS(on)| VGS = -10 V| ID = 1.1 A b| –| –| 0.50| W
Forward transconductance| gfs| VDS = – 25 V, ID = 1.1 A b| 1.3| –| –| S
Dynamic
Input capacitance| Ciss| VGS = 0 V, VDS = 25 V,f = 1.0 MHz, see fig. 5| –| 270| –| pF
Output capacitance| Coss| –| 170| –
Reverse transfer capacitance| Crss| –| 31| –
Total gate charge| Qg| VGS = – 10 V| ID = – 6.7 A, VDS = – 48 V,see fig. 6 and 13 b| –| –| 12| nC
Gate-source charge| Qgs| –| –| 3.8
Gate-drain charge| Qgd| –| –| 5.1
Turn-on delay time| td(on)| VDD = – 30 V, ID = – 6.7 A,Rg = 24 W, RD = 4.0 W, see fig. 10 b| –| 11| –|

ns

Rise time| tr| –| 63| –
Turn-off delay time| td(off)| –| 9.6| –
Fall time| tf| –| 31| –
Internal drain inductance| LD| Between lead,6 mm (0.25″) from package and center of die contact
|

G

| D

S

| | –| 4.0| –| nH
Internal source inductance| LS| –| 6.0| –
Drain-Source Body Diode Characteristics
Continuous source-drain diode current| IS| MOSFET symbol showing the integral reversep – n junction diode
|

G

| |

D

S

| –| –| – 1.8| A
Pulsed diode forward current a| ISM| –| –| – 14
Body diode voltage| VSD| TJ = 25 °C, IS = – 1.8 A, VGS = 0 V b| –| –| – 5.5| V
Body diode reverse recovery time| trr| TJ = 25 °C, IF = – 6.7 A, dI/dt = 100 A/μs b| –| 80| 160| ns
Body diode reverse recovery charge| Qrr| –| 0.096| 0.19| μC
Forward turn-on time| ton| Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width  300 μs; duty cycle  2 % TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
**Fig. 1 – Typical Output Characteristics, TC = 25 °C

D, Drain Current (A)
VDS, Drain-to-Source Voltage (V)
Fig. 2 – Typical Output Characteristics, TC = 150 °C

– ID, Drain Current (A)
– VDS, Drain-to-Source Voltage (V)
Fig. 3 – Typical Transfer Characteristics

– ID, Drain Current (A)
– VGS, Gate-to-Source Voltage (V)
Fig. 4 – Normalized On-Resistance vs. Temperature

RDS(on), Drain-to-Source On Resistance (Normalized)
TJ, Junction Temperature (°C)
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage

Capacitance (pF)
– VDS, Drain-to-Source Voltage (V)
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage

– VGS, Gate-to-Source Voltage (V)
QG, Total Gate Charge (nC)
Fig. 7 – Typical Source-Drain Diode Forward Voltage
Dimension Instruction
– ISD, Reverse Drain Current (A)
– VSD, Source-to-Drain Voltage (V)
Fig. 8 – Maximum Safe Operating Area
Dimension Instruction
D, Drain Current (A)
– VDS, Drain-to-Source Voltage (V)
Fig. 9 – Maximum Drain Current vs. Case Temperature

D, Drain Current (A)
TC, Case Temperature (°C)
Fig. 10a – Switching Time Test Circuit
Dimension Instruction
Fig. 10b – Switching Time Waveform
Dimension Instruction
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case
Dimension Instruction
hermal Response (ZthJC)
t1, Rectangular Pulse Duration (s)
Fig. 12a – Unclamped Inductive Test Circuit
Dimension Instruction
Fig. 12b – Unclamped Inductive Waveforms
Dimension Instruction
Fig. 12c – Maximum Avalanche Energy vs. Drain Current

EAS, Single Pulse Energy (mJ)
Starting TJ, Junction Temperature (°C)
Fig. 13a – Basic Gate Charge Waveform
Dimension Instruction
Fig. 13b – Gate Charge Test Circuit

Fig. 14 – For P-Channel
Dimension Instruction
Note
Compliment N-Channel of D.U.T. for driver
Dimension Instruction
**Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and  reliability data, seewww.vishay.com/ppg?91195.

**SOT-223 (HIGH VOLTAGE)

**

| MILLIMETERS| INCHES
---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.
A| 1.55| 1.80| 0.061| 0.071
B| 0.65| 0.85| 0.026| 0.033
B1| 2.95| 3.15| 0.116| 0.124
C| 0.25| 0.35| 0.010| 0.014
D| 6.30| 6.70| 0.248| 0.264
E| 3.30| 3.70| 0.130| 0.146
e| 2.30 BSC| 0.0905 BSC
e1| 4.60 BSC| 0.181 BSC
H| 6.71| 7.29| 0.264| 0.287
L| 0.91| –| 0.036| –
L1| 0.061 BSC| 0.0024 BSC
q| –| 10′| –| 10′
ECN: S-82109-Rev. A, 15-Sep-08 DWG: 5969

Notes

  1. Dimensioning and tolerancing per ASME Y14.5M-1994.
  2. Dimensions are shown in millimeters (inches).
  3. Dimension do not include mold flash.
  4. Outline conforms to JEDEC outline TO-261AA.

Disclaimer

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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References

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