VISHAY IRF840AS Power MOSFET Owner’s Manual

VISHAY IRF840AS Power MOSFET

Specifications:

• Product Name: IRF840AS, SiHF840AS, IRF840AL, SiHF840AL
• Manufacturer: Vishay Siliconix
• Power MOSFET
• Package: I2PAK (TO-262), D2PAK (TO-263)
• N-Channel MOSFET
• Drain-Source Voltage (VDS): 500V
• On-State Resistance (RDS(on)): 38Ω (VGS = 10V)
• Total Gate Charge (Qg max.): 9.0nC

Features
For detailed features, please refer to www.vishay.com/doc?99912

Applications
Typical applications include SMPS topologies.

Ordering Information
For ordering information, refer to the provided package codes.|

Thermal Resistance Ratings

• Maximum Junction-to-Ambient: 40°C/W
• Maximum Junction-to-Case: 1.0°C/W

Parameter Tests
Refer to the provided parameter symbols for specific test conditions and values.

FAQ

• What are the typical applications of these MOSFETs?
  The typical applications include SMPS topologies.

• Are these MOSFETs RoHS-compliant?
  The datasheet provides information about parts that are RoHS-compliant and non RoHS-compliant. Parts with lead (Pb) terminations are not RoHS-compliant.

• Where can I find detailed features of the product?
  You can find detailed features atwww.vishay.com/doc?99912.

IRF840AS, SiHF840AS, IRF840AL, SiHF840AL

PRODUCT SUMMARY

VDS (V)| 500
RDS(on) (Ù)| VGS = 10 V| 0.85
Qg max. (nC)| 38
Qgs (nC)| 9.0
Qgd (nC)| 18
Configuration| Single

Power MOSFET

FEATURES

• Low gate charge Qg results in simple drive requirement
• Improved gate, avalanche, and dynamic dV/dt ruggedness
• Fully characterized capacitance and avalanche voltage and current
• Effective Coss specified
• Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

Note

• This datasheet provides information about parts that are
  RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information/tables in this datasheet for details

APPLICATIONS

• Switch mode power supply (SMPS)
• Uninterruptible power supply
  High speed power switching

TYPICAL SMPS TOPOLOGIES

• Two transistor forward
• Half bridge
• Full bridge

ORDERING INFORMATION

Package| D2PAK (TO-263)| D2PAK (TO-263)| D2PAK (TO-263)| I2PAK (TO-262)
Lead (Pb)-free and Halogen-free| SiHF840AS-GE3| SiHF840ASTRL-GE3 a| SiHF840ASTRR-GE3 a| SiHF840AL-GE3 a
Lead (Pb)-free| IRF840ASPbF| IRF840ASTRLPbF a| IRF840ASTRRPbF a| IRF840ALPbF

Note
See device orientation

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| LIMIT| UNIT
Drain-Source Voltage| VDS| 500| V
Gate-Source Voltage| VGS| ± 30
Continuous Drain Current| VGS at 10 V| TC = 25 °C| ID| 8.0|

A

TC = 100 °C| 5.1
Pulsed Drain Current a| IDM| 32
Linear Derating Factor| | 1.0| W/°C
Single Pulse Avalanche Energy b| EAS| 510| mJ
Repetitive Avalanche Current a| IAR| 8.0| A
Repetitive Avalanche Energy a| EAR| 13| mJ
Maximum Power Dissipation| TC = 25 °C| PD| 125| W
TA = 25 °C| 3.1
Peak Diode Recovery dV/dt c, e| dV/dt| 5.0| V/ns
Operating Junction and Storage Temperature Range| TJ, Tstg| -55 to +150| °C
Soldering Temperature d| for 10 s| | 300

Notes

• Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
• Starting TJ = 25 °C, L = 16 mH, Rg = 25 Ω, IAS = 8.0 A (see fig. 12)
• ISD ≤ 8.0 A, dI/dt ≤ 100 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
• 1.6 mm from case
• Uses IRF840A, SiH840A data and test conditions

THERMAL RESISTANCE RATINGS

PARAMETER| SYMBOL| MIN.| TYP.| MAX.| UNIT
Maximum Junction-to-Ambient (PCB mount)a| RthJA| –| –| 40|

°C/W

Maximum Junction-to-Case (Drain)| RthJC| –| –| 1.0

Note
When mounted on 1″ square PCB (FR-4 or G-10 material)

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| TEST CONDITIONS| MIN.| TYP.| MAX.| UNIT
Static
Drain-Source Breakdown Voltage| VDS| VGS = 0, ID = 250 μA| 500| –| –| V
VDS Temperature Coefficient| ÄVDS/TJ| Reference to 25 °C, ID = 1 mA d| –| 0.58| –| V/°C
Gate-Source Threshold Voltage| VGS(th)| VDS = VGS, ID = 250 μA| 2.0| –| 4.0| V
Gate-Source Leakage| IGSS| VGS = ± 30 V| –| –| ± 100| nA
Zero Gate Voltage Drain Current| IDSS| VDS = 500 V, VGS = 0 V| –| –| 25| μA
VDS = 400 V, VGS = 0 V, TJ = 125 °C| –| –| 250
Drain-Source On-State Resistance| RDS(on)| VGS = 10 V| ID = 4.8 A b| –| –| 0.85| Ù
Forward Transconductance| gfs| VDS = 50 V, ID = 4.8 A| 3.7| –| –| S
Dynamic
Input Capacitance| Ciss| VGS = 0 V, VDS = 25 V,

f = 1.0 MHz, see fig. 5

| –| 1018| –|

pF

Output Capacitance| Coss| –| 155| –
Reverse Transfer Capacitance| Crss| –| 8.0| –
Output Capacitance| Coss|

VGS = 0 V

| VDS = 1.0 V, f = 1.0 MHz| | 1490|
Output Capacitance| Coss| VDS = 400 V, f = 1.0 MHz| | 42|
Effective Output Capacitance| Coss eff.| VDS = 0 V to 480 V c, d| | 56|
Total Gate Charge| Qg|

VGS = 10 V

|

ID = 8.0 A, VDS = 400 V,

see fig. 6 and 13 b, d

| –| –| 38|

nC

Gate-Source Charge| Qgs| –| –| 9.0
Gate-Drain Charge| Qgd| –| –| 18
Turn-On Delay Time| td(on)|

VDD = 250 V, ID = 8.0 A,

Rg = 9.1 Ù, RD = 31 Ù, see fig. 10 b, d

| –| 11| –|

ns

Rise Time| tr| –| 23| –
Turn-Off Delay Time| td(off)| –| 26| –
Fall Time| tf| –| 19| –
Gate Input Resistance| Rg| f = 1 MHz, open drain| 0.7| –| 3.7| Ù
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current| IS| MOSFET symbol     D showing the

integral reverse G

p – n junction diode      S

| –| –| 8.0|

A

Pulsed Diode Forward Current a| ISM| –| –| 32
Body Diode Voltage| VSD| TJ = 25 °C, IS = 8.0 A, VGS = 0 V b| –| –| 2.0| V
Body Diode Reverse Recovery Time| trr| TJ = 25 °C, IF = 8.0 A, dI/dt = 100 A/μs b| –| 422| 633| ns
Body Diode Reverse Recovery Charge| Qrr| –| 2.0| 3.0| μC
Forward Turn-On Time| ton| Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes

1. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
2. Pulse width £ 300 μs; duty cycle £ 2 %
3. Coss is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 %to 80 % VDS
4. Uses IRF840A, SiHF840A data and test conditions

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

TO-263AB (HIGH VOLTAGE)

| MILLIMETERS| INCHES| | | MILLIMETERS| INCHES
---|---|---|---|---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.| DIM.| MIN.| MAX.| MIN.| MAX.
A| 4.06| 4.83| 0.160| 0.190| D1| 6.86| –| 0.270| –
A1| 0.00| 0.25| 0.000| 0.010| E| 9.65| 10.67| 0.380| 0.420
b| 0.51| 0.99| 0.020| 0.039| E1| 6.22| –| 0.245| –
b1| 0.51| 0.89| 0.020| 0.035| e| 2.54 BSC| 0.100 BSC
b2| 1.14| 1.78| 0.045| 0.070| H| 14.61| 15.88| 0.575| 0.625
b3| 1.14| 1.73| 0.045| 0.068| L| 1.78| 2.79| 0.070| 0.110
c| 0.38| 0.74| 0.015| 0.029| L1| –| 1.65| –| 0.066
c1| 0.38| 0.58| 0.015| 0.023| L2| –| 1.78| –| 0.070
c2| 1.14| 1.65| 0.045| 0.065| L3| 0.25 BSC| 0.010 BSC
D| 8.38| 9.65| 0.330| 0.380| L4| 4.78| 5.28| 0.188| 0.208
ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970

Notes

1. Dimensioning and tolerancing per ASME 5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and
5. Dimension b1 and c1 apply to base metal
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.

I2PAK (TO-262) (HIGH VOLTAGE)

| MILLIMETERS| INCHES| | | MILLIMETERS| INCHES
---|---|---|---|---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.| DIM.| MIN.| MAX.| MIN.| MAX.
A| 4.06| 4.83| 0.160| 0.190| D| 8.38| 9.65| 0.330| 0.380
A1| 2.03| 3.02| 0.080| 0.119| D1| 6.86| –| 0.270| –
b| 0.51| 0.99| 0.020| 0.039| E| 9.65| 10.67| 0.380| 0.420
b1| 0.51| 0.89| 0.020| 0.035| E1| 6.22| –| 0.245| –
b2| 1.14| 1.78| 0.045| 0.070| e| 2.54 BSC| 0.100 BSC
b3| 1.14| 1.73| 0.045| 0.068| L| 13.46| 14.10| 0.530| 0.555
c| 0.38| 0.74| 0.015| 0.029| L1| –| 1.65| –| 0.065
c1| 0.38| 0.58| 0.015| 0.023| L2| 3.56| 3.71| 0.140| 0.146
c2| 1.14| 1.65| 0.045| 0.065|
ECN: S-82442-Rev. A, 27-Oct-08 DWG: 5977

Notes

1. Dimensioning and tolerancing per ASME 5M-1994.
2. Dimension D and E do not include mold Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost extremes of the plastic body.
3. Thermal pad contour optional within dimension E, L1, D1, and E1.
4. Dimension b1 and c1 apply to base metal

RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead

www.vishay.com

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ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

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References

• Vishay Intertechnology: Passives & Discrete Semiconductors
• IRF840AS, SiHF840AS, IRF840AL, SiHF840AL MOSFETs | Vishay

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