VISHAY IRLD110 Siliconix Siliconix MOSFET Instructions

: June 4, 2024
: VISHAY

Table of Contents

PRODUCT SUMMARY
ORDERING INFORMATION
SPECIFICATIONS
TYPICAL CHARACTERISTICS
Disclaimer
References
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IRLD110
Vishay Siliconix
Power MOSFET
**Instructions

** VISHAY IRLD110 Siliconix Siliconix MOSFET -

PRODUCT SUMMARY

FEATURES

Dynamic dV/dt rating
Repetitive avalanche rated
For automatic insertion
End stackable
Logic-level gate drive
RDS(on) specified at VGS = 4 V and 5 V
175 °C operating temperature
Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

DESCRIPTION
Third-generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance, and cost-effectiveness.
The 4-pin DIP package is a low-cost machine-insertable case style that can be stacked in multiple combinations on standard 0.1″ pin centers. The dual drain serves as a thermal link to the mounting surface for power dissipation levels up to 1 W.

ORDERING INFORMATION

Package	HVMDIP
Lead (Pb)-free	IRLD110PbF

ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| LIMIT| UNIT
Drain-source voltage| VDS| 100| V
Gate-source voltage| VGS| ± 10
Continuous drain current| VGS at 5 V| TA = 25 °C| ID| 1| A
TA = 100 °C| 0.70
Pulsed drain current a| IDM| 8
Linear derating factor| | 0.0083| W/°C
Single pulse avalanche energy b| EAS| 100| mJ
Repetitive avalanche current a| IAR| 1| A
Repetitive avalanche energy a| EAR| 0.13| mJ
Maximum power dissipation| TA = 25 °C| PD| 1.3| W
Peak diode recovery dv/dt c| dV/dt| 5.5| V/ns
Operating junction and storage temperature range| TJ, Tstg| – 55 to + 175| °C
Soldering recommendations (peak temperature) d| For 10 s| | 300d

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = 25 V, starting TJ = 25 °C, L = 6.4 mH, Rg = 25 Ω, IAS = 5.6 A (see fig. 12)
c. ISD ≤ 5.6 A, dI/dt ≤ 75 A/μs, VDD ≤ VDS, TJ ≤ 175 °C
d. 1.6 mm from the case

THERMAL RESISTANCE RATINGS

PARAMETER	SYMBOL	TYP.	MAX.	UNIT
Maximum Junction-to-Ambient	RthJA	–	120	°C/W

SPECIFICATIONS

(TJ = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| TEST CONDITIONS| MIN.| TYP.| MAX.| UNIT
---|---|---|---|---|---|---
Static
Drain-Source Breakdown Voltage| VDS| VGS = 0 V, ID = 250 μA| 100| –| –| V
VDS Temperature Coefficient| DVDS/TJ| Reference to 25 °C, ID = 1 mA| –| 0.12| –| V/°C
Gate-Source Threshold Voltage| VGS(th)| VDS = VGS, ID = 250 μA| 1| –| 2| V
Gate-Source Leakage| IGSS| VGS = ± 10 V| –| –| ± 100| nA
Zero Gate Voltage Drain Current| IDSS| VDS = 100 V, VGS = 0 V| –| –| 25| μA
VDS = 80 V, VGS = 0 V, TJ = 150 °C| –| –| 250
Drain-Source On-State Resistance| RDS(on)| VGS = 5 V| ID = 0.60 Ab| –| –| 0.54| L
VGS = 4 V| ID = 0.50 Ab| –| –| 0.76
Forward Transconductance| gfs| VDS = 50 V, ID = 0.60 Ab| 1.3| –| –| S
Dynamic
Input Capacitance| Ciss| VGS = 0 V, VDS = 25 V, f = 1 MHz, see fig. 5| –| 250| –|

pF

Output Capacitance| Coss| –| 80| –
Reverse Transfer Capacitance| Crss| –| 15| –
Total Gate Charge| Qg| VGS = 5 V| ID = 5.6 A, VDS = 80 V, see fig. 6 and 13b| –| –| 6.1|

nC

Gate-Source Charge| Qgs| –| –| 2.6
Gate-Drain Charge| Qgd| –| –| 3.3
Turn-On Delay Time| td(on)|

VDD = 50 V, ID = 5.6 A,
Rg = 12 L, RD = 8.4 L, see fig. 10b

| –| 9.3| –|

ns

Rise Time| tr| –| 4.7| –
Turn-Off Delay Time| td(off)| –| 16| –
Fall Time| tf| –| 17| –
Internal Drain Inductance| LD| Between lead, 6 mm (0.25″) from the package and the center of die contact
| –| 4| –|

nH

Internal Source Inductance| LS| –| 6| –
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current| IS| MOSFET symbol showing the integral reverse p – n junction diode
| –| –| 1|

A

Pulsed Diode Forward Current| ISM| –| –| 8
Body Diode Voltage| VSD| TJ = 25 °C, IS = 1 A, VGS = 0 Vb| –| –| 2.5| V
Body Diode Reverse Recovery Time| trr| TJ = 25 °C, IF = 5.6 A, dI/dt = 100 A/μsb| –| 110| 130| ns
Body Diode Reverse Recovery Charge| Qrr| –| 0.50| 0.65| μC
Forward Turn-On Time| ton| Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %

TYPICAL CHARACTERISTICS

(25 °C, unless otherwise noted)

VISHAY IRLD110 Siliconix Siliconix MOSFET - 1

Peak Diode Recovery dV/dt Test Circuit VISHAY IRLD110 Siliconix
Siliconix MOSFET - 6

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91309.

HVM DIP (High voltage)

VISHAY IRLD110 Siliconix Siliconix MOSFET - 7

| INCHES| MILLIMETERS
---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.
A| 0.310| 0.330| 7.87| 8.38
E| 0.300| 0.425| 7.62| 10.79
L| 0.270| 0.290| 6.86| 7.36
ECN: X10-0386-Rev. B, 06-Sep-10 DWG: 5974

Note

Package length does not include mold flash, protrusions, or gate burrs. Package width does not include interleaved flash or protrusions.

Disclaimer

ALL PRODUCTS, PRODUCT SPECIFICATIONS, AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN, OR OTHERWISE.
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For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Document Number: 91361
Revision: 06-Sep-10
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