VISHAY IRFZ34S Power MOSFET Owner’s Manual

VISHAY IRFZ34S Power MOSFET

PRODUCT SUMMARY

PRODUCT SUMMARY

VDS (V)| 60
RDS(on) (W)| VGS = 10 V| 0.050
Qg (Max.) (nC)| 46
Qgs (nC)| 11
Qgd (nC)| 22
Configuration| Single

FEATURES

• Advanced process technology
• Surface mount
• Low-profile through-hole (IRFZ34L, SiHFZ34L)
• 175 °C operating temperature
• Fast switching
• Material categorization: for definitions of compliance please see www.vishay.com/doc?99912
  

Note
* This datasheet provides information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details.

DESCRIPTION

Third generation power MOSFETs from Vishay utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.
The D2PAK is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2PAK is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2 W in a typical surface mount application. The through-hole version (IRFZ34L, SiHFZ34L) is available for low-profile applications.

ORDERING INFORMATION

ORDERING INFORMATION

Package| D2PAK (TO-263)| D2PAK (TO-263)| I2PAK (TO-262)
Lead (Pb)-free and halogen-free| SiHFZ34S-GE3| SiHFZ34STRL-GE3| SiHFZ34L-GE3
Lead (Pb)-free| IRFZ34SPbF| IRFZ34STRLPbF a| IRFZ34LPbF

Note
a. See device orientation.

ABSOLUTE MAXIMUM RATINGS

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| LIMIT| UNIT
Drain-Source Voltage| VDS| 60| V
Gate-Source Voltage| VGS| ± 20
Continuous Drain Current| VGS at 10 V| TC = 25 °C| ID| 30| A
TC = 100 °C| 21
Pulsed Drain Current a, e| IDM| 120
Linear Derating Factor| | 0.59| W/°C
Single Pulse Avalanche Energy b, e| EAS| 200| mJ
Maximum Power Dissipation| TC = 25 °C| PD| 88| W
TA = 25 °C| 3.7
Peak Diode Recovery dV/dt c, e| dV/dt| 4.5| V/ns
Operating Junction and Storage Temperature Range| TJ, Tstg| -55 to +175| °C
Soldering Recommendations (Peak temperature) d| for 10 s| | 300

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, Starting TJ = 25 °C, L = 260 μH, Rg = 25 Ω, IAS = 30 A (see fig. 12).
c. ISD ≤ 30 A, dI/dt ≤ 200 A/μs, VDD ≤ VDS, TJ ≤ 175 °C.
d. 1.6 mm from case.
e. Uses IRFZ34, SiHFZ34 data and test conditions.

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE RATINGS

PARAMETER| SYMBOL| TYP.| MAX.| UNIT
Maximum Junction-to-Ambient (PCB mount) a| RthJA| –| 40| °C / W
Maximum Junction-to-Case (Drain)| RthJC| –| 1.7

Note
a. When mounted on 1″ square PCB (FR-4 or G-10 material).

SPECIFICATIONS

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| TEST CONDITIONS| MIN.| TYP.| MAX.| UNIT
Static
Drain-Source Breakdown Voltage| VDS| VGS = 0 V, ID = 250 μA| 60| –| –| V
VDS Temperature Coefficient| DVDS/TJ| Reference to 25 °C, ID = 1 mA c| –| 0.065| –| V/°C
Gate-Source Threshold Voltage| VGS(th)| VDS = VGS, ID = 250 μA| 2.0| –| 4.0| V
Gate-Source Leakage| IGSS| VGS = ± 20 V| –| –| ± 100| nA
Zero Gate Voltage Drain Current| IDSS| VDS = 60 V, VGS = 0 V| –| –| 25|

μA

VDS = 48 V, VGS = 0 V, TJ = 150 °C| –| –| 250
Drain-Source On-State Resistance| RDS(on)| VGS = 10 V| ID = 18 A b| –| –| 0.05| W
Forward Transconductance| gfs| VDS = 25 V, ID = 18 A b| 9.3| –| –| S
Dynamic
Input Capacitance| Ciss| VGS = 0 V, VDS = 25 V,

f = 1.0 MHz, see fig. 5c

| –| 1200| –| pF
Output Capacitance| Coss| –| 600| –
Reverse Transfer Capacitance| Crss| –| 100| –
Total Gate Charge| Qg| VGS = 10 V| ID = 30 A, VDS = 48 V, see fig. 6 and 13 b, c| –| –| 46| nC
Gate-Source Charge| Qgs| –| –| 11
Gate-Drain Charge| Qgd| –| –| 22
Turn-On Delay Time| td(on)| VDD = 30 V, ID = 30 A, Rg = 12 W, RD = 1.0 W, see fig. 10 b, c| –| 13| –| ns
Rise Time| tr| –| 100| –
Turn-Off Delay Time| td(off)| –| 29| –
Fall Time| tf| –| 52| –
Internal Source Inductance| LS| Between lead, and center of die contact| –| 7.5| –| nH
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current| IS| MOSFET symbol D showing the integral reverseG p – n junction diode
| –| –| 30| A
Pulsed Diode Forward Current a| ISM| –| –| 120
Body Diode Voltage| VSD| TJ = 25 °C, IS = 30 A, VGS = 0 V b| –| –| 1.6| V
Body Diode Reverse Recovery Time| trr| TJ = 25 °C, IF = 30 A, dI/dt = 100 A/μs b, c| –| 120| 230| ns
Body Diode Reverse Recovery Charge| Qrr| –| 700| 1400| μC
Forward Turn-On Time| ton| Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

TYPICAL CHARACTERISTICS

(25 °C, unless otherwise noted)

Peak Diode Recovery dV/dt Test Circuit

TO-263AB (HIGH VOLTAGE)

| MILLIMETERS| INCHES
---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.
A| 4.06| 4.83| 0.160| 0.190
A1| 0.00| 0.25| 0.000| 0.010
b| 0.51| 0.99| 0.020| 0.039
b1| 0.51| 0.89| 0.020| 0.035
b2| 1.14| 1.78| 0.045| 0.070
b3| 1.14| 1.73| 0.045| 0.068
c| 0.38| 0.74| 0.015| 0.029
c1| 0.38| 0.58| 0.015| 0.023
c2| 1.14| 1.65| 0.045| 0.065
D| 8.38| 9.65| 0.330| 0.380
| MILLIMETERS| INCHES
---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.
D1| 6.86| –| 0.270| –
E| 9.65| 10.67| 0.380| 0.420
E1| 6.22| –| 0.245| –
e| 2.54 BSC| 0.100 BSC
H| 14.61| 15.88| 0.575| 0.625
L| 1.78| 2.79| 0.070| 0.110
L1| –| 1.65| –| 0.066
L2| –| 1.78| –| 0.070
L3| 0.25 BSC| 0.010 BSC
L4| 4.78| 5.28| 0.188| 0.208

ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.

I2PAK (TO-262) (HIGH VOLTAGE)

| MILLIMETERS| INCHES| | | MILLIMETERS| INCHES
---|---|---|---|---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.| DIM.| MIN.| MAX.| MIN.| MAX.
A| 4.06| 4.83| 0.160| 0.190| D| 8.38| 9.65| 0.330| 0.380
A1| 2.03| 3.02| 0.080| 0.119| D1| 6.86| –| 0.270| –
b| 0.51| 0.99| 0.020| 0.039| E| 9.65| 10.67| 0.380| 0.420
b1| 0.51| 0.89| 0.020| 0.035| E1| 6.22| –| 0.245| –
b2| 1.14| 1.78| 0.045| 0.070| e| 2.54 BSC| 0.100 BSC
b3| 1.14| 1.73| 0.045| 0.068| L| 13.46| 14.10| 0.530| 0.555
c| 0.38| 0.74| 0.015| 0.029| L1| –| 1.65| –| 0.065
c1| 0.38| 0.58| 0.015| 0.023| L2| 3.56| 3.71| 0.140| 0.146
c2| 1.14| 1.65| 0.045| 0.065|
ECN: S-82442-Rev. A, 27-Oct-08 DWG: 5977

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost extremes of the plastic body.
3. Thermal pad contour optional within dimension E, L1, D1, and E1.
4. Dimension b1 and c1 apply to base metal only

RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead 0.635 (16.129)

Disclaimer

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References

• applications.no
• IRFZ34S, IRFZ34L, SiHFZ34S, SiHFZ34L MOSFETs | Vishay

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