VISHAY SI3458BDV N-Channel 60-V (D-S) Mosfet Owner’s Manual
- June 12, 2024
- VISHAY
Table of Contents
VISHAY SI3458BDV N-Channel 60-V (D-S) Mosfet
Product Information
The Si3458BDV is an N-Channel 60-V (D-S) MOSFET manufactured by Vishay Siliconix. It is a small-sized MOSFET with a package type of TSOP-6. The product features a drain-source voltage (VDS) of 60V and a drain-source on- resistance (RDS(on)) of 0.100 at VGS = 10V and 0.128 at VGS = 4.5V. The maximum continuous drain current (ID) is 4.1A and the typical gate charge (Qg) is 3.5nC.
Product Usage Instructions
- Ensure that the Si3458BDV MOSFET is properly connected to the circuit according to the pin configuration mentioned in the user manual.
- Provide a suitable drain-source voltage (VDS) within the specified limit of 0V to 60V.
- Apply a gate-source voltage (VGS) of 10V or 4.5V depending on the desired drain-source on-resistance (RDS(on)).
- Keep the drain current (ID) within the range of 2.5A to 4.1A for continuous operation.
- Take into account the maximum power dissipation (PD) of 2.1W to prevent overheating.
- Operate the MOSFET within the recommended junction and storage temperature range of -55°C to 150°C.
- Follow the soldering recommendations for peak temperature, which should not exceed 260°C.
- Consider the thermal resistance ratings for proper heat dissipation, with typical values of 53°C/W for junction-to-ambient and 32°C/W for junction-to-foot.
- Refer to the user manual for detailed information on various parameters such as breakdown voltage, threshold voltage, leakage current, on-state resistance, transconductance, capacitances, gate charge, delay times, anddiode characteristics.
- Ensure that the MOSFET is not subjected to stresses beyond the absolute maximum ratings mentioned in the user manual to avoid permanent damage and ensure device reliability.
PRODUCT SUMMARY
PRODUCT SUMMARY
V DS (V)| R DS(on) ( W )| I D (A) d| Q g (Typ.)
60
| 0.100 at VGS = 10 V| 4.1|
3.5 nC
0.128 at VGS = 4.5 V| 3.6
FEATURES
- Halogen-free According to IEC 61249-2-21 Definition
- TrenchFET® Power MOSFET
- 100 % Rg Tested
- Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
- Load Switch for Portable Applications
- LED Backlight Switch
- DC/DC Converter
Ordering Information: Si3458BDV-T1-E3 (Lead (Pb)-free) Si3458BDV-T1-GE3
(Lead (Pb)-free and Halogen-free)
ABSOLUTE MAXIMUM RATINGS
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter| Symbol| Limit| Unit
Drain-Source Voltage| VDS| 60| V
Gate-Source Voltage| VGS| ± 20
Continuous Drain Current (TJ = 150 °C)
| TC = 25 °C|
ID
| 4.1|
A
TC = 70 °C| 3.2
TA = 25 °C| 3.2a, b
TA = 70 °C| 2.5a, b
Pulsed Drain Current| IDM| 10
Continuous Source-Drain Diode Current| TC = 25 °C| IS| 2.9
TA = 25 °C| 1.7a, b
Maximum Power Dissipation
| TC = 25 °C|
PD
| 3.3|
W
TC = 70 °C| 2.1
TA = 25 °C| 2a, b
TA = 70 °C| 1.3a, b
Operating Junction and Storage Temperature Range| TJ, Tstg| – 55 to 150| °C
Soldering Recommendations (Peak Temperature)| | 260
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE RATINGS
Parameter| Symbol| Typical| Maximum| Unit
Maximum Junction-to-Ambienta, c| t £ 5 s| RthJA| 53| 62.5| °C/W
Maximum Junction-to-Foot (Drain)| Steady State| RthJF| 32| 38
Notes:
- Surface Mounted on 1″ x 1″ FR4 board.
- t = 5 s.
- Maximum under steady state conditions is 110 °C/W.
- Based on TC = 25 °C.
SPECIFICATIONS
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter| Symbol| Test Conditions| Min.| Typ.|
Max.| Unit
Static
Drain-Source Breakdown Voltage| VDS| VGS = 0 V, ID = 250 µA| 60| | | V
VDS Temperature Coefficient| DVDS/TJ| ID = 250 µA| | 60| | mV/°C
VGS(th) Temperature Coefficient| DVGS(th)/TJ| | – 6|
Gate-Source Threshold Voltage| VGS(th)| VDS = VGS , ID = 250 µA| 1.5| | 3| V
Gate-Source Leakage| IGSS| VDS = 0 V, VGS = ± 20 V| | | ± 100| nA
Zero Gate Voltage Drain Current| IDSS| VDS = 60 V, VGS = 0 V| | | 1| µA
VDS = 60 V, VGS = 0 V, TJ = 70 °C| | | 10
On-State Drain Currenta| ID(on)| VDS ³ 5 V, VGS = 10 V| 10| | | A
Drain-Source On-State Resistancea| RDS(on)| VGS = 10 V, ID = 3.2 A| | 0.082|
0.100| W
VGS = 4.5 V, ID = 2.8 A| | 0.105| 0.128
Forward Transconductancea| gfs| VDS = 15 V, ID = 3.2 A| | 12| | S
Dynamic b
Input Capacitance| Ciss|
VDS = 30 V, VGS = 0 V, f = 1 MHz
| | 350| |
pF
Output Capacitance| Coss| | 40|
Reverse Transfer Capacitance| Crss| | 20|
Total Gate Charge| Qg| VDS = 30 V, VGS = 10 V, ID = 3.2 A| | 7.1| 11|
nC
VDS = 30 V, VGS = 4.5 V, ID = 3.2 A
| | 3.5| 5.5
Gate-Source Charge| Qgs| | 1.1|
Gate-Drain Charge| Qgd| | 0.95|
Gate Resistance| Rg| f = 1 MHz| | 2.3| 3.5| W
Turn-On Delay Time| td(on)|
VDD = 30 V, RL = 12 W
ID @ 2.5 A, VGEN = 4.5 V, Rg = 1 W
| | 16| 25|
ns
Rise Time| tr| | 17| 30
Turn-Off Delay Time| td(off)| | 12| 20
Fall Time| tf| | 10| 15
Turn-On Delay Time| td(on)|
VDD = 30 V, RL = 12 W
ID @ 2.5 A, VGEN = 10 V, Rg = 1 W
| | 5| 10
Rise Time| tr| | 12| 20
Turn-Off Delay Time| td(off)| | 18| 30
Fall Time| tf| | 10| 15
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current| IS| TC = 25 °C| | | 2.9| A
Pulse Diode Forward Current| ISM| | | | 10
Body Diode Voltage| VSD| IS = 2.5 A, VGS = 0 V| | 0.8| 1.2| V
Body Diode Reverse Recovery Time| trr|
IF = 2.5 A, dI/dt = 100 A/µs, TJ = 25 °C
| | 25| 50| ns
Body Diode Reverse Recovery Charge| Qrr| | 40| 80| nC
Reverse Recovery Fall Time| ta| | 22| | ns
Reverse Recovery Rise Time| tb| | 3|
Notes:
- Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %
- Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit.
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
Dim
| MILLIMETERS| INCHES
---|---|---
Min| Nom| Max| Min| Nom| Max
A| 0.91| –| 1.10| 0.036| –| 0.043
A 1| 0.01| –| 0.10| 0.0004| –| 0.004
A 2| 0.90| –| 1.00| 0.035| 0.038| 0.039
b| 0.30| 0.32| 0.45| 0.012| 0.013| 0.018
c| 0.10| 0.15| 0.20| 0.004| 0.006| 0.008
D| 2.95| 3.05| 3.10| 0.116| 0.120| 0.122
E| 2.70| 2.85| 2.98| 0.106| 0.112| 0.117
E 1| 1.55| 1.65| 1.70| 0.061| 0.065| 0.067
e| 0.95 BSC| 0.0374 BSC
e 1| 1.80| 1.90| 2.00| 0.071| 0.075| 0.079
L| 0.32| –| 0.50| 0.012| –| 0.020
L 1| 0.60 Ref| 0.024 Ref
L 2| 0.25 BSC| 0.010 BSC
R| 0.10| –| –| 0.004| –| –
| 0| 4| 8| 0| 4| 8
1| 7 Nom| 7 Nom
ECN: C-06593-Rev. I, 18-Dec-06 DWG: 5540
Mounting
Mounting LITTLE FOOT TSOP-6 Power MOSFETs
- Surface-mounted power MOSFET packaging has been based on integrated circuit and small signal packages. Those packages have been modified to provide the improvements in heat transfer required by power MOSFETs. Leadframe materials and design, molding compounds, and die attach materials have been changed. What has remained the same is the footprint of the packages.
- The basis of the pad design for surface-mounted power MOSFET is the basic footprint for the package. For the TSOP-6 package outline drawing see http://www.vishay.com/doc?71200 and see http://www.vishay.com/doc?72610 for the minimum pad footprint. In converting the footprint to the pad set for a power MOSFET, you must remember that not only do you want to make electrical connection to the package, but you must made thermal connection and provide a means to draw heat from the package, and move it away from the package.
- In the case of the TSOP-6 package, the electrical connections are very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and are connected together. For a small signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross-section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board.
- Figure 1 shows the copper spreading recommended footprint for the TSOP-6 package. This pattern shows the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlays the basic pattern on pins 1,2,5, and 6. The copper plane connects the drain pins electrically, but more importantly, provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. Notice that the planar copper is shaped like a “T” to move heat away from the drain leads in all directions. This pattern uses all the available area underneath the body for this purpose
- Since surface mounted packages are small, and reflow soldering is the most common form of soldering for surface mount components, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically.
- A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of widetraces connected to the drain plane provides a low impedance path for heat to move away from the device.
REFLOW SOLDERING
- Vishay Siliconix surface-mount packages meet solder reflow reliability requirements. Devices are subjected to solder reflow as a test preconditioning and are then reliability-tested using temperature cycle, bias humidity, HAST, or pressure pot. The solder reflow temperature profile used, and the temperatures and time duration, are shown in Figures 2 and 3.
Ramp-Up Rate| +6°C/Second Maximum
---|---
Temperature @ 155 ± 15°C| 120 Seconds Maximum
Temperature Above 180°C| 70 − 180 Seconds
Maximum Temperature| 240 +5/−0°C
Time at Maximum Temperature| 20 − 40 Seconds
Ramp-Down Rate| +6°C/Second Maximum
THERMAL PERFORMANCE
A basic measure of a device’s thermal performance is the junction-to-case thermal resistance, Rjc, or the junction-to-foot thermal resistance, Rjf. This parameter is measured for the device mounted to an infinite heat sink and is therefore a characterization of the device only, in other words, independent of the properties of the object to which the device is mounted. Table 1 shows the thermal performance of the TSOP-6.
TABLE 1.
Equivalent Steady State Performance—TSOP-6
Thermal Resistance R8jf| 30°C/W
SYSTEM AND ELECTRICAL IMPACT OF TSOP-6
In any design, one must take into account the change in MOSFET rDS(on) with
temperature (Figure 4).
RECOMMENDED MINIMUM PADS FOR TSOP-6
Disclaimer
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References
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