VISHAY IRFS9N60A, SiHFS9N60A Power MOSFET Owner’s Manual

: August 14, 2024
: VISHAY

Table of Contents

Product Information
FEATURES
APPLICATIONS
APPLICABLE OFF LINE SMPS TOPOLOGIES
Package Information
Legal Disclaimer Notice
References
Read User Manual Online (PDF format)
Download This Manual (PDF format)

**VISHAY IRFS9N60A, SiHFS9N60A Power MOSFET Owner’s Manual

**

Product Information

PRODUCT SUMMARY

FEATURES

Low gate charge Qg results in simple drive requirement
Improved gate, avalanche and dynamic dV/dt ruggedness
Fully characterized capacitance and avalanche voltage and current
Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

Note

This datasheet provides information about parts that are RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details

APPLICATIONS

Switch mode power supply (SMPS)
Uninterruptible power supply
High speed power switching

APPLICABLE OFF LINE SMPS TOPOLOGIES

Active clamped forward
Main switch

ORDERING INFORMATION

Note
a. See device orientation

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| LIMIT| UNIT
Drain-Source Voltage| VDS| 600| V
Gate-Source Voltage| VGS| ± 30
Continuous Drain Current| VGS at 10 V| TC = 25 °C| ID| 9.2| A
TC = 100 °C| 5.8
Pulsed Drain Current a| IDM| 37
Linear Derating Factor| | 1.3| W/°C
Single Pulse Avalanche Energy b| EAS| 290| mJ
Repetitive Avalanche Current a| IAR| 9.2| A
Repetitive Avalanche Energy a| EAR| 17| mJ
Maximum Power Dissipation| TC = 25 °C| PD| 170| W
Peak Diode Recovery dV/dt c| dV/dt| 5.0| V/ns
Operating Junction and Storage Temperature Range| TJ, Tstg| -55 to +150| °C
Soldering Recommendations (Peak temperature) d| for 10 s| | 300

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Starting TJ = 25 °C, L = 6.8 mH, Rg = 25 , IAS = 9.2 A (see fig. 12)
c. ISD ≤ 9.2 A, dI/dt Ω 50 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
d. 1.6 mm from case

THERMAL RESISTANCE RATINGS

PARAMETER| SYMBOL| TYP.| MAX.| UNIT
Maximum Junction-to-Ambient| RthJA| –| 40| °C/W
Maximum Junction-to-Case (Drain)| RthJC| –| 0.75

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| TEST CONDITIONS| MIN.| TYP.| MAX.| UNIT
Static
Drain-Source Breakdown Voltage| VDS| VGS = 0, ID = 250 μA| 600| –| –| V
VDS Temperature Coefficient| DVDS/TJ| Reference to 25 °C, ID = 1 mA| –| 0.66| –| V/°C
Gate-Source Threshold Voltage| VGS(th)| VDS = VGS, ID = 250 μA| 2.0| –| 4.0| V
Gate-Source Leakage| IGSS| VGS = ± 30 V| –| –| ± 100| nA
Zero Gate Voltage Drain Current| IDSS| VDS = 600 V, VGS = 0 V| –| –| 25| μA
VDS = 480 V, VGS = 0 V, TJ = 125 °C| –| –| 250
Drain-Source On-State Resistance| RDS(on)| VGS = 10 V| ID = 5.5 A b| –| –| 0.75| W
Forward Transconductance| gfs| VDS = 25 V, ID = 3.1 A| 5.5| –| –| S
Dynamic
Input Capacitance| Ciss| VGS = 0 V, VDS = 25 V,f = 1.0 MHz, see fig. 5| –| 1400| –| pF
Output Capacitance| Coss| –| 180| –
Reverse Transfer Capacitance| Crss| –| 7.1| –
Output Capacitance| Coss| VGS = 0 V| VDS = 1.0 V, f = 1.0 MHz| –| 1957| –
VDS = 480 V, f = 1.0 MHz| –| 49| –
Effective Output Capacitance| Coss eff.| VDS = 0 V to 480 V c| –| 96| –
Total Gate Charge| Qg| VGS = 10 V| ID = 9.2 A, VDS = 400 Vsee fig. 6 and 13 b| –| –| 49| nC
Gate-Source Charge| Qgs| –| –| 13
Gate-Drain Charge| Qgd| –| –| 20
Turn-On Delay Time| td(on)| VDD = 300 V, ID = 9.2 A Rg = 9.1 W, RD = 35.5 W,see fig. 10 b| –| 13| –| ns
Rise Time| tr| –| 25| –
Turn-Off Delay Time| td(off)| –| 30| –
Fall Time| tf| –| 22| –
Gate Input Resistance| Rg| f = 1 MHz, open drain| 0.5| –| 3.2| W
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current| IS| MOSFET symbol showing the integral reverse
p – n junction diode| –| –| 9.2| A
Pulsed Diode Forward Current a| ISM| –| –| 37
Body Diode Voltage| VSD| TJ = 25 °C, IS = 9.2 A, VGS = 0 V b| –| –| 1.5| V
Body Diode Reverse Recovery Time| trr| TJ = 25 °C, IF = 9.2 A, dI/dt = 100 A/μs b| –| 530| 800| ns
Body Diode Reverse Recovery Charge| Qrr| –| 3.0| 4.4| μC
Forward Turn-On Time| ton| Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. Pulse width  300 μs; duty cycle  2 %
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Fig. 1 – Typical Output Characteristics

Fig. 2 – Typical Output Characteristics

Fig. 3 – Typical Transfer Characteristics

Fig. 4 – Normalized On-Resistance vs. Temperature

Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 – Typical Source-Drain Diode Forward Voltage

Fig. 1 – Maximum Safe Operating Area

Fig. 8 – Maximum Drain Current vs. Case Temperature

Fig. 10a – Switching Time Test Circuit

Fig. 10b – Switching Time Waveforms

Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig. 12a – Unclamped Inductive Test Circuit

Fig. 12b – Unclamped Inductive Wave forms

Fig. 12c – Maximum Avalanche Energy vs. Drain Current

Fig. 13a – Basic Gate Charge Waveform

Fig. 13b – Gate Charge Test Circuit

Peak Diode Recovery dv/dt Test Circuit

Driver gate drive

Note
a. VGS = 5 V for logic level devices
Fig. 14 – For N-Channel

Package Information

TO-263AB (HIGH VOLTAGE)

| MILLIMETERS| INCHES| | | MILLIMETERS| INCHES
---|---|---|---|---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.| DIM.| MIN.| MAX.| MIN.| MAX.
A| 4.06| 4.83| 0.160| 0.190| D1| 6.86| –| 0.270| –
A1| 0.00| 0.25| 0.000| 0.010| E| 9.65| 10.67| 0.380| 0.420
b| 0.51| 0.99| 0.020| 0.039| E1| 6.22| –| 0.245| –
b1| 0.51| 0.89| 0.020| 0.035| e| 2.54 BSC| 0.100 BSC
b2| 1.14| 1.78| 0.045| 0.070| H| 14.61| 15.88| 0.575| 0.625
b3| 1.14| 1.73| 0.045| 0.068| L| 1.78| 2.79| 0.070| 0.110
c| 0.38| 0.74| 0.015| 0.029| L1| –| 1.65| –| 0.066
c1| 0.38| 0.58| 0.015| 0.023| L2| –| 1.78| –| 0.070
c2| 1.14| 1.65| 0.045| 0.065| L3| 0.25 BSC| 0.010 BSC
D| 8.38| 9.65| 0.330| 0.380| L4| 4.78| 5.28| 0.188| 0.208
ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970

Notes

Dimensioning and tolerancing per ASME Y14.5M-1994.
Dimensions are shown in millimeters (inches).
Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the outmost extremes of the plastic body at datum A.
Thermal PAD contour optional within dimension E, L1, D1 and E1.
Dimension b1 and c1 apply to base metal only.
Datum A and B to be determined at datum plane H.
Outline conforms to JEDEC outline to TO-263AB.

RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead

Recommended Minimum Pads
Dimensions in Inches/(mm)

Legal Disclaimer Notice

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Revision: 01-Jan-2024
Document Number : 91000
For technical questions, contact:
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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