VISHAY IRF9640 Power MOSFET Instructions

August 9, 2024
VISHAY

IRF9640 Power MOSFET

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Specifications:

Brand: Vishay Siliconix

Product: IRF9640 Power MOSFET

Package: TO-220AB

Channel Type: P-Channel MOSFET

VDS (Drain-Source Voltage): -200V

RDS(on) (On-Resistance): 7.1 ohms

Qg max. (Total Gate Charge): 44nC

Qgs (Gate-Source Charge): 27nC

Qgd (Gate-Drain Charge): 14nC

Configuration: Single

Description:

The IRF9640 is a power MOSFET from Vishay Siliconix, offering
fast switching, rugged design, low on-resistance, and
cost-effectiveness. The TO-220AB package is suitable for various
commercial-industrial applications up to 50W power dissipation
levels.

Ordering Information:

Pb-Free Package: IRF9640PbF

Pb-Free and Halogen-Free Package: IRF9640PbF-BE3

Thermal Resistance Ratings:

Maximum Junction-to-Ambient: 62°C/W

Case-to-Sink: 1.0°C/W

Maximum Junction-to-Case: 0.50°C/W

Usage Instructions:

Installation:

  1. Ensure the device is powered off and disconnected from the
    power source.

  2. Mount the IRF9640 Power MOSFET securely using a 6-32 or M3
    screw with the specified torque.

  3. Apply thermal grease if needed for better heat
    dissipation.

Electrical Connections:

  1. Connect the drain, gate, and source pins of the MOSFET properly
    to your circuit.

  2. Make sure the gate-source voltage does not exceed -10V to avoid
    damage.

Operating Conditions:

  1. Maintain the operating junction temperature within the
    specified range.

  2. Avoid exceeding the maximum ratings for drain-source voltage
    and continuous drain current.

FAQ:

Q: What is the maximum drain-source breakdown voltage of the

IRF9640?

A: The maximum drain-source breakdown voltage is -200V.

Q: Is the IRF9640 RoHS-compliant?

A: The datasheet provides information on RoHS-compliance. Some
parts may be RoHS-compliant while others may not be, depending on
terminations.

Q: What is the recommended torque for mounting the

IRF9640?

A: Use a 6-32 or M3 screw with the specified torque for mounting
the IRF9640 Power MOSFET.

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IRF9640
Vishay Siliconix

Power MOSFET

TO-220AB

S G

S D G

D P-Channel MOSFET

PRODUCT SUMMARY

VDS (V) RDS(on) () Qg max. (nC) Qgs (nC) Qgd (nC) Configuration

-200 VGS = -10 V
44 7.1 27 Single

0.50

FEATURES

· Dynamic dV/dt rating

· Repetitive avalanche rated

Available

· P-channel · Fast switching

Available

· Ease of paralleling

· Simple drive requirements

· Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

Note

  • This datasheet provides information about parts that are
    RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details

DESCRIPTION
Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness.
The TO-220AB package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220AB contribute to its wide acceptance throughout the industry.

ORDERING INFORMATION
Package Lead (Pb)-free Lead (Pb)-free and halogen-free

TO-220AB IRF9640PbF IRF9640PbF-BE3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

Drain-source voltage Gate-source voltage
Continuous drain current
Pulsed drain current a Linear derating factor

VDS

VGS

VGS at 10 V

TC = 25 °C TC = 100 °C

ID

IDM

Single pulse avalanche energy b Repetitive avalanche current a Repetitive avalanche energy a Maximum power dissipation Peak diode recovery dV/dt c

TC = 25 °C

EAS IAR EAR PD dV/dt

Operating junction and storage temperature range Soldering recommendations (peak temperature) d

For 10 s

TJ, Tstg

Mounting torque

6-32 or M3 screw

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. VDD = -50 V, starting TJ = 25 °C, L = 8.7 mH, Rg = 25 , IAS = -11 A (see fig. 12) c. ISD -11 A, dI/dt 150 A/s, VDD VDS, TJ 150 °C d. 1.6 mm from case

LIMIT -200 ± 20 -11 -6.8 -44 1.0 700 -11 13 125 -5.0 -55 to +150 300 10 1.1

UNIT V V
A
W/°C mJ A mJ W V/ns
°C
lbf · in N · m

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Document Number: 91086

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IRF9640
Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER

SYMBOL

Maximum junction-to-ambient Case-to-sink, flat, greased surface Maximum junction-to-case (drain)

RthJA RthCS RthJC

TYP. –
0.50 –

MAX. 62 1.0

UNIT °C/W

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN. TYP. MAX. UNIT

Static Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage Gate-source leakage
Zero gate voltage drain current
Drain-source on-state resistance Forward transconductance Dynamic Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Turn-on delay time Rise time Turn-off delay time Fall time

VDS VDS/TJ VGS(th)
IGSS
IDSS
RDS(on) gfs
Ciss Coss Crss Qg Qgs Qgd td(on)
tr td(off)
tf

VGS = 0 V, ID = -250 A

Reference to 25 °C, ID = -1 mA

VDS = VGS, ID = -250 A

VGS = ± 20 V

VDS = -200 V, VGS = 0 V

VDS = -160 V, VGS = 0 V, TJ = 125 °C

VGS = -10 V

ID = -6.6 A b

VDS = -50 V, ID = -6.6 A b

-200 –
-2.0 4.1

V

-0.2

V/°C

-4.0

V

± 100 nA

-100

A

-500

0.50

S

VGS = 0 V,

VDS = -25 V,

f = 1.0 MHz, see fig. 5

VGS = -10 V

ID = -11 A, VDS = -160 V, see fig. 6 and 13 b

VDD = -100 V, ID = -11 A

Rg = 9.1 , RD = 8.6 , see fig. 10 b

1200

370

pF

81

44

7.1

nC

27

14

43

ns

39

38

Gate input resistance Internal drain inductance

LD

Between lead, 6 mm (0.25″) from

D

package and center of

G

LS

die contact

S

4.5

nH

7.5

Internal source inductance

Rg

Drain-Source Body Diode Characteristics

Continuous source-drain diode current

IS

Pulsed diode forward current a

ISM

f = 1 MHz, open drain

MOSFET symbol
showing the integral reverse p -n junction diode

D
G S

0.3

1.7

-11

A

-44

Body diode voltage

VSD

TJ = 25 °C, IS = -11 A, VGS = 0 V b

-5

V

Body diode reverse recovery time Body diode reverse recovery charge

trr Qrr

TJ = 25 °C, IF = -11 A, dI/dt = 100 A/s b

250

300

ns

2.9

3.6

C

Forward turn-on time

ton

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. Pulse width 300 s; duty cycle 2 %

S21-0867-Rev. D, 16-Aug-2021

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Document Number: 91086

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www.vishay.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

IRF9640
Vishay Siliconix

RDS(on), Drain-to-Source On Resistance (Normalized)

– ID, Drain Current (A)

VGS Top – 15 V
– 10 V – 8.0 V – 7.0 V – 6.0 V – 5.5 V – 5.0 V 101 Bottom – 4.5 V

100 100
91086_01

– 4.5 V
20 µs Pulse Width TC = 25 °C 101
– VDS, Drain-to-Source Voltage (V)

Fig. 1 – Typical Output Characteristics, TC = 25 °C

– ID, Drain Current (A)

VGS Top – 15 V

– 10 V

– 8.0 V

– 7.0 V

101

– 6.0 V – 5.5 V

– 5.0 V

Bottom – 4.5 V

– 4.5 V

100 100
91086_02

20 µs Pulse Width TC = 150 °C 101
– VDS, Drain-to-Source Voltage (V)

Fig. 2 – Typical Output Characteristics, TC = 150 °C

101

25 °C

150 °C

– ID, Drain Current (A)

100
4
91086_03

20 µs Pulse Width VDS = – 50 V

5

6

7

8

9

10

– VGS, Gate-to-Source Voltage (V)

Fig. 3 – Typical Transfer Characteristics

3.0 ID = – 11 A VGS = – 10 V
2.5

2.0

1.5

1.0

0.5

0.0 – 60 – 40 – 20 0 20 40 60 80 100 120 140 160

91086_04

TJ, Junction Temperature (°C)

Fig. 4 – Normalized On-Resistance vs. Temperature

2400 2000 1600 1200

VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd
Ciss

Capacitance (pF)

800
400
0 100
91086_05

Coss Crss
101 – VDS, Drain-to-Source Voltage (V)

Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage

– VGS, Gate-to-Source Voltage (V)

20 ID = – 11 A

16

VDS = – 160 V

VDS = – 100 V

12

VDS = – 40 V

8

4
0 0
91086_06

For test circuit see figure 13

10

20

30

40

50 60

QG, Total Gate Charge (nC)

Fig. 6 – Typical Gate Charge vs. Drain-to-Source Voltage

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– ISD, Reverse Drain Current (A)

101
150 °C 100

25 °C

10-1 0.0
91086_07

VGS = 0 V

1.0

2.0

3.0

4.0

5.0

– VSD, Source-to-Drain Voltage (V)

Fig. 7 – Typical Source-Drain Diode Forward Voltage

102 Operation in this area limited

5

by RDS(on)

10 µs

– ID, Drain Current (A)

2
100 µs
10

5

1 ms

2
1 1
91086_08

TC = 25 °C TJ = 150 °C Single Pulse

10 ms

2

5 10 2

5 102 2

5 103

– VDS, Drain-to-Source Voltage (V)

Fig. 8 – Maximum Safe Operating Area

10

IRF9640
Vishay Siliconix

12 10
8

– ID, Drain Current (A)

6 4

2

0 25
91086_09

50

75

100

125

150

TC, Case Temperature (°C)

Fig. 9 – Maximum Drain Current vs. Case Temperature

VDS VGS RG

RD D.U.T.

– 10 V
Pulse width 1 µs Duty factor 0.1 %

+VDD

Fig. 10a – Switching Time Test Circuit

VDS 10 %

td(on) tr

td(off) tf

90 % VGS Fig. 10b – Switching Time Waveforms

Thermal Response (ZthJC)

1

D = 0.50 PDM
0.20

0.1 0.10 0.05
0.02 0.01
10-2 10-5

Single Pulse (Thermal Response)

10-4

10-3

10-2

t1 t2
Notes:
1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC

0.1

1

10

91086_11

t1, Rectangular Pulse Duration (s)

Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case

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Document Number: 91086

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IRF9640
Vishay Siliconix

VDS

L

RG – 10 V

D.U.T

IAS

tp

0.01

+ VDS

Fig. 12a – Unclamped Inductive Test Circuit 1600

1200

IAS
VDS
VDD tp
V(BR)DSS Fig. 12b – Unclamped Inductive Waveforms
ID Top – 4.9 A
– 7.0 A Bottom – 11 A

EAS, Single Pulse Energy (mJ)

800

400

0 VDD = – 50 V

25

50

75

100

125

150

91086_12c

Starting TJ, Junction Temperature (°C)

Fig. 12c – Maximum Avalanche Energy vs. Drain Current

Current regulator Same type as D.U.T.

– 10 V QGS
VG

QG QGD

Charge

Fig. 13a – Basic Gate Charge Waveform

12 V

50 k

0.2 µF

0.3 µF

D.U.T. + VDS

VGS

– 3 mA

IG

ID

Current sampling resistors

Fig. 13b – Gate Charge Test Circuit

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Document Number: 91086

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D.U.T.
+ –

Peak Diode Recovery dV/dt Test Circuit
+ Circuit layout considerations · Low stray inductance · Ground plane · Low leakage inductance current transformer

IRF9640
Vishay Siliconix

Rg

· dV/dt controlled by Rg

· ISD controlled by duty factor “D” · D.U.T. – device under test

– VDD

Note · Compliment N-Channel of D.U.T. for driver

Driver gate drive

P.W.

Period

D =

P.W. Period

VGS = – 10 Va

D.U.T. lSD waveform

Reverse

recovery

Body diode forward

current

current dI/dt

D.U.T. VDS waveform

Diode recovery

dV/dt VDD

Re-applied voltage

Body diode forward drop Inductor current

Ripple 5 %

ISD

Note a. VGS = – 5 V for logic level and – 3 V drive devices

Fig. 14 – For P-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91086.

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Vishay

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non- infringement and merchantability.
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Revision: 01-Jul-2024

1

Document Number: 91000

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