VISHAY Si9933CDY Dual P Channel 20 V (D-S) MOSFET Owner’s Manual
- June 1, 2024
- VISHAY
Table of Contents
VISHAY Si9933CDY Dual P Channel 20 V (D-S) MOSFET
Specifications
- Product: Si9933CDY
- Brand: Vishay Siliconix
- Type: Dual P-Channel MOSFET
- Package: SO-8
- Maximum Drain-Source Voltage (VDS): -20 V
- Maximum RDS(on) at VGS = -4.5 V: 0.058 Ω
- Maximum RDS(on) at VGS = -2.5 V: 0.094 Ω
- Typical Gate Charge (Qg): 8 nC
- Maximum Continuous Drain Current (ID): -4 A
- Configuration: Dual P-Channel
Product Usage Instructions
Features
For definitions of compliance, please see
www.vishay.com/doc?99912
Applications
- P-Channel MOSFET applications
Ordering Information
Package | Lead (Pb)-free | Lead (Pb)-free and halogen-free |
---|---|---|
SO-8 | Si9933CDY-T1-E3 | Si9933CDY-T1-GE3 |
Thermal Resistance Ratings
Parameter | Maximum Junction-to-Ambient | Maximum Junction-to-Foot (Drain) |
---|---|---|
Symbol | RthJA | RthJF |
Typical | 52 °C/W | 32 °C/W |
Maximum | 62.5 °C/W | 40 °C/W |
Frequently Asked Questions (FAQ)
Q: What is the maximum Drain-Source Voltage supported by the Si9933CDY?
A: The maximum Drain-Source Voltage (VDS) supported by the Si9933CDY is
-20 V.
Q: What is the typical Gate Charge for the Si9933CDY?
A: The typical Gate Charge (Qg) for the Si9933CDY is 8 nC.
Q: Where can I find more technical information about the compliance
definitions?
A: You can find more technical information about the compliance
definitions at www.vishay.com/doc?99912.
Q: What is the configuration of the Si9933CDY?
A: The configuration of the Si9933CDY is Dual P-Channel.
Q: What is the lead-free package option for the Si9933CDY?
A: The lead-free package option for the Si9933CDY is Si9933CDY-T1-E3.
Q: What is the maximum Continuous Drain Current (ID) for the Si9933CDY?
A: The maximum Continuous Drain Current (ID) for the Si9933CDY is -4 A.
FEATURES
- TrenchFET® power MOSFET
- 100 % Rg and UIS tested
- Material categorization:
For definitions of compliance please see www.vishay.com/doc?99912
APPLICATIONS
- Load switch
- DC/DC converter
PRODUCT SUMMARY
VDS (V)| -20
RDS(on) max. (W) at VGS = -4.5 V| 0.058
RDS(on) max. (W) at VGS = -2.5 V| 0.094
Qg typ. (nC)| 8
ID (A) a, e| -4
Configuration| Dual
ORDERING INFORMATION
Package| SO-8
Lead (Pb)-free| Si9933CDY-T1-E3
Lead (Pb)-free and halogen-free| Si9933CDY-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER| SYMBOL| LIMIT| UNIT
Drain-source voltage| VDS| -20| V
Gate-source voltage| VGS| ± 12
Continuous drain current (TJ = 150 °C)
| TC = 25 °C|
ID
| -4 e|
A
TC = 70 °C| -4 e
TA = 25 °C| -4 b, c, e
TA = 70 °C| -3.8 b, c
Pulsed drain current (10 μs pulse width)| IDM| -20
Source-drain current diode current| TC = 25 °C| IS| -2.5
TA = 25 °C| -1.7 b, c
Single pulse avalanche current| L = 0.1 mH| IAS| -6
Single-pulse avalanche energy| EAS| 1.8| mJ
Maximum power dissipation
| TC = 25 °C|
PD
| 3.1|
W
TC = 70 °C| 2
TA = 25 °C| 2 b, c
TA = 70 °C| 1.28 b, c
Operating junction and storage temperature range| TJ, Tstg| -50 to +150| °C
THERMAL RESISTANCE RATINGS
PARAMETER| SYMBOL| LIMIT| UNIT
°C/W
TYPICAL| MAXIMUM
Maximum junction-to-ambient b, d| t £ 10 s| RthJA| 52| 62.5
Maximum junction-to-foot (drain)| Steady state| RthJF| 32| 40
Notes
- Based on TC = 25 °C
- Surface mounted on 1″ x 1″ FR4 board
- t = 10 s
- Maximum under steady state conditions is 110 °C/W
- Package limited
SPECIFICATIONS
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER| SYMBOL| TEST CONDITIONS| MIN.| TYP.A|
MAX.| UNIT
Static
Drain-source breakdown voltage| VDS| VGS = 0 V, ID = -250 μA| -20| –| –| V
VDS temperature coefficient| DVDS/TJ| ID = -250 μA| –| -19| –| mV/°C
VGS(th) temperature coefficient| DVGS(th)/TJ| –| 3.1| –
Gate threshold voltage| VGS(th)| VDS = VGS, ID = -250 μA| -0.6| –| -1.4| V
Gate-body leakage| IGSS| VDS = 0 V, VGS = ± 12 V| –| –| -100| nA
Zero gate voltage drain current| IDSS| VDS = -20 V, VGS = 0 V| –| –| -1| μA
VDS = -20 V, VGS = 0 V, TJ = 55 °C| –| –| -10
On-state drain current b| ID(on)| VDS = £ -5 V, VGS = -10 V| -20| –| –| A
Drain-source on-state resistance b| RDS(on)| VGS = -4.5 V, ID = -4.8 A| –|
0.048| 0.058| W
VGS = -2.5 V, ID = -1 A| –| 0.075| 0.094
Forward transconductance b| gfs| VDS = -10 V, ID = -4.8 A| –| 11| –| S
Dynamic a
Input capacitance| Ciss|
VDS = -10 V, VGS = 0 V, f = 1 MHz
| –| 665| –|
pF
Output capacitance| Coss| –| 140| –
Reverse transfer capacitance| Crss| –| 115| –
Total gate charge| Qg| VDS = -10 V, VGS = -10 V, ID = -4.8 A| –| 17| 26|
nC
VDS = -10 V, VGS = -4.5 V, ID = -4.8 A
| –| 8| 12
Gate-source charge| Qgs| –| 2| –
Gate-drain charge| Qgd| –| 3| –
Gate resistance| Rg| f = 1 MHz| 1.2| 6| 12| W
Turn-on delay time| td(on)|
VDD = -10 V, RL = 2.6 W
ID @ -3.8 A, VGEN = -10 V, Rg = 1 W
| –| 6| 12|
ns
Rise time| tr| –| 15| 23
Turn-off delay time| td(off)| –| 26| 39
Fall time| tf| –| 9| 18
Turn-on delay time| td(on)|
VDD = -10 V, RL = 2.6 W
ID @ -3.8 A, VGEN = -4.5 V, Rg = 1 W
| –| 21| 32
Rise time| tr| –| 50| 75
Turn-off delay time| td(off)| –| 29| 44
Fall time| tf| –| 13| 20
Drain-Source Body Diode Characteristics
Continuous source-drain diode current| IS| TC = 25 °C| –| –| -2.5| A
Pulse diode forward current a| ISM| | –| –| -20
Body diode voltage| VSD| IS = -3.8 A| –| -0.77| -1.2| V
Body diode reverse recovery time| trr|
IF = -3.8 A, di/dt = 100 A/μs, TJ = 25 °C
| –| 30| 45| ns
Body diode reverse recovery charge| Qrr| –| 17| 26| nC
Reverse recovery fall time| ta| –| 16| –| ns
Reverse recovery rise time| tb| –| 14| –
Notes
- Guaranteed by design, not subject to production testing
- Pulse test; pulse width 300 μs, duty cycle 2 %
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS
(25 °C, unless otherwise noted)
Note
- The power dissipation PD is based on TJ max. = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit
SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012
DIM
| MILLIMETERS| INCHES
---|---|---
Min| Max| Min| Max
A| 1.35| 1.75| 0.053| 0.069
A1| 0.10| 0.20| 0.004| 0.008
B| 0.35| 0.51| 0.014| 0.020
C| 0.19| 0.25| 0.0075| 0.010
D| 4.80| 5.00| 0.189| 0.196
E| 3.80| 4.00| 0.150| 0.157
e| 1.27 BSC| 0.050 BSC
H| 5.80| 6.20| 0.228| 0.244
h| 0.25| 0.50| 0.010| 0.020
L| 0.50| 0.93| 0.020| 0.037
q| 0°| 8°| 0°| 8°
S| 0.44| 0.64| 0.018| 0.026
ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498
RECOMMENDED MINIMUM PADS FOR SO-8
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References
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