VISHAY IRF644S Power MOSFET Owner’s Manual

VISHAY IRF644S Power MOSFET

Product Information

Product Usage Instructions

1. The IRF644S/SiHF644S is a power MOSFET used for various applications.
2. The package type is D2PAK (TO-263), which is a surface-mount power package.
3. Ensure that the product is suitable for your application requirements, especially in terms of drain-source voltage (VDS), on-resistance (RDS(on)), and gate charge (Qg).
4. Connect the drain, gate, and source pins of the MOSFET as per your circuit design.
5. Make sure to follow the recommended operating junction and storage temperature range (-55°C to +150°C) for proper functionality.
6. The product is available in different configurations, such as lead (Pb)-free and halogen-free options. Choose the appropriate one based on your needs.
7. Refer to the datasheet for detailed technical specifications, including thermal resistance ratings, soldering recommendations, and additional parameters.
8. For any technical questions or support, contact hvm@vishay.com or visit www.vishay.com.

Power MOSFET

PRODUCT SUMMARY

VDS (V)| 250
RDS(on) (W)| VGS = 10 V| 0.28
Qg max. (nC)| 68
Qgs (nC)| 11
Qgd (nC)| 35
Configuration| Single

FEATURES

• Surface-mount
• Available in tape and reel
• Dynamic dv/dt rating
• Repetitive avalanche rated
• Fast switching
• Ease of paralleling
• Simple drive requirements
• Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

Note: This datasheet provides information about parts that are RoHS- compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details

DESCRIPTION

Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The D2PAK (TO-263) is a surface-mount power package capable of accommodating die size up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface-mount package. The D2PAK (TO-263) is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface-mount application.

ORDERING INFORMATION

Package| D2PAK (TO-263)| D2PAK (TO-263)| D2PAK (TO-263)
Lead (Pb)-free and halogen-free| SiHF644S-GE3| SiHF644STRL-GE3 a| SiHF644STRR- GE3 a
Lead (Pb)-free| IRF644SPbF| IRF644STRLPbF a| IRF644STRRPbF a

Note: See device orientation

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| LIMIT| UNIT
Drain-source voltage| VDS| 250| V
Gate-source voltage| VGS| ± 20
Continuous drain current| VGS at 10 V| TC = 25 °C| ID| 14|

A

TC = 100 °C| 8.5
Pulsed drain current a| IDM| 56
Linear derating factor| | 1.0| W/°C
Linear derating factor (PCB mount) e| 0.025
Single pulse avalanche energy b| EAS| 550| mJ
Avalanche current a| IAR| 14| A
Repetitive avalanche energy a| EAR| 13| mJ
Maximum power dissipation| TC = 25 °C| PD| 125| W
Maximum power dissipation (PCB mount) e| TA = 25 °C| 3.1
Peak diode recovery dv/dt c| dv/dt| 4.8| V/ns
Operating junction and storage temperature range| TJ, Tstg| -55 to +150| °C
Soldering recommendations (peak temperature) d| for 10 s| | 300

Notes

1. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
2. VDD = 50 V, starting TJ = 25 °C, L = 4.5 mH, Rg = 25 W, IAS = 14 A (see fig. 12)
3. ISD £ 14 A, di/dt £ 150 A/μs, VDD £ VDS, TJ £ 150 °C
4. 1.6 mm from case
5. When mounted on 1″ square PCB (FR-4 or G-10 material)

THERMAL RESISTANCE RATINGS

PARAMETER| SYMBOL| TYP.| MAX.| UNIT
Maximum junction-to-ambient| RthJA| –| 62|

°C/W

Maximum junction-to-ambient (PCB mount) a| RthJA| –| 40
Maximum junction-to-case (drain)| RthJC| –| 1.0

Note: When mounted on 1″ square PCB (FR-4 or G-10 material)

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER| SYMBOL| TEST CONDITIONS| MIN.| TYP.| MAX.| UNIT
Static
Drain-source breakdown voltage| VDS| VGS = 0, ID = 250 μA| 250| –| –| V
VDS temperature coefficient| DVDS/TJ| Reference to 25 °C, ID = 1 mA| –| 0.34| –| V/°C
Gate-source threshold voltage| VGS(th)| VDS = VGS, ID = 250 μA| 2.0| –| 4.0| V
Gate-source leakage| IGSS| VGS = ± 20 V| –| –| ± 100| nA
Zero gate voltage drain current| IDSS| VDS = 250 V, VGS = 0 V| –| –| 25| μA
VDS = 200 V, VGS = 0 V, TJ = 125 °C| –| –| 250
Drain-source on-state resistance| RDS(on)| VGS = 10 V| ID = 8.4 A b| –| –| 0.28| W
Forward transconductance| gfs| VDS = 50 V, ID = 8.4 A b| 6.7| –| –| S
Dynamic
Input capacitance| Ciss| VGS = 0 V, VDS = 25 V,

f = 1.0 MHz, see fig. 5

| –| 1300| –|

pF

Output capacitance| Coss| –| 330| –
Reverse transfer capacitance| Crss| –| 85| –
Total gate charge| Qg|

VGS = 10 V

|

ID = 7.9 A, VDS = 200 V,

see fig. 6 and 13 b

| –| –| 68|

nC

Gate-source charge| Qgs| –| –| 11
Gate-drain charge| Qgd| –| –| 35
Turn-on delay time| td(on)|

VDD = 125 V, ID = 7.9 A,

Rg = 9.1 W, RD = 8.7 W, see fig. 10 b

| –| 11| –|

ns

Rise time| tr| –| 24| –
Turn-off delay time| td(off)| –| 53| –
Fall time| tf| –| 49| –
Gate input resistance| LD| Between lead,                                 D

6 mm (0.25″) from

package and center of          G

die contact

S

| –| 4.5| –|

nH

Internal drain inductance| LS| –| 7.5| –
Internal source inductance| Rg| f = 1 MHz, open drain| 0.3| –| 1.2| W
Drain-Source Body Diode Characteristics
Continuous source-drain diode current| IS| MOSFET symbol D

showing the

integral reverse                     G

p – n junction diode

S

| –| –| 14|

A

Pulsed diode forward current a| ISM| –| –| 56
Body diode voltage| VSD| TJ = 25 °C, IS = 14 A, VGS = 0 V b| –| –| 1.8| V
Body diode reverse recovery time| trr| TJ = 25 °C, IF = 7.9 A, di/dt = 100 A/μs b| –| 250| 500| ns
Body diode reverse recovery charge| Qrr| –| 2.3| 4.6| μC
Forward turn-on time| ton| Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes

1. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
2. Pulse width £ 300 μs; duty cycle £ 2 %

TYPICAL CHARACTERISTICS

(25 °C, unless otherwise noted)

Fig. 1 – Typical Output Characteristics, TC = 25 °C

Fig. 2 – Typical Output Characteristics, TC = 150 °C

Fig. 3 – Typical Transfer Characteristics

Fig. 4 – Normalized On-Resistance vs. Temperature

Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 – Typical Source-Drain Diode Forward Voltage

Fig. 8 – Maximum Safe Operating Area

Fig. 9 – Maximum Drain Current vs. Case Temperature

Fig. 10a – Switching Time Test Circuit ****

Fig. 10b – Switching Time Waveforms

Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to- Case

Fig. 12a – Unclamped Inductive Test Circuit

Fig. 12b – Unclamped Inductive Waveforms

Fig. 12c – Maximum Avalanche Energy vs. Drain Current

Fig. 13a – Basic Gate Charge Waveform

Fig. 13b – Gate Charge Test Circuit

Peak Diode Recovery dV/dt Test Circuit

Fig. 14 – For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, seewww.vishay.com/ppg?91040.

TO-263AB (HIGH VOLTAGE)

TO-247AC 2L (HIGH VOLTAGE)

| MILLIMETERS| INCHES| | MILLIMETERS| INCHES
---|---|---|---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.| DIM.| MIN.| MAX.| MIN.| MAX.
A| 4.06| 4.83| 0.160| 0.190| D1| 6.86| –| 0.270| –
A1| 0.00| 0.25| 0.000| 0.010| E| 9.65| 10.67| 0.380| 0.420
b| 0.51| 0.99| 0.020| 0.039| E1| 6.22| –| 0.245| –
b1| 0.51| 0.89| 0.020| 0.035| e| 2.54 BSC| 0.100 BSC
b2| 1.14| 1.78| 0.045| 0.070| H| 14.61| 15.88| 0.575| 0.625
b3| 1.14| 1.73| 0.045| 0.068| L| 1.78| 2.79| 0.070| 0.110
c| 0.38| 0.74| 0.015| 0.029| L1| –| 1.65| –| 0.066
c1| 0.38| 0.58| 0.015| 0.023| L2| –| 1.78| –| 0.070
c2| 1.14| 1.65| 0.045| 0.065| L3| 0.25 BSC| 0.010 BSC
D| 8.38| 9.65| 0.330| 0.380| L4| 4.78| 5.28| 0.188| 0.208

Notes

1. Dimensioning and tolerancing per ASME 5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and
5. Dimension b1 and c1 apply to base metal
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.

TO-247AC 2L

DIMENSIONS in millimeters and inches

SYMBOL| MILLIMETERS| INCHES| NOTES| SYMBOL| MILLIMETERS| INCHES| NOTES
---|---|---|---|---|---|---|---
MIN.| MAX.| MIN.| MAX.| MIN.| MAX.| MIN.| MAX.
A| 4.65| 5.31| 0.183| 0.209| | E| 15.29| 15.87| 0.602| 0.625| 3
A1| 2.21| 2.59| 0.087| 0.102| | E1| 13.46| –| 0.53| –|
A2| 1.17| 1.37| 0.046| 0.054| | e| 5.46 BSC| 0.215 BSC|
b| 0.99| 1.40| 0.039| 0.055| | Ø K| 0.254| 0.010|
b1| 0.99| 1.35| 0.039| 0.053| | L| 14.20| 16.10| 0.559| 0.634|
b2| 1.65| 2.39| 0.065| 0.094| | L1| 3.71| 4.29| 0.146| 0.169|
b3| 1.65| 2.34| 0.065| 0.092| | Ø P| 3.56| 3.66| 0.14| 0.144|
c| 0.38| 0.89| 0.015| 0.035| | Ø P1| –| 7.39| –| 0.291|
c1| 0.38| 0.84| 0.015| 0.033| | Q| 5.31| 5.69| 0.209| 0.224|
D| 19.71| 20.70| 0.776| 0.815| 3| R| 4.52| 5.49| 0.178| 0.216|
D1| 13.08| –| 0.515| –| 4| S| 5.51 BSC| 0.217 BSC|
D2| 0.51| 1.35| 0.020| 0.053| |

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994
2. Contour of slot optional
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the outermost extremes of the plastic body
4. Thermal pad contour optional with dimensions D1 and E1
5. Lead finish uncontrolled in L1
6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154″)
7. Outline conforms to JEDEC® outline TO-247 with exception of dimension Q

For technical questions within your region: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead

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Revision: 01-Jan-2022
Document Number: 91000

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References

• Vishay Intertechnology: Passives & Discrete Semiconductors
• IRF644S, SiHF644S MOSFETs | Vishay

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