VISHAY SI4946BEY-T1-E3 Dual N-Channel 60-V D-S 175 °C MOSFET Owner’s Manual

VISHAY SI4946BEY-T1-E3 Dual N-Channel 60-V D-S 175 °C MOSFET Owner’s Manual

FEATURES

• Halogen-free According to IEC 61249-2-21 Definition
• TrenchFET® Power MOSFET
• 175 °C Maximum Junction Temperature
• 100 % Rg Tested
• Compliant to RoHS directive 2002/95/EC

PRODUCT SUMMARY

V DS (V)| R DS(on) ( W )| I D (A)| Q g (Typ.)
60| 0.041 at VGS = 10 V| 6.5| 9.2 nC
0.052 at VGS = 4.5 V| 5.8

SO-8

Top View

N-Channel MOSFET

N-Channel MOSFET

Ordering Information: Si4946BEY-T1-E3 (Lead (Pb)-free)
Si4946BEY-T1-GE3 (Lead (Pb)-free and Halogen-free)

ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted

Parameter| Symbol| Limit| Unit
Drain-Source Voltage| VDS| 60| V
Gate-Source Voltage| VGS| ± 20
Continuous Drain Current (TJ = 150 °C)| TC = 25 °C| ID| 6.5| A
TC = 70 °C| 5.5
TA = 25 °C| 5.3a, b
TA = 70 °C| 4.4a, b
Pulsed Drain Current| IDM| 30
Continuous Source Drain Diode Current| TC = 25 °C| IS| 3.1
TA = 25 °C| 2a, b
Avalanche Current| L = 0 1 mH| IAS| 12
Single-Pulse Avalanche Energy| EAS| 7.2| mJ
Maximum Power Dissipation| TC = 25 °C| PD| 3.7| W
TC = 70 °C| 2.6
TA = 25 °C| 2.4a, b
TA = 70 °C| 1.7a, b
Operating Junction and Storage Temperature Range| TJ, Tstg| – 55 to 175| °C
THERMAL RESISTANCE RATINGS
Parameter| Symbol| Typical| Maximum| Unit
Maximum Junction-to-Ambienta, c| t £ 10 s| RthJA| 50| 62.5| °C/W
Maximum Junction-to-Foot (Drain)| Steady State| RthJF| 33| 41

Notes:
a. Surface Mounted on 1″ x 1″ FR4 board.
b. t = 10 s.
c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
d. Maximum under Steady State conditions is 110 °C/W.

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

Parameter| Symbol| Test Conditions| Min.| Typ.| Max.| Unit
Static
Drain-Source Breakdown Voltage| VDS| VGS = 0 V, ID = 250 µA| 60| | | V
VDS Temperature Coefficient| DVDS/TJ| ID = 250 µA| | 53| | mV/°C
VGS(th) Temperature Coefficient| DVGS(th)/TJ| | – 6.7|
Gate-Source Threshold Voltage| VGS(th)| VDS = VGS, ID = 250 µA| 1.0| 2.4| 3.0| V
Gate-Source Leakage| IGSS| VDS = 0 V, VGS = ± 20 V| | | ± 100| nA
Zero Gate Voltage Drain Current| IDSS| VDS = 60 V, VGS = 0 V| | | 1| µA
VDS = 60 V, VGS = 0 V, TJ = 55 °C| | | 10
On-State Drain Currenta| ID(on)| VDS ³ 5 V, VGS = 10 V| 30| | | A
Drain-Source On-State Resistancea| RDS(on)| VGS = 10 V, ID = 5.3 A| | 0.033| 0.041| W
VGS = 4.5 V, ID = 4.7 A| | 0.041| 0.052
Forward Transconductancea| gfs| VDS = 15 V, ID = 5.3 A| | 24| | S
Dynamic b
Input Capacitance| Ciss| VDS = 30 V, VGS = 0 V, f = 1 MHz| | 840| | pF
Output Capacitance| Coss| | 71|
Reverse Transfer Capacitance| Crss| | 44|
Total Gate Charge| Qg| VDS = 30 V, VGS = 10 V, ID = 5.3 A| | 17| 25| nC
VDS = 30 V, VGS = 5 V, ID = 5.3 A| | 9.2| 12
Gate-Source Charge| Qgs| | 3.3|
Gate-Drain Charge| Qgd| | 3.7|
Gate Resistance| Rg| f = 1 MHz| 3.1| 6.5| 9.5| W
Turn-On Delay Time| td(on)| VDD = 30 V, RL = 6.8 WID @ 4.4 A, VGEN = 4.5 V, Rg = 1 W| | 20| 30| ns
Rise Time| tr| | 120| 180
Turn-Off Delay Time| td(off)| | 20| 30
Fall Time| tf| | 30| 45
Turn-On Delay Time| td(on)| VDD = 30 V, RL = 6.8 WID @ 4.4 A, VGEN = 10 V, Rg = 1 W| | 10| 15
Rise Time| tr| | 12| 20
Turn-Off Delay Time| td(off)| | 25| 40
Fall Time| tf| | 10| 15
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current| IS| TC = 25 °C| | | 3.1| A
Pulse Diode Forward Currenta| ISM| | | | 30
Body Diode Voltage| VSD| IS = 2 A| | 0.8| 1.2| V
Body Diode Reverse Recovery Time| trr| IF = 4.4 A, dI/dt = 100 A/µs, TJ = 25 °C| | 25| 50| ns
Body Diode Reverse Recovery Charge| Qrr| | 25| 50| nC
Reverse Recovery Fall Time| ta| | 18| | ns
Reverse Recovery Rise Time| tb| | 7|

a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

– Drain Current (A) I D

VDS – Drain-to-Source Voltage (V)
Output Characteristics

– Drain Current (A) ID

VGS – Gate-to-Source Voltage (V)
Transfer Characteristics

RDS(on) – On-Resistance (m Ω)

ID – Drain Current (A)
On-Resistance vs. Drain Current and Gate Voltage

C – Capacitance (pF)

VDS – Drain-to-Source Voltage (V)
Capacitane

VGS Gate-to-Source Voltage (V)

Qg – Total Gate Charge (nC)

Gate Charge

RDS(on) – On-Resistance (Normalized)

TJ – Junction Temperature (°C)

On-Resistance vs. Junction Temperature

– Source Current (A) IS

VSD – Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage

RDS(on) – Drain-to-Source On-Resistance ( Ω)

VGS – Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage

VGS(th) (V)

TJ – Temperature (°C)

Threshold Voltage

Power (W)

Time (s)
Single Pulse Power, Junction-to-Ambient
– Drain Current (A) I D

VDS – Drain-to-Source Voltage (V)

• VGS > minimum VGS at which RDS(on) is specified
  Safe Operating Area, Junction-to-Ambien

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

ID – Drain Current (A)

TC – Case Temperature (°C)
**Current Derating***

Power (W)

TC – Case Temperature (°C)
Power, Junction-to-Case

I C – Peak Avalanche Current (A)

TA – Time In Avalanche (s)
Single Pulse Avalanche Capability

• The power dissipation PD is based on TJ(max) = 175 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit.

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

Normalized Effective Transient Thermal Impedance

Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient

Normalized Effective Transient Thermal Impedance

Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Case

vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73411.

Package Information

SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012

ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498

Application Note 826

RECOMMENDED MINIMUM PADS FOR SO-8

Recommended Minimum Pads Dimensions in Inches/(mm)

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Revision: 01-Jan-2023 Document Number: 91000

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References

• applications.no
• Si4946BEY MOSFETs | Vishay

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