VISHAY IRFP22N60KPBF Power Mosfet Owner’s Manual

IRFP22N60KPBF Power Mosfet

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Product Specifications

Product Usage Instructions

Features:

• RoHS-compliant and non-RoHS-compliant parts information
  provided.

Benefits:

• Available in lead (Pb)-free package.

Thermal Resistance Ratings:

Static Characteristics:

• Drain-source breakdown voltage, gate-source threshold voltage,
  etc.

Dynamic Characteristics:

• Total gate charge, turn-on delay time, rise time, etc.

Frequently Asked Questions (FAQ)

Q: Is this product RoHS-compliant?

A: The datasheet provides information about both RoHS-compliant
and non-RoHS-compliant parts. Please refer to the specific details
in the datasheet.

Q: What is the maximum drain-source voltage?

A: The maximum drain-source voltage is 600V.

“`

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IRFP22N60K
Vishay Siliconix

Power MOSFET

D TO-247AC

G

S
D G

S N-Channel MOSFET

PRODUCT SUMMARY

VDS (V) RDS(on) () Qg (max.) (nC) Qgs (nC) Qgd (nC) Configuration

600 VGS = 10 V
150 45 76 Single

0.24

FEATURES

· Low gate charge Qg results in simple drive requirement

Available

· Improved gate, avalanche and dynamic dV/dt ruggedness

Available

· Fully characterized capacitance and avalanche voltage and current

· Enhanced body diode dV/dt capability

· Material categorization: for definitions of compliance please see www.vishay.com/doc?99912

Note

• This datasheet provides information about parts that are
  RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details

BENEFITS
· Hard switching primary or PFS switch · Switch mode power supply (SMPS) · Uninterruptable power supply · High speed power switching · Motor drive

ORDERING INFORMATION
Package Lead (Pb)-free

TO-247AC IRFP22N60KPbF

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

Drain-source voltage Gate-source voltage
Continuous drain current
Pulsed drain current a Linear derating factor

VDS

VGS

VGS at 10 V

TC = 25 °C TC = 100 °C

ID

IDM

Single pulse avalanche energy b Repetitive avalanche current a Repetitive avalanche energy a Maximum power dissipation Peak diode recovery dV/dt c

TC = 25 °C

EAS IAR EAR PD dV/dt

Operating junction and storage temperature range Soldering recommendations (peak temperature) d for 10 s

TJ, Tstg

Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. Starting TJ = 25 °C, L = 1.5 mH, Rg = 25 , IAS = 22 A (see fig. 12) c. ISD 22 A, dI/dt 360 A/s, VDD VDS, TJ 150 °C d. 1.6 mm from case

LIMIT 600 ± 30 22 14 88 2.9 380 22 37 370 15
-55 to +150 300

UNIT V
A
W/°C mJ A mJ W V/ns °C

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IRFP22N60K
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THERMAL RESISTANCE RATINGS

PARAMETER

SYMBOL

Maximum junction-to-ambient Case-to-sink, flat, greased surface Maximum junction-to-case (drain)

RthJA RthCS RthJC

TYP. –
0.24 –

MAX. 40 0.34

UNIT °C/W

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER

SYMBOL

TEST CONDITIONS

Static

Drain-source breakdown voltage VDS temperature coefficient Gate-source threshold voltage Gate-source leakage
Zero gate voltage drain current
Drain-source on-state resistance Forward transconductance Dynamic

VDS VDS/TJ VGS(th)
IGSS
IDSS
RDS(on) gfs

VGS = 0 V, ID = 250 A

Reference to 25 °C, ID = 1 mA d

VDS = VGS, ID = 250 A

VGS = ± 30 V

VDS = 600 V, VGS = 0 V

VDS = 480 V, VGS = 0 V, TJ = 125 °C

VGS = 10 V

ID = 13 A b

VDS = 50 V, ID = 13 A b

Input capacitance

Ciss

Output capacitance

Coss

Reverse transfer capacitance

Crss

Output capacitance

Coss

Effective output capacitance Total gate charge Gate-source charge Gate-drain charge Turn-on delay time Rise time Turn-off delay time Fall time Drain-Source Body Diode Characteristics

Coss eff. Qg Qgs Qgd td(on) tr td(off) tf

VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5

VGS = 0 V

VDS = 1.0 V, f = 1.0 MHz VDS = 480 V, f = 1.0 MHz VDS = 0 V to 480 V

VGS = 10 V

ID = 22 A, VDS = 480 V see fig. 6 and 13 b

VDD = 300 V, ID = 22 A, Rg = 6.2, VGS = 10 V, see fig. 10 b

Continuous source-drain diode current Pulsed diode forward current a

IS

MOSFET symbol

showing the

ISM

integral reverse p – n junction diode

D
G S

MIN.
600 –
3.0 11
–
–
–

TYP. MAX. UNIT

0.30
0.240 –

5.0 ± 100 50 250 0.280 –

V V/°C
V nA
A
S

3570

–

350

–

36

–

pF

4710

–

92

–

180

–

–

150

–

45

nC

–

76

26

–

99

–

ns

48

–

37

–

–

22

A

–

88

Body diode voltage

VSD

TJ = 25 °C, IS = 22 A, VGS = 0 V b

–

–

1.5

V

Body diode reverse recovery time Body diode reverse recovery charge Reverse recovery current

trr Qrr IRRM

TJ = 25 °C TJ = 125 °C TJ = 25 °C TJ =1 25 °C TJ = 25 °C

IF = 22 A, dI/dt = 100 A/s b

–

590 890

ns

–

670 1010

–

7.2

11

C

–

8.5

13

–

26

39

Forward turn-on time

ton

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. Pulse width 300 s; duty cycle 2 % c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS

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www.vishay.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

IRFP22N60K
Vishay Siliconix

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

100 VGS

TOP

15V

12V

10V

10

8.0V

7.0V

6.0V

5.5V

BOTTOM 5.0V

1

0.1 5.0V

0.01

0.001 0.1

20µs PULSE WIDTH Tj = 25°C

1

10

100

VDS, Drain-to-Source Voltage (V)

Fig. 1 – Typical Output Characteristics

100 VGS

TOP 15V

12V

10V

8.0V

7.0V

6.0V

10

5.5V

BOTTOM 5.0V

5.0V 1

0.1 0.1

20µs PULSE WIDTH Tj = 150°C

1

10

100

VDS, Drain-to-Source Voltage (V)

Fig. 2 – Typical Output Characteristics

100.00

10.00

TJ = 150°C

1.00 TJ = 25°C

0.10

0.01 5.0

VDS = 50V 20µs PULSE WIDTH

6.0

7.0

8.0

9.0

10.0

VGS , Gate-to-Source Voltage (V)

Fig. 3 – Typical Transfer Characteristics

Resistance

Drain-to-Source On (Normalized)

3.0 ID = 22A
2.5
2.0
1.5
1.0
0.5 V GS = 10V
0.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 TJ, Junction Temperature (° C)
Fig. 4 – Normalized On-Resistance vs. Temperature

rDS(on),

100000 10000

VGS = 0V, f = 1 MHZ C iss = C gs + C gd , C ds SHORTED
Crss = Cgd Coss = Cds + Cgd
Ci s s

C, Capacitance (pF)

1000

Coss 100

Crss

10 1

10

100

1000

VDS, Drain-to-Source Voltage (V)

Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage

VGS, Gate-to-Source Voltage (V)

20 ID= 22A
16
12

VDS= 480V VDS= 300V VDS= 120V

8

4

0

0

40

80

120

160

QG Total Gate Charge (nC)

Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage

ID, Drain-to-Source Current (A)

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100.0

10.0

TJ = 150°C

ISD, Reverse Drain Current (A)

1.0 TJ = 25°C

VGS = 0V 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 VSD, Source-toDrain Voltage (V)
Fig. 7 – Typical Source-Drain Diode Forward Voltage

1000 100

OPERATION IN THIS AREA LIMITED BY RDS(on)

ID, Drain-to-Source Current (A)

10

100µsec

1msec 1

Tc = 25°C Tj = 150°C

Single Pulse 0.1

1

10

10msec

100

1000 10000

VDS , Drain-toSource Voltage (V)

Fig. 8 – Maximum Safe Operating Area

1

IRFP22N60K
Vishay Siliconix

25

20

ID, Drain Current (A)

15

10

5

0

25

50

75

100

125

150

TC, Case Temperature (° C)

Fig. 9 – Maximum Drain Current vs. Case Temperature

VDS VGS RG

RD D.U.T.

10 V
Pulse width 1 µs Duty factor 0.1 %

+- VDD

Fig. 10a – Switching Time Test Circuit

VDS 90 %

10 % VGS

td(on) tr

td(off) tf

Fig. 10b – Switching Time Waveforms

Thermal Response (ZthJC)

D = 0.50 0.1
0.20 0.10 0.05 0.02 0.01 0.01
0.001 0.00001

SINGLE PULSE (THERMAL RESPONSE)

P DM t1 t2

0.0001

Notes:

1. Duty factor D =

t1/ t 2

2. Peak T J = P DM x Z thJC + T C

0.001

0.01

0.1

1

t1, Rectangular Pulse Duration (sec)

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IRFP22N60K
Vishay Siliconix

Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case

15 V

VDS

L

Driver

RG
20 V tp

D.U.T IAS
0.01

–

VDD A

Fig. 12a – Unclamped Inductive Test Circuit

800

600

VDS tp

IAS

Fig. 12b – Unclamped Inductive Waveforms

TOP BOTTOM

ID 9.8A 14A 22A

EAS, Single Pulse Avalanche Energy (mJ)

400

200

0

25

50

75

100

125

150

Starting TJ, Junction Temperature

Fig. 12c – Maximum Avalanche Energy vs. Drain Current

10 V QGS
VG

QG QGD

Charge

Fig. 13a – Basic Gate Charge Waveform

Current regulator Same type as D.U.T.

12 V

50 k

0.2 µF

0.3 µF

+ D.U.T. – VDS

VGS

3 mA

IG

ID

Current sampling resistors

Fig. 13b – Gate Charge Test Circuit

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D.U.T.
+ –

Peak Diode Recovery dV/dt Test Circuit

Circuit layout considerations

· Low stray inductance

· Ground plane

· Low leakage inductance

current transformer

–

–

IRFP22N60K
Vishay Siliconix

Rg

· dV/dt controlled by Rg

· Driver same type as D.U.T. · ISD controlled by duty factor “D”

– VDD

· D.U.T. – device under test

Driver gate drive

P.W.

Period

D =

P.W. Period

VGS = 10 Va

D.U.T. lSD waveform

Reverse

recovery current

Body diode forward current dI/dt

D.U.T. VDS waveform

Diode recovery

dV/dt VDD

Re-applied voltage

Body diode forward drop Inductor current

Ripple 5 %

ISD

Note a. VGS = 5 V for logic level devices

Fig. 14 – For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91208.

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Package Information
Vishay Siliconix

TO-247AC (High Voltage)

VERSION 1: FACILITY CODE = 9

DIM. A A1 A2 b b1 b2 b3 b4 b5 c c1 D

MILLIMETERS

MIN.

NOM.

4.83

5.02

2.29

2.41

1.17

1.27

1.12

1.20

1.12

1.20

1.91

2.00

1.91

2.00

2.87

3.00

2.87

3.00

0.40

0.50

0.40

0.50

20.40

20.55

MAX. 5.21 2.55 1.37 1.33 1.28 2.39 2.34 3.22 3.18 0.60 0.56 20.70

NOTES
6 6, 8
6 4

DIM. D1 D2 E E1 E2 e L L1 Ø P Ø P1 Q S

MIN. 16.46 0.56 15.50 13.46 4.52
14.90 3.96 3.56
5.31

MILLIMETERS NOM. 16.76 0.66 15.70 14.02 4.91
5.46 BSC 15.15 4.06 3.61 7.19 ref. 5.50
5.51 BSC

MAX. 17.06 0.76 15.87 14.16 5.49
15.40 4.16 3.65
5.69

NOTES 5
4 5 3
6 7

Notes
(1) Package reference: JEDEC® TO247, variation AC (2) All dimensions are in mm (3) Slot required, notch may be rounded (4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the
outermost extremes of the plastic body (5) Thermal pad contour optional with dimensions D1 and E1 (6) Lead finish uncontrolled in L1 (7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm (8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4
dimension at maximum material condition

Revision: 31-Oct-2022

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VERSION 2: FACILITY CODE = Y

B 3 R/2
Q

4 E
E/2 S

2 x R

(2)

D

12

3

5 L1

C

L

2 x b2

3 x b

2x e

b4

0.10 M C A M

Lead Assignments 1. Gate 2. Drain 3. Source 4. Drain

See view B

Package Information
Vishay Siliconix

A A2 A
4
D

A 7 ØP Ø k M DBM
D2

(Datum B) ØP1
4 D1

4 Thermal pad

A C A1
D DE E CC
View B

Planting

4 E1 0.01 M D B M View A – A
(b1, b3, b5)

Base metal

(c)

c1

(b, b2, b4) (4)
Section C – C, D – D, E – E

DIM. A A1 A2 b b1 b2 b3 b4 b5 c c1 D D1

MILLIMETERS

MIN.

MAX.

4.58

5.31

2.21

2.59

1.17

2.49

0.99

1.40

0.99

1.35

1.53

2.39

1.65

2.37

2.42

3.43

2.59

3.38

0.38

0.86

0.38

0.76

19.71

20.82

13.08

–

NOTES

DIM. D2 E E1 e Ø k L L1 Ø P Ø P1 Q R S

MILLIMETERS

MIN.

MAX.

0.51

1.30

15.29

15.87

13.72

–

5.46 BSC

0.254

14.20

16.25

3.71

4.29

3.51

3.66

–

7.39

5.31

5.69

4.52

5.49

5.51 BSC

NOTES

Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Contour of slot optional (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at
the outermost extremes of the plastic body (4) Thermal pad contour optional with dimensions D1 and E1 (5) Lead finish uncontrolled in L1 (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154″) (7) Outline conforms to JEDEC outline TO-247 with exception of dimension c

Revision: 31-Oct-2022

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VERSION 3: FACILITY CODE = N

B R/2

E N

Q

R

S

D

Package Information
Vishay Siliconix

D2

A

A P1

P

A2

D

c1 D1

K M DBM

L1

C

b2 b

b4 e

0.10 M C A M

L

C A1
Base metal

E1 0.01 M D B M
b1, b3, b5

c

Plating

b, b2, b4

MILLIMETERS

MILLIMETERS

DIM.

MIN.

A

4.65

A1

2.21

A2

1.17

b

0.99

b1

0.99

b2

1.65

b3

1.65

b4

2.59

b5

2.59

c

0.38

c1

0.38

D

19.71

D1

13.08

ECN: E22-0452-Rev. G, 31-Oct-2022 DWG: 5971

MAX. 5.31 2.59 1.37 1.40 1.35 2.39 2.34 3.43 3.38 0.89 0.84 20.70
–

DIM. D2 E E1 e k L L1 N P P1 Q R S

MIN. 0.51 15.29 13.46
14.20 3.71
3.56 –
5.31 4.52

5.46 BSC 0.254
7.62 BSC
5.51 BSC

MAX. 1.35 15.87
–
16.10 4.29
3.66 7.39 5.69 5.49

Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994 (2) Contour of slot optional (3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at
the outermost extremes of the plastic body (4) Thermal pad contour optional with dimensions D1 and E1 (5) Lead finish uncontrolled in L1 (6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154″)

Revision: 31-Oct-2022

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Disclaimer

Legal Disclaimer Notice
Vishay

ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non- infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and / or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein.
Hyperlinks included in this datasheet may direct users to third-party websites. These links are provided as a convenience and for informational purposes only. Inclusion of these hyperlinks does not constitute an endorsement or an approval by Vishay of any of the products, services or opinions of the corporation, organization or individual associated with the third-party website. Vishay disclaims any and all liability and bears no responsibility for the accuracy, legality or content of the third-party website or for that of subsequent links.
Vishay products are not designed for use in life-saving or life-sustaining applications or any application in which the failure of the Vishay product could result in personal injury or death unless specifically qualified in writing by Vishay. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications.
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© 2024 VISHAY INTERTECHNOLOGY, INC. ALL RIGHTS RESERVED

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References

• Vishay Intertechnology: Passives & Discrete Semiconductors

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