VISHAY IRF640S Power Mosfet Instruction Manual
- June 1, 2024
- VISHAY
Table of Contents
VISHAY IRF640S Power Mosfet
Specifications
- Brand: Vishay Siliconix
- Model: IRF640S, SiHF640S, SiHF640L
- Type: Power MOSFET
- Configuration: Single
- Drain-Source Voltage (VDS): 200V
- RDS(on): 70 ()
- Maximum Gate Charge (Qg max.): 13nC
- Gates to Source Charge (Qgs): 39nC
- Gate to Drain Charge (Qgd): 0.18nC
- Package: D2PAK (TO-263), I2PAK (TO-262)
Description
The Vishay Siliconix IRF640S, SiHF640S, SiHF640L are N-Channel MOSFETs
designed for high power applications. They are available in lead (Pb)-free
and halogen-free packages.
Ordering Information
- D2PAK (TO-263) SiHF640S-GE3 IRF640SPbF
- D2PAK (TO-263) SiHF640STRL-GE3 IRF640STRLPbF
- D2PAK (TO-263) SiHF640STRR-GE3 IRF640STRRPbF
- I2PAK (TO-262) SiHF640L-GE3
Thermal Resistance Ratings
- Maximum Junction-to-Ambient: 40°C/W (PCB mounted, steady-state)
- Maximum Junction-to-Case: 1.0°C/W (Drain)
Power MOSFET
PRODUCT SUMMARY
VDS (V)| 200
RDS(on) (W)| VGS = 10 V| 0.18
Qg max. (nC)| 70
Qgs (nC)| 13
Qgd (nC)| 39
Configuration| Single
FEATURES
- Surface mount
- Low-profile through-hole
- Available in tape and reel
- Dynamic dV/dt rating
- 150 °C operating temperature
- Fast switching
- Fully avalanche rated
Material categorization: for definitions of compliance please see www.vishay.com/doc?99912
Note
- This datasheet provides information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details.
DESCRIPTION
Third generation power MOSFETs from Vishay provide the designer with the best
combinations of fast switching, ruggedized device design, low on-resistance
and cost-effectiveness.
The D2PAK is a surface mount power package capable of accommodating die size
up to HEX-4. It provides the highest power capability and the last lowest
possible on-resistance in any existing surface mount package. The D2PAK is
suitable for high current applications because of its low internal connection
resistance and can dissipate up to 2.0 W in a typical surface mount
application. The through-hole version (SiHF640L) is available for low-profile
applications.
ORDERING INFORMATION
Package| D2PAK (TO-263)| D2PAK (TO-263)| D2PAK (TO-263)| I2PAK (TO-262)
Lead (Pb)-free and Halogen-free| SiHF640S-GE3| SiHF640STRL-GE3 a| SiHF640STRR-
GE3 a| SiHF640L-GE3
Lead (Pb)-free| IRF640SPbF| IRF640STRLPbF a| IRF640STRRPbF a| –
Note
- See device orientation.
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER| SYMBOL| LIMIT| UNIT
Drain-Source Voltage| VDS| 200| V
Gate-Source Voltage| VGS| ± 20
Continuous Drain Current| VGS at 10 V| TC = 25 °C| ID| 18|
A
TC = 100 °C| 11
Pulsed Drain Current a, e| IDM| 72
Linear Derating Factor| | 1.0| W/°C
Single Pulse Avalanche Energy b, e| EAS| 580| mJ
Avalanche Current a| IAR| 18| A
Repetitive Avalanche Energy a| EAR| 13| mJ
Maximum Power Dissipation| TC = 25 °C| PD| 130| W
TA = 25 °C| 3.1
Peak Diode Recovery dV/dt c, e| dV/dt| 5.0| V/ns
Operating Junction and Storage Temperature Range| TJ, Tstg| -55 to +150| °C
Soldering Recommendations (Peak temperature) d| for 10 s| | 300
Notes
- Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
- VDD = 50 V, starting TJ = 25 °C, L = 2.7 mH, Rg = 25 , IAS = 18 A (see fig. 12).
- ISD 18 A, dI/dt 150 A/μs, VDD VDS, TJ 150 °C. d. 1.6 mm from case.
- Uses IRF640, SiHF640 data and test conditions.
THERMAL RESISTANCE RATINGS
PARAMETER| SYMBOL| TYP.| MAX.| UNIT
Maximum Junction-to-Ambient (PCB mounted, steady-state) a| RthJA| –| 40|
°C/W
Maximum Junction-to-Case (Drain)| RthJC| –| 1.0
Note
- When mounted on 1″ square PCB (FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER| SYMBOL| TEST CONDITIONS| MIN.| TYP.|
MAX.| UNIT
Static
Drain-Source Breakdown Voltage| VDS| VGS = 0 V, ID = 250 μA| 200| –| –| V
VDS Temperature Coefficient| DVDS/TJ| Reference to 25 °C, ID = 1 mA c| –|
0.29| –| V/°C
Gate-Source Threshold Voltage| VGS(th)| VDS = VGS, ID = 250 μA| 2.0| –| 4.0| V
Gate-Source Leakage| IGSS| VGS = ± 20 V| –| –| ± 100| nA
Zero Gate Voltage Drain Current| IDSS| VDS = 200 V, VGS = 0 V| –| –| 25| μA
VDS = 160 V, VGS = 0 V, TJ = 125 °C| –| –| 250
Drain-Source On-State Resistance| RDS(on)| VGS = 10 V| ID = 11 A b| –| –|
0.18| W
Forward Transconductance| gfs| VDS = 50 V, ID = 11 A d| 6.7| –| –| S
Dynamic
Input Capacitance| Ciss| VGS = 0 V, VDS = 25 V,
f = 1.0 MHz, see fig. 5 d
| –| 1300| –|
pF
Output Capacitance| Coss| –| 430| –
Reverse Transfer Capacitance| Crss| –| 130| –
Total Gate Charge| Qg|
VGS = 10 V
|
ID = 18 A, VDS = 160 V,
see fig. 6 and 13 b, c
| –| –| 70|
nC
Gate-Source Charge| Qgs| –| –| 13
Gate-Drain Charge| Qgd| –| –| 39
Turn-On Delay Time| td(on)|
VDD = 100 V, ID = 18 A,
Rg = 9.1 W, RD = 5.4 W, see fig. 10 b, c
| –| 14| –|
ns
Rise Time| tr| –| 51| –
Turn-Off Delay Time| td(off)| –| 45| –
Fall Time| tf| –| 36| –
Gate Input Resistance| Rg| f = 1 MHz, open drain| 0.5| –| 3.6| W
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current| IS| MOSFET symbol
showing the
integral reverse
p – n junction diode
S
| –| –| 18|
A
Pulsed Diode Forward Current a| ISM| –| –| 72
Body Diode Voltage| VSD| TJ = 25 °C, IS = 18 A, VGS = 0 V b| –| –| 2.0| V
Body Diode Reverse Recovery Time| trr| TJ = 25 °C, IF = 18 A, dI/dt = 100 A/μs
b, c| –| 300| 610| ns
Body Diode Reverse Recovery Charge| Qrr| –| 3.4| 7.1| μC
Forward Turn-On Time| ton| Intrinsic turn-on time is negligible (turn-on is
dominated by LS and LD)
Notes
- Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
- Pulse width 300 μs; duty cycle 2 %.
- Uses IRF640/SiHF640 data and test conditions.
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Peak Diode Recovery dV/dt Test Circuit 
Vishay Siliconix maintains worldwide manufacturing capability. Products may be
manufactured at one of several qualified locations. Reliability data for
Silicon Technology and Package Reliability represent a composite of all
qualified locations. For related documents such as package/tape drawings, part
marking, and reliability data, see
http://www.vishay.com/ppg?91037
TO-263AB (HIGH VOLTAGE) 
| MILLIMETERS| INCHES| | | MILLIMETERS| INCHES
---|---|---|---|---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.| DIM.| MIN.|
MAX.| MIN.| MAX.
A| 4.06| 4.83| 0.160| 0.190| D1| 6.86| –| 0.270| –
A1| 0.00| 0.25| 0.000| 0.010| E| 9.65| 10.67| 0.380| 0.420
b| 0.51| 0.99| 0.020| 0.039| E1| 6.22| –| 0.245| –
b1| 0.51| 0.89| 0.020| 0.035| e| 2.54 BSC| 0.100 BSC
b2| 1.14| 1.78| 0.045| 0.070| H| 14.61| 15.88| 0.575| 0.625
b3| 1.14| 1.73| 0.045| 0.068| L| 1.78| 2.79| 0.070| 0.110
c| 0.38| 0.74| 0.015| 0.029| L1| –| 1.65| –| 0.066
c1| 0.38| 0.58| 0.015| 0.023| L2| –| 1.78| –| 0.070
c2| 1.14| 1.65| 0.045| 0.065| L3| 0.25 BSC| 0.010 BSC
D| 8.38| 9.65| 0.330| 0.380| L4| 4.78| 5.28| 0.188| 0.208
ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970
Notes
- Dimensioning and tolerancing per ASME Y14.5M-1994.
- Dimensions are shown in millimeters (inches).
- Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005″) per side. These dimensions are measured at the outmost extremes of the plastic body at datum A.
- Thermal PAD contour optional within dimension E, L1, D1 and E1.
- Dimension b1 and c1 apply to base metal only.
- Datum A and B to be determined at datum plane H.
- Outline conforms to JEDEC outline to TO-263AB.
I2PAK (TO-262) (HIGH VOLTAGE)
| MILLIMETERS| INCHES| | | MILLIMETERS| INCHES
---|---|---|---|---|---|---
DIM.| MIN.| MAX.| MIN.| MAX.| DIM.| MIN.|
MAX.| MIN.| MAX.
A| 4.06| 4.83| 0.160| 0.190| D| 8.38| 9.65| 0.330| 0.380
A1| 2.03| 3.02| 0.080| 0.119| D1| 6.86| –| 0.270| –
b| 0.51| 0.99| 0.020| 0.039| E| 9.65| 10.67| 0.380| 0.420
b1| 0.51| 0.89| 0.020| 0.035| E1| 6.22| –| 0.245| –
b2| 1.14| 1.78| 0.045| 0.070| e| 2.54 BSC| 0.100 BSC
b3| 1.14| 1.73| 0.045| 0.068| L| 13.46| 14.10| 0.530| 0.555
c| 0.38| 0.74| 0.015| 0.029| L1| –| 1.65| –| 0.065
c1| 0.38| 0.58| 0.015| 0.023| L2| 3.56| 3.71| 0.140| 0.146
c2| 1.14| 1.65| 0.045| 0.065|
ECN: S-82442-Rev. A, 27-Oct-08 DWG: 5977
Notes
- Dimensioning and tolerancing per ASME Y14.5M-1994.
- Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost extremes of the plastic body.
- Thermal pad contour optional within dimension E, L1, D1, and E1.
- Dimension b1 and c1 apply to base metal only.
RECOMMENDED MINIMUM PADS FOR D2PAK: 3-Lead
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References
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