VISHAY IRF9630 Power MOSFET Instruction Manual Product Information
- January 10, 2024
- VISHAY
Table of Contents
- IRF9630 Power MOSFET
- Product Information
- Specifications
- Description
- Ordering Information
- Thermal Resistance Ratings
- Product Usage Instructions
- Connection Diagram
- Pin Description
- Usage Steps
- Q: What is the maximum drain-source voltage (VDS) of the
- Q: What is the maximum drain-source on-resistance (RDS(on)) of
- Q: What is the maximum gate charge (Qg) of the IRF9630
- Q: What is the gate-source charge (Qgs) of the IRF9630
- Q: What is the gate-drain charge (Qgd) of the IRF9630
IRF9630 Power MOSFET
Product Information
Specifications
- Brand: Vishay Siliconix
- Model: IRF9630
- Package Type: TO-220AB
- Configuration: Single P-Channel MOSFET
- Maximum Drain-Source Voltage (VDS): -200 V
- Maximum Drain-Source On-Resistance (RDS(on)): 5.4 Ω
- Maximum Gate Charge (Qg): 15 nC
- Gate-Source Charge (Qgs): 5.4 nC
- Gate-Drain Charge (Qgd): 15 nC
Description
The Vishay Siliconix IRF9630 is a third generation power MOSFET
that offers fast switching, ruggedized device design, low
on-resistance, and cost-effectiveness. It is designed for use in
various commercial-industrial applications with power dissipation
levels up to approximately 50 W. The TO-220AB package is widely
preferred in the industry due to its low thermal resistance and
cost-effectiveness.
Ordering Information
To order the IRF9630 MOSFET, you can choose between the
following options:
- Package Type: TO-220AB
- Lead (Pb)-free: IRF9630PbF
- Lead (Pb)-free and halogen-free: IRF9630PbF-BE3
Thermal Resistance Ratings
- Maximum Junction-to-Ambient: Not specified
- Case-to-Sink, Flat, Greased Surface: 0.50 °C/W
- Maximum Junction-to-Case (Drain): 1.7 °C/W
Product Usage Instructions
Connection Diagram
The IRF9630 MOSFET has three terminals: Source (S), Drain (D),
and Gate (G). The connection diagram is as follows:
+---+
| |
S ----| |
D ----| |
G ----| |
| |
+---+
Pin Description
- Source (S): Connected to the source of the MOSFET.
- Drain (D): Connected to the drain of the MOSFET.
- Gate (G): Connected to the gate of the MOSFET.
Usage Steps
-
Identify the Source (S), Drain (D), and Gate (G) pins on the
IRF9630 MOSFET. -
Connect the Source pin to the source terminal of your
circuit. -
Connect the Drain pin to the drain terminal of your
circuit. -
Connect the Gate pin to the gate terminal of your circuit.
-
Ensure proper electrical insulation and connections for safe
operation.
Frequently Asked Questions (FAQ)
Q: What is the maximum drain-source voltage (VDS) of the
IRF9630 MOSFET?
A: The maximum drain-source voltage is -200 V.
Q: What is the maximum drain-source on-resistance (RDS(on)) of
the IRF9630 MOSFET?
A: The maximum drain-source on-resistance is 5.4 Ω.
Q: What is the maximum gate charge (Qg) of the IRF9630
MOSFET?
A: The maximum gate charge is 15 nC.
Q: What is the gate-source charge (Qgs) of the IRF9630
MOSFET?
A: The gate-source charge is 5.4 nC.
Q: What is the gate-drain charge (Qgd) of the IRF9630
MOSFET?
A: The gate-drain charge is 15 nC.
www.vishay.com
IRF9630
Vishay Siliconix
Power MOSFET
TO-220AB
S G
S D G
D P-Channel MOSFET
PRODUCT SUMMARY
VDS (V) RDS(on) max. () Qg max. (nC) Qgs (nC) Qgd (nC) Configuration
-200 VGS = -10 V
29 5.4 15 Single
0.80
FEATURES
· Dynamic dV/dt rating
· Repetitive avalanche rated
Available
· P-channel · Fast switching
Available
· Ease of paralleling
· Simple drive requirements
· Material categorization: for definitions of compliance please see www.vishay.com/doc?99912
Note
- This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details
DESCRIPTION
Third generation power MOSFETs from Vishay provide the designer with the best
combination of fast switching, ruggedized device design, low on-resistance and
cost-effectiveness.
The TO-220AB package is universally preferred for all commercial-industrial
applications at power dissipation levels to approximately 50 W. The low
thermal resistance and low package cost of the TO-220AB contribute to its wide
acceptance throughout the industry.
ORDERING INFORMATION
Package Lead (Pb)-free Lead (Pb)-free and halogen-free
TO-220AB IRF9630PbF IRF9630PbF-BE3
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-source voltage Gate-source voltage
Continuous drain current
Pulsed drain current a Linear derating factor
VDS
VGS
VGS at 10 V
TC = 25 °C TC = 100 °C
ID
IDM
Single pulse avalanche energy b Repetitive avalanche current a Repetitive avalanche energy a Maximum power dissipation Peak diode recovery dV/dt c
TC = 25 °C
EAS IAR EAR PD dV/dt
Operating junction and storage temperature range Soldering recommendations (peak temperature) d
For 10 s
TJ, Tstg
Mounting torque
6-32 or M3 screw
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see
fig. 11) b. VDD = -50 V, starting TJ = 25 °C, L = 17 mH, Rg = 25 , IAS = -6.5
A (see fig. 12) c. ISD -6.5 A, dI/dt 120 A/s, VDD VDS, TJ 150 °C d. 1.6 mm
from case
LIMIT -200 ± 20 -6.5 -4.0 -26 0.59 500 -6.4 7.4 74 -5.0 -55 to +150 300 10 1.1
UNIT V
A
W/°C mJ A mJ W V/ns °C
lbf · in N · m
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IRF9630
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
Maximum junction-to-ambient Case-to-sink, flat, greased surface Maximum junction-to-case (drain)
RthJA RthCS RthJC
TYP. –
0.50 –
MAX. 62 1.7
UNIT °C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN. TYP. MAX. UNIT
Static Drain-source breakdown voltage VDS temperature coefficient Gate-source
threshold voltage Gate-source leakage
Zero gate voltage drain current
Drain-source on-state resistance Forward transconductance Dynamic Input
capacitance Output capacitance Reverse transfer capacitance Total gate charge
Gate-source charge Gate-drain charge Turn-on delay time Rise time Turn-off
delay time Fall time
VDS VDS/TJ VGS(th)
IGSS
IDSS
RDS(on) gfs
Ciss Coss Crss Qg Qgs Qgd td(on)
tr td(off)
tf
VGS = 0 V, ID = -250 A
Reference to 25 °C, ID = -1 mA
VDS = VGS, ID = -250 A
VGS = ± 20 V
VDS = -200 V, VGS = 0 V
VDS = -160 V, VGS = 0 V, TJ = 125 °C
VGS = -10 V
ID = -3.9 A b
VDS = -50 V, ID = -3.9 A b
VGS = 0 V, VDS = -25 V, f = 1.0 MHz, see fig. 5
VGS = -10 V
ID = -6.5 A, VDS = -160 V, see fig. 6 and 13 b
VDD = -100 V, ID = -6.5 A, Rg = 12 , RD = 15 , see fig. 10 b
-200 –
-2.0 2.8
-0.24
–
-4.0 ± 100 -100 -500 0.80 –
V V/°C
V nA
A
S
–
700
–
–
200
–
pF
–
40
–
–
–
29
–
–
5.4
nC
–
–
15
–
12
–
–
27
–
ns
–
28
–
–
24
–
Gate input resistance Internal drain inductance
LD
Between lead, 6 mm (0.25″) from
D
package and center of
G
LS
die contact
S
–
4.5
–
nH
–
7.5
–
Internal source inductance
Rg
Drain-Source Body Diode Characteristics
Continuous source-drain diode current
IS
Pulsed diode forward current a
ISM
f = 1 MHz, open drain
MOSFET symbol
showing the integral reverse p -n junction diode
D
G S
0.6
–
3.7
–
–
-6.5
A
–
–
-26
Body diode voltage
VSD
TJ = 25 °C, IS = -6.5 A, VGS = 0 V b
–
–
-6.5
V
Body diode reverse recovery time Body diode reverse recovery charge
trr Qrr
TJ = 25 °C, IF = -6.5 A, dI/dt = 100 A/s b
–
200
300
ns
1.9
2.9
C
Forward turn-on time
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. Pulse width 300 s; duty cycle 2 %
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www.vishay.com TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
IRF9630
Vishay Siliconix
RDS(on), Drain-to-Source On Resistance (Normalized)
– ID, Drain Current (A)
VGS
Top – 15 V
– 10 V
101
– 8.0 V
– 7.0 V
– 6.0 V
– 5.5 V
– 5.0 V
Bottom – 4.5 V
100
– 4.5 V
10-1 10-1
91084_01
20 µs Pulse Width TC = 25 °C
100
101
– VDS, Drain-to-Source Voltage (V)
Fig. 1 – Typical Output Characteristics, TC = 25 °C
VGS Top – 15 V
101
– 10 V
– 8.0 V
– 7.0 V
– 6.0 V
– 5.5 V
– 5.0 V
100 Bottom – 4.5 V
– 4.5 V
– ID, Drain Current (A)
10-1 10-1
20 µs Pulse Width TC = 150 °C
100
101
91084_02
– VDS, Drain-to-Source Voltage (V)
Fig. 2 – Typical Output Characteristics, TC = 150 °C
101 25 °C
150 °C
– ID, Drain Current (A)
100
4
91084_03
20 µs Pulse Width VDS = – 50 V
5
6
7
8
9
10
– VGS, Gate-to-Source Voltage (V)
Fig. 3 – Typical Transfer Characteristics
3.0 ID = – 6.5 A
2.5 VGS = – 10 V
2.0
1.5
1.0
0.5
0.0 – 60 – 40 – 20 0 20 40 60 80 100 120 140 160
91084_04
TJ, Junction Temperature (°C)
Fig. 4 – Normalized On-Resistance vs. Temperature
1200 1000
800 600
VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd
Ciss
Capacitance (pF)
400
200
0 100
91084_05
Coss Crss
101 – VDS, Drain-to-Source Voltage (V)
Fig. 5 – Typical Capacitance vs. Drain-to-Source Voltage
– VGS, Gate-to-Source Voltage (V)
20 ID = – 6.5 A
16
VDS = – 160 V VDS = – 100 V
12
VDS = – 40 V
8
4
0 0
91084_06
For test circuit see figure 13
5
10
15
20
25
30
QG, Total Gate Charge (nC)
Fig. 6 – Typical Gate Charge vs. Gate-to-Source Voltage
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– ISD, Reverse Drain Current (A)
101
150 °C
25 °C
100
10-1 0.5
91084_07
VGS = 0 V
1.5
2.5
3.5
4.5
– VSD, Source-to-Drain Voltage (V)
Fig. 7 – Typical Source-Drain Diode Forward Voltage
– ID, Drain Current (A)
103
5
2
102
5
2
10
5
2
1
5
2
0.1 0.1 2
Operation in this area limited by RDS(on)
10 µs 100 µs 1 ms
TC = 25 °C TJ = 150 °C Single Pulse
10 ms
5 1 2 5 10 2 5 102 2 5 103
91084_08
– VDS, Drain-to-Source Voltage (V)
Fig. 8 – Maximum Safe Operating Area
10
IRF9630
Vishay Siliconix
7.0
6.0
– ID, Drain Current (A)
5.0
4.0
3.0
2.0
1.0
0.0 25
91084_09
50
75
100
125
150
TC, Case Temperature (°C)
Fig. 9 – Maximum Drain Current vs. Case Temperature
VDS VGS RG
RD D.U.T.
– 10 V
Pulse width 1 µs Duty factor 0.1 %
+- VDD
Fig. 10a – Switching Time Test Circuit
VGS 10 %
td(on) tr
td(off) tf
90 % VDS
Fig. 10b – Switching Time Waveforms
Thermal Response (ZthJC)
1 D = 0.5
0.2 0.1 0.1 0.05 0.02 0.01
10-2 10-5
91084_11
Single Pulse (Thermal Response)
10-4
10-3
10-2
0.1
t1, Rectangular Pulse Duration (s)
PDM
t1 t2
Notes:
1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC
1
10
Fig. 11 – Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRF9630
Vishay Siliconix
VDS Vary tp to obtain required IAS
RG
– 10 V tp
L
D.U.T IAS
0.01 A
+- VDD
Fig. 12a – Unclamped Inductive Test Circuit
IAS
VDS
VDD tp
VDS Fig. 12b – Unclamped Inductive Waveforms
EAS, Single Pulse Energy (mJ)
1200 1000
800
ID Top – 2.9 A
– 4.1 A Bottom – 6.5 A
600 400
200
VDD = – 50 V 0
25
50
75
100
125
150
91084_12c
Starting TJ, Junction Temperature (°C)
Fig. 12c – Maximum Avalanche Energy vs. Drain Current
Current regulator Same type as D.U.T.
– 10 V QGS
VG
QG QGD
Charge
Fig. 13a – Basic Gate Charge Waveform
12 V
50 k
0.2 µF
0.3 µF
D.U.T. + VDS
VGS
– 3 mA
IG
ID
Current sampling resistors
Fig. 13c – Gate Charge Test Circuit
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D.U.T.
+ –
Peak Diode Recovery dV/dt Test Circuit
+ Circuit layout considerations · Low stray inductance · Ground plane · Low
leakage inductance current transformer
–
IRF9630
Vishay Siliconix
–
Rg
· dV/dt controlled by Rg
· ISD controlled by duty factor “D” · D.U.T. – device under test
– VDD
Note · Compliment N-Channel of D.U.T. for driver
Driver gate drive
P.W.
Period
D =
P.W. Period
VGS = – 10 Va
D.U.T. lSD waveform
Reverse
recovery
Body diode forward
current
D.U.T. VDS waveform
current dI/dt
Diode recovery
dV/dt VDD
Re-applied voltage
Body diode forward drop Inductor current
Ripple 5 %
ISD
Note a. VGS = – 5 V for logic level and – 3 V drive devices
Fig. 14 – For P-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91084.
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