GOWIN FP Div IP Software User Guide

June 1, 2024
GOWIN

FP Div IP Software

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Specifications

  • Product Name: Gowin FP Div IP
  • Trademark: Guangdong Gowin Semiconductor Corporation
  • Registered: China, U.S. Patent and Trademark Office, and other
    countries

Product Usage Instructions

About This Guide

Purpose: The Gowin FP Div IP User Guide aims to
provide information on the features and usage of the product,
including functions, ports, timing, GUI, and reference design.

Related Documents: Users are advised to refer
to the specific manual version for accurate information.

Terminology and Abbreviations

ALU: Arithmetic Logical Unit

LUT: Look-up Table

IP: Intellectual Property

Support and Feedback

If you have any questions or need technical support, you can
contact Gowin Semiconductor via their website or email provided
below:

Website: www.gowinsemi.com

Email: support@gowinsemi.com

Overview

Introduction to Gowin FP Div IP

The Gowin FP Div IP is designed to calculate the quotient of two
single-precision floating-point numbers. It includes optional
output ports for overflow, underflow, zero, NaN (Not a Number), and
division by zero. This IP is optimized to use minimal logic
resources for floating-point division operations.

Note: Ensure to refer to the specific design files and
software versions mentioned for accurate implementation.

Table 2-1 Gowin FP Div IP Resources

Delivered| Doc. Design Files| Reference Design| TestBench Test and Design Flow| Synthesis Software| Application Software
---|---|---|---|---|---
Verilog| Verilog| Verilog| GowinSynthesis| Gowin Software (V1.9.9 Beta-4 and above)

Note:

For detailed information on supported devices, refer to the
provided link in the manual.

FAQ

Q: Can Gowin FP Div IP handle double-precision floating-point

numbers?

A: No, Gowin FP Div IP is specifically designed
for single-precision floating-point numbers.

Q: Is there a specific tool required for integrating Gowin FP

Div IP into a design?

A: Yes, it is recommended to use Gowin Software
version 1.9.9 Beta-4 or above for seamless integration.

Q: How can I access the latest documentation and updates for

Gowin FP Div IP?

A: You can visit the Gowin Semiconductor
website or contact their support team via email for the most
current information.

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Gowin FP Div IP
User Guide
IPUG1185-1.0E, 05/09/2024

Copyright © 2024 Guangdong Gowin Semiconductor Corporation. All Rights Reserved.
is a trademark of Guangdong Gowin Semiconductor Corporation and is registered in China, the U.S. Patent and Trademark Office, and other countries. All other words and logos identified as trademarks or service marks are the property of their respective holders. No part of this document may be reproduced or transmitted in any form or by any means, electronic, mechanical, photocopying, recording or otherwise, without the prior written consent of GOWINSEMI.
Disclaimer
GOWINSEMI assumes no liability and provides no warranty (either expressed or implied) and is not responsible for any damage incurred to your hardware, software, data, or property resulting from usage of the materials or intellectual property except as outlined in the GOWINSEMI Terms and Conditions of Sale. GOWINSEMI may make changes to this document at any time without prior notice. Anyone relying on this documentation should contact GOWINSEMI for the current documentation and errata.

Revision History

Date 05/09/2024

Version 1.0E

Description Initial version published.

Contents

Contents
Contents ………………………………………………………………………………………………………..i List of Figures……………………………………………………………………………………………….ii List of Tables ……………………………………………………………………………………………….iii 1 About This Guide………………………………………………………………………………………..1
1.1 Purpose…………………………………………………………………………………………………1 1.2 Related Documents…………………………………………………………………………………1 1.3 Terminology and Abbreviations…………………………………………………………………2 1.4 Support and Feedback …………………………………………………………………………….2 2 Overview…………………………………………………………………………………………………….3 2.1 Introduction to Gowin FP Div IP ………………………………………………………………..3 2.2 Features ………………………………………………………………………………………………..3 2.3 Max. Frequency ……………………………………………………………………………………..3 2.4 Latency …………………………………………………………………………………………………3 2.5 Resource Utilization ………………………………………………………………………………..4 3 Functional Description………………………………………………………………………………..5 4 Port Description………………………………………………………………………………………….6 5 Timing Description ……………………………………………………………………………………..8 6 Call and Configure………………………………………………………………………………………9 6.1 IP Generation …………………………………………………………………………………………9 6.2 IP Configuration ……………………………………………………………………………………10 7 Reference Design ……………………………………………………………………………………..11 8 Documents Delivered ………………………………………………………………………………..12 8.1 Documentation ……………………………………………………………………………………..12 8.2 Reference Design …………………………………………………………………………………12

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List of Figures
List of Figures
Figure 3-1 Gowin FP Div IP Structure Diagram……………………………………………………………….. 5 Figure 4-1 Gowin FP Div IP Interface …………………………………………………………………………….. 6 Figure 5-1 Gowin FP Div IP Signal Timing ……………………………………………………………………… 8 Figure 6-1 Open the IP via Toolbar Icon ………………………………………………………………………… 9 Figure 6-2 Gowin FP Div IP Configuration Interface ………………………………………………………… 10

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List of Tables
List of Tables
Table 1-1 Terminology and Abbreviations ………………………………………………………………………. 2 Table 2-1 owin FP Div IP ……………………………………………………………………………………………… 3 Table 2-2 Gowin FP Div IP Resource Utilization ……………………………………………………………… 4 Table 4-1 Gowin FP Div IP Port List ………………………………………………………………………………. 6 Table 8-1 Gowin FP Div IP Doc. List ……………………………………………………………………………… 12 Table 8-2 Gowin FP Div IP RefDesign Folder Content List……………………………………………….. 12

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1 About This Guide

1.1 Purpose

1 About This Guide
1.1 Purpose
The purpose of Gowin FP Div IP User Guide is to help you learn the features and usage of Gowin FP Div IP by providing the descriptions of functions, ports, timing, GUI and reference design. The software screenshots and the supported products listed in this manual are based on Gowin Software 1.9.9 Beta-4. As the software is subject to change without notice, some information may not remain relevant and may need to be adjusted according to the software that is in use.
1.2 Related Documents
The latest user guides are available on the GOWINSEMI website. You can find the related documents at www.gowinsemi.com: DS100, GW1N series of FPGA Products Data Sheet DS117, GW1NR series of FPGA Products Data Sheet DS821, GW1NS series of FPGA Products Data Sheet DS861, GW1NSR series of FPGA Products Data Sheet DS102, GW2A series of FPGA Products Data Sheet DS226, GW2AR series of FPGA Products Data Sheet DS971, GW2AN-18X & 9X Data Sheet DS976, GW2AN-55 Data Sheet DS981, GW5AT series of FPGA Products Data Sheet DS1103, GW5A series of FPGA Products Data Sheet DS981, GW5AST series of FPGA Products Data Sheet DS1108, GW5AR series of FPGA Products Data Sheet DS1105, GW5AS series of FPGA Products Data Sheet SUG100, Gowin Software User Guide

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1 About This Guide

1.3 Terminology and Abbreviations

1.3 Terminology and Abbreviations

The terminology and abbreviations used in this manual are as shown in Table 1-1.

Table 1-1 Terminology and Abbreviations

Terminology and Abbreviations Meaning

ALU

Arithmetic Logical Unit

LUT

Look-up Table

IP

Intellectual Property

1.4 Support and Feedback

Gowin Semiconductor provides customers with comprehensive technical support. If you have any questions, comments, or suggestions, please feel free to contact us directly using the information provided below.
Website: www.gowinsemi.com
E-mail: support@gowinsemi.com

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2 Overview

2.1 Introduction to Gowin FP Div IP

2 Overview

2.1 Introduction to Gowin FP Div IP

Gowin FP Div IP can obtain the quotient of two single-precision floating-point numbers. This IP supports optional output ports, such as overflow, underflow, zero, NaN (Not a Number), division by zero, and it is designed to use fewer logic resources to perform floating-point division operation.

Table 2-1 owin FP Div IP Gowin FP Div IP Logic Resource Delivered Doc. Design Files Reference Design TestBench Test and Design Flow Synthesis Software Application Software

Please refer to Table 2-2
Verilog Verilog Verilog
GowinSynthesis Gowin Software (V1.9.9 Beta-4 and above)

Note! For the devices supported, you can click here to get the information.

2.2 Features

Can obtain the quotient of two single-precision floating-point numbers Supports optional output port

2.3 Max. Frequency

The max. frequency of Gowin FP Div IP is mainly determined by speed grade of the selected devices.

2.4 Latency

The latency of Gowin FP Div IP is determined by the configuration parameters.

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2 Overview

2.5 Resource Utilization

2.5 Resource Utilization

Gowin FP Div IP can be implemented by Verilog. Its performance and resource utilization may vary when the design is employed in different devices, or at different densities, speeds, or grades.

Take GW2A-55 FPGA as an example. See Table 2-2 Gowin FP Div IP Resource Utilization for the resource utilization. For the applications on the other GOWINSEMI devices, please refer to the later release.

Table 2-2 Gowin FP Div IP Resource Utilization

Device

Speed Grade Resource Name

Registers

GW2A-55 C8/I7

LUTs ALUs

I/O Buf

Resource Utilization 3588 605 1394 104

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3 Functional Description

3 Functional Description

Gowin FP Div IP can obtain the quotient of two single-precision floating-point numbers. Users can configure parameters according to their requirements when generating this module. The structure diagram is shown as Figure 3-1.
Figure 3-1 Gowin FP Div IP Structure Diagram

Input

Mantissa Division (Iteration)

Floating Point Division
Quotient
Remainder

Sign Exponent
Mantissa

Output

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4 Port Description
4 Port Description
The IO ports of Gowin FP Div IP are shown in Figure 4-1; for the details, you can see Table 4-1.
Figure 4-1 Gowin FP Div IP Interface

Table 4-1 Gowin FP Div IP Port List

Signal

I/O

clk

Input

rstn

Input

ce

Input

data_a

Input

data_b

Input

overflow

Output

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Description Clock signal Reset signal, active-low Clock enable signal, active- high (optional) Input a Input b Overflow
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4 Port Description

Signal underflow nan zero division_by_zero result

I/O Output Output Output Output Output

Description Underflow NaN Zero Divide by zero Output result

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5 Timing Description
5 Timing Description
The timing of Gowin FP Div IP is as shown in Figure 5-1.
Figure 5-1 Gowin FP Div IP Signal Timing

As shown in the figure above, after inputting two single-precision floating- point numbers, the quotient along with its data type is output with a delay of 55 clock cycles.

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6 Call and Configure

6.1 IP Generation

6 Call and Configure
6.1 IP Generation
Click “Tools > IP Core Generator > DSP and Mathematics” to call and configure FP Div; toolbar icon is also available to open the IP as shown in Figure 6-1.
Figure 6-1 Open the IP via Toolbar Icon

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6 Call and Configure

6.2 IP Configuration

6.2 IP Configuration
Gowin FP Div IP configuration interface is shown in Figure 6-2 .
Figure 6-2 Gowin FP Div IP Configuration Interface

This manual takes GW2A-LV55PG484C8/I7 part number as an example.
You can configure the path of generated IP core folder in the “Create In” text box.
You can configure the generated IP file name in the “File Name” text box.
You can configure the generated IP module name in the “Module Name” text box.

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7 Reference Design
7 Reference Design
Please refer to the related test cases in Gowin FP Div IP RefDesign.

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8 Documents Delivered

8.1 Documentation

8 Documents Delivered

The delivery file of Gowin FP Div IP includes documentation and reference design.

8.1 Documentation

The folder contains the user guide in PDF version.

Table 8-1 Gowin FP Div IP Doc. List
Name
IPUG1185Gowin FP Div IP User Guide

Description
Gowin FP Div IP User Guide, namely this one.

8.2 Reference Design

Gowin FP Div IP RefDesign folder contains the netlist file, user reference design, constraints file, top-level file, and project file, etc.

Table 8-2 Gowin FP Div IP RefDesign Folder Content List

Name

Description

top.v

The top module of reference design

FP_Div.cst

Project physical constraints file

FP_Div.sdc

Project timing constraints file

FP_Div.rao

Online logic analyzer file

fp_div.v

Generate FP Div IP top-level file, encrypted

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References

Read User Manual Online (PDF format)

Read User Manual Online (PDF format)  >>

Download This Manual (PDF format)

Download this manual  >>

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