ASRock IMB-1236 Jumpers and Headers User Guide
- May 15, 2024
- ASRock
Table of Contents
ASRock IMB-1236 Jumpers and Headers User Guide
Instruction For Use
Revision History
| Date | Description |
|---|---|
| March 29, 2023 | First Release |
| December 13, 2023 | Second Release |
-
M.2 Key-M Socket (M2_M1)
Pin| Siqnal Name| Signal Name| Pin
---|---|---|---
1| GND| +3.3V| 2
3| GND| +3.3V| 4
5| PERn3| NA| 6
7| PERp3| NA| 8
9| GND| SATA LED| 10
11| PETn3| +3.3V| 12
13| PETp3| +3.3V| 14
15| GND| +3.3V| 16
17| PERn2| +3.3V| 18
19| PERo2| NA| 20
21| GND| NA| 22
23| PETn2| NA| 24
25| PETp2| NA| 26
27| GND| NA| 28
29| PERn1| NA| 30
31| PERp1| NA| 32
33| GND| NA| 34
35| PETn1| NA| 36
37| PETp1| NA| 38
39| GND| NA| 40
41| PER now| NA| 42
43| PER pod| NA| 44
45| GND| NA| 46
47| Petén O| NA| 48
49| Pepto O| PERST#| 50
51| GND| CLKREQ#| 52
53| PEFCLK n| WAKE#| 54
55| PEFCLK p| NA| 56
57| GND| NA| 58
| | |
67| NA| NA| 68
69| PEDET| +3.3V| 70
71| GND| +3.3V| 72
73| GND| +3.3V| 74
75| GND| | -
M.2 Key-E Socket (M2_E1)
Pin| Siana! Name| Signal Name| Pin
---|---|---|---
1| GND| +3.3V| 2
3| USB D+| +3.3V| 4
5| USB D-| NA| 6
7| GND| NA| 8
9| CNV WGR 01-| CNV RF RESET| 10
11| CNV WGR 01+| NA| 12
13| GND| MODEM CLKREQ| 14
15| CNV WGR DO-| NA| 16
17| CNV WGR DO+| GND| 18
19| GND| NA| 20
21| CNV WGR CLK-| CNV BRI RSP| 22
23| CNV WGR CLK+| |
| | |
33| GND| CNV BGI OT| 32
35| PETp| CNV RGI RSP| 34
37| PETn| CNV BRI OT| 36
39| GND| NA| 38
41| PERp| NA| 40
43| PERn| NA| 42
45| GND| NA| 44
47| PEFCLKp| NA| 46
49| PEFCLKn| NA| 48
51| GND| SUSCLK| 50
53| CLKREQ#| PERSTO#| 52
55| WAKE#| W DISABLE1#| 54
57| GND| W DISABLE2#| 56
59| CNV WT 01-| SMB DATA| 58
61| CNV WT 01+| SMB CLK| 60
63| GND| NA| 62
65| CNV WT DO-| CLKIN XTAL LCP| 64
67| CNV WT DO+| NA| 66
69| GND| NA| 68
71| CNV WT CLK-| NA| 70
73| CNV WT CLK+| +3.3V| 72
75| GND| +3.3V| 74 -
4-pin ATX PWR Connector (4P_ATX)
Pin| Signal Name
---|---
1| GND
2| GND
3| DC Input
4| DC Input -
USB 3.2 Gen1 Header (USB33)
Pin| Signal Name I| Signal Name| Pin
---|---|---|---
1| ID I| lento- P- D+| 2
3| lento- P- D+ I| lento- P- D-| 4
5| lento- P- D- I| GND| 6
7| GND| ] lento P SSTX+| 8
9| DUMMY| ] lento P_ SSTX-| 10
11| DUMMY| GND| 12
13| GND j 1ntA_P_SSRX+| 14
15| DUMMY| lento- P- SSRX-| 16
17| DUMMY
I
| Bus| 18
19| Bus| | 20
-
Chassis FAN Connector (+12V) (CHA_FAN2)
Pin| Signal Name
---|---
1| GND
2| REMOTE CTL
3| +5VA
4| GND -
PWR_ADAPTER1
Pin| Signal Name
---|---
1| GND
2| +12V
3| CPU FAN SPEED
4| FAN SPEED CONTROL -
CPU FAN Connector (+12V) (CPU_FAN1)
Pin| Sign al Name
---|---
1| GND
2| GND
3| CON LBKLT CTL
4| CON LBKLT EN
5| LCD BLT VCC
6| LCD- BLT- VCC -
esp. Inverter Power Control Wafer (EDP_BLT_PWR1)
Pin| Sign al Name
---|---
1| GND
2| GND
3| CON LBKLT CTL
4| CON LBKLT EN
5| LCD BLT VCC
6| LCD- BLT- VCC -
Brightness Control Mode (BLT_PWM2)
1-2 : 3V Level (Default)
2-3 : 5V Level -
Brightness Control Mode (BLT_PWM1)
1-2: From esp. PWM to CON_LBKLT_CTL
2-3: From LVDS PWM to CON_LBKLT_CTL
(Default)
-
Please set to 1-2 when adjusting brightness
by Brightness Control bar under OS. -
Please set to 2-3 when adjusting brightness
by BLT_VOL1.-
LVDS Panel Connector (LVDS1)
Pin| Signal Name| Signal Name| Pin
---|---|---|---
1| LCD VCC| LCD VCC| 2
3| +3.3V| N/A| 4
5| N/A| LVDS A DATA0#| 6
7| LVDS- A- DATA0| GND| 8
9| LVDS A DATA1#| LVDS- A- DATA1| 10
11| GND| LVDS A DATA2#| 12
13| LVDS A DATA2| GND| 14
15| LVDS A DATA3#| LVDS- A- DATA3| 16
17| GND| LVDS A CLK#| 18
19| LVDS- A- CLK| GND| 20
21| LVDS B DATA0#| LVDS- B- DATA0| 22
23| GND| LVDS B DATA1#| 24
25| LVDS- B- DATA1| GND| 26
27| LVDS B DATA2#| LVDS- B- DATA2| 28
29| DPLVDD EN| LVDS B DATA3#| 30
31| LVDS- B- DATA3| GND| 32
33| LVDS- B- CLK#| LVDS- B- CLK| 34
35| GND| CON- LBKLT- EN| 36
37| CON- LBKLT- CTL| LCD- BLT- VCC| 38
39| LCD- BLT- VCC| LCD- BLT- VCC| 40-
PD (Panel Detection): Connect this pin to LVDS Panel’s Ground pin to detect Panel detection.
-
esp. Connector (on the Backside of PCB)
Pin| Signal Name
---|---
1| NA
2| GND
3| esp. TX#3 CON
4| esp. TX3 CON
5| GND
6| esp. TX#2 CON
7| esp. TX2 CON
8| GND
9| esp. TX#1 CON
10| esp. TX1 CON
11| GND
12| esp. TX#0 CON
13| esp. TX0 CON
14| GND
15| esp. AUX CON
16| esp. AUX# CON
17| GND
18| LCD VCC
19| LCD VCC
20| LCD VCC
21| LCD VCC
22| NA
23| GND
24| GND
25| GND
26| GND
27| esp. HPD CON
28| GND
29| GND
30| GND
31| GND
32| esp. BKLTEN
33| eddy BKLTCTL R
34| SMB DATA MAIN
35| SMB CLK MAIN
36| LCD BLT VCC
37| LCD BLT VCC
38| LCD BLT VCC
39| LCD BLT VCC
40| NA
-
-
Inverter Power Control Wafer (BLT_PWR1)
Pin| Signal Name
---|---
1| GND
2| GND
3| CON LBKLT CTL
4| CON LBKLT EN
5| LCD BLT VCC
6| LCD BLT VCC -
Backlight Volume Control (BLT_VOL1)
Pin| Signal Name
---|---
1| GPIO- VOL- UP
2| GPIO- VOL- DW
3| PWRDN
4| BLT UP
5| BLT DW
6| GND
7| GND -
Backlight Power Select
(LCD_BLT_VCC) (BKT_PWR1)
1-2: LCD_BLT_VCC: +5V (Default)
2-3: LCD_BLT_VCC: +12V
4-5: LCD_BLT_VCC: DC_IN -
Panel Power Select
(LCD_VCC) (PNL_PWR1)
1-2: LCD_VCC: +3V (Default)
2-3: LCD_VCC: +5V
4-5: LCD_VCC: +12V
-
COM Port Headers
- COM1~2 (RS232/422/485)*
23 : COM5~6 (RS232)
25 : COM3~4 (RS232)
| Pin | Signal Name | Signal Name | Pin |
|---|---|---|---|
| 1 | DDCD# | RRXD | 2 |
| 3 | TTXD | DDTR# | 4 |
| 5 | GND | DDSR# | 6 |
| 7 | RRTS# | CCTS# | 8 |
| 9 | PWR | 10 |
* This motherboard supports RS232/422/485 on COM1, 2 ports. Please refer to the table below for the pin definition. In addition, COM1, 2 ports (RS232/422/485) can be adjusted in BIOS setup utility > Advanced Screen > Super IO Configure- tion. You may refer to our user manual for details. | COM1, 2 Ports Pin Definition Pin | RS232 | RS422 | RS485 |
|---|---|---|---|
| 1 | DCD | TX- | RTX- |
| 2 | RXD | TX+ | RTX+ |
| 3 | TXD | RX+ | N/A |
| 4 | DTR | RX- | N/A |
| 5 | GND | GND | GND |
| 6 | DSR | N/A | N/A |
| 7 | RTS | N/A | N/A |
| 8 | CTS | N/A | N/A |
| 9 | PWR | PWR | PWR |
-
SATA3 Connectors (SATA3_0, SATA3_1)
Pin| Signal Name
---|---
1| GND
2| SATA-A+
3| SATA-A-
4| GND
5| SATA-B-
6| SATA-B+
7| GND -
COM Port PWR Setting Jumpers
PWR_COM1~6 (For COM Port1~6)
1-2 : +5V (Default)
2-3 : +12V
PWR_COM2
PWR_COM1
PWR_COM6
PWR_COM5
PWR_COM3
PWR_COM4
-
SATA Power Output Connector (SATA_PWR1)
Pin| Signal Name
---|---
1| +5V
2| GND
3| GND
4| +12V -
System Panel Header (PANEL1)
Pin| Signal Name| Signal Name| Pin
---|---|---|---
1| HOLED+| PLED+| 2
3| HOLED-| PLED-| 4
5| GND| PWRBTN#| 6
7| RESET#| GND| 8
9| GND| | 10 -
Clear CMOS Header (CLRMOS1)
1-2: Normal (Default)
2-3: Clear CMOS -
HEATER1 Header (HEATER1)
Pin| Signal Name
---|---
1| Heater PWR
2| GND
3| NCT -
DACC Jumper (DACC1)
Open: No ACC (Default)
Short: ACC- Auto clear CMOS when system boot improperly.
-
Digital Input/Output Pin Header (JGPIO1)
Pin| Signal Name| Signal Name| Pin
---|---|---|---
1| SIO GP71| GPP H23| 2
3| SIO GP72| GPP 110| 4
5| SIO GP73| GPP ES| 6
7| SIO GP74| GPP E6| 8
9| JGPIOPWR R| GND| 10 -
Digital Input/Output Power Select (JGPIO_PWR1)
1-2: +12V
2-3: +5V (Default) -
Digital Input/Output Default Value Setting (JGPIO_SET1)
1-2: Pull-High (Default)
2-3: Pull-Low -
ESPI Header (ESPI1)
Pin| Signal Name
---|---
1| GND
2| ESPI CLK
3| GND
4| ESPI CS#
5| ESPI RESET#
6| GND
7| +3V
8| GND
9| SMB CLK
10| SMB DATA
11| ESPI 100
12| ESPI 101
13| ESPI 102
14| ESPI 103
15| GND
16| +3VSB
17| Internal Use
18| Internal Use
19| ESPI ALERT#
20| GND -
30 : M.2 Key-B Socket (M2_B1)
Pin| Signal Name| Signal Name| Pin
---|---|---|---
1| NA| +3.3V| 2
3| GND| +3.3V| 4
5| GND| Full Gard Power
off
| 6
7| US B D+| W DISABLE1#| 8
9| USB D·| WWAN LED#| 10
11| GND| |
| | |
21| GND| NA| 20
23| NA| NA| 22
25| NA| NA| 24
27| GND| W DIS ABLE2#| 26
29| US83 RX·| NA| 28
31| US83 RX+| UIM RESET| 30
33| GND| UIM CLK| 32
35| US83 TX-| UIM DATA| 34
37| US83 TX+| UIM PWR| 36
39| GND| NA| 38
41| PERnO| NA| 40
43| PERPO| NA| 42
45| GND| NA| 44
47| PETnO| NA| 46
49| PETPO| NA| 48
51| GND| PERST#| 50
53| PEFCLKn| CLKREQ#| 52
55| PEFCLKD| WAKE#| 54
57| GND| NA| 56
59| NA| NA| 58
61| NA| NA| 60
63| NA| NA| 62
65| NA| NA| 64
67| NA| NA| 66
69| PEDET| NA| 68
71| GND| +3.3V| 70
73| GND| +3.3V| 72
75| NA| +3.3V| 74
29. Buzzer Header (BUZZ2)
Pin| Signal Name
---|---
1| +5V
2| BUZZ
-
TX/AT Mode Jumper (SIO_AT1)
Open: ATX Mode (Default)
Short: AT Mode -
Chassis Intrusion Headers (CI1, CI2)
CI1:
Open: Normal (Default)
Short: Active Case Open
CI2:
Open: Active Case Open
Short: Normal (Default)
Installation of ROM Socket
* Do not apply force to the actuator cover after ice inserted.
* Do not apply force to actuator cover when it is opening over 120 degree, Otherwise, the actuator cover may be broken.
* The yellow dot (Pin1) on the ROM must be installed at pin1 position of the socket (white arrow area).
* Make sure the white dot on the ROM is installed outwards of the socket.
* For further details of how to install ROM, please refer to ASRI website. Warning: If the installation does not follow as the picture, then it may cause severe damage to chipset & MB.-
PCIE_ISOLATION1
Pin| Signal Name
---|---
1| PSON#
2| GND- Connect to PCIE_ISOLATION_1 header on VGA-PWR card
-
3W Audio AMP Output Wafer (SPEAKER1)
Pin| Signal Name
---|---
1| GPIO
2| SMB CLK
3| SMB DATA
4| GND -
SMB_TEST1
Pin| Signal Name
---|---
1| GPIO
2| SMB CLK
3| SMB DATA
4| GND -
SPDIF Header (SPDIF1)
Pin| Signal Name
---|---
1| GPIO
2| SMB CLK
3| SMB DATA
4| GND -
Front Panel Audio Header (HD_AUDIO1)
Pin| Signal Name| Signal Name| Pin
---|---|---|---
1| MIC2 L| GND| 2
3| MIC2 R| | 4
5| OUT2 R| MIC RET| 6
7| J SENSE| | 8
9| OUT2 L| OUT RET| 10 -
39 : Audio Jack: Pink – Mic In
-
Audio Jack: Green – Line Out
-
USB 2.0 Ports (USB2_3_4)
-
RJ45 LAN Port (LAN2)
-
RJ45 LAN Port (LAN1)
-
Battery Connector (BAT1)
Pin| Signal Name
---|---
1| +BAT
2| GND -
USB 3.2 Gen2 Ports (USB3_1_2)
-
HDMI Ports (HDMI1_2)
-
Thunderbolt Type-C Port (TC_TB_0)
-
Thunderbolt Type-C Port (TC_TB_1)
-
DC Jack (DC_JACK1)
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