ASRock IMB-1235 Raptor Lake P Industrial User Guide
- May 15, 2024
- ASRock
Table of Contents
ASRock IMB-1235 Raptor Lake P Industrial

Specifications:
- Model: IMB-1235
- Connectors: DC_JACK1, Thunderbolt Type-C (TC_T1), Thunderbolt Type-C (TC_T0), USB 3.2 Gen2, LAN1, LAN2, USB 2.0, Line Out, Mic In, SPDIF1, HD_AUDIO1, CPU_FAN1, SATA3_1, SATA3_0, SATA_PWR1, and more.
- Socket Types: M.2 Key-E Socket (M2_E1), M.2 Key-M Socket (M2_M1), 4-pin ATX PWR Connector (4P_ATX1), M.2 Key-B Socket (M2_B1), USB 3.2 Gen1 Header (USB3_3)
Product Usage Instructions
Jumper and Header Settings:
Refer to the diagram in the user manual to correctly set the jumpers and
headers on the IMB-1235 board. Ensure proper alignment and connection of each
component for optimal performance.
Connector Usage:
Connect various devices and peripherals to the corresponding connectors on
the IMB-1235 board. Make sure to match the connectors with the appropriate
devices to establish proper functionality.
M.2 Socket Installation:
When installing components into the M.2 Key-E Socket (M2_E1), M.2 Key-M
Socket (M2_M1), or M.2 Key-B Socket (M2_B1), ensure correct alignment and
gentle insertion to avoid damage to the sockets or components.
Power Connector Setup:
For the 4-pin ATX PWR Connector (4P_ATX1), carefully connect the
corresponding power cables to provide sufficient power to the board. Double-
check the connections to prevent power-related issues.
Frequently Asked Questions (FAQ):
-
Q: How do I know which connector to use for specific devices?
A: Refer to the user manual or consult with a technical expert to determine the appropriate connectors for your specific devices based on compatibility and functionality requirements. -
Q: What should I do if I encounter power-related issues?
A: Check the power connections, ensure proper voltage supply, and inspect for any loose connections or damaged cables. If issues persist, contact customer support for further assistance.
The terms HDMI® and HDMI High-Definition Multimedia Interface, and the HDMI logo are trademarks or registered trademarks of HDMI Licensing LLC in the United States and other countries.
Revision History
| Date | Description |
|---|---|
| April 12, 2023 | First Release |
| November 28, 2023 | Second Release |
| January 29, 2024 | Third Release |

- 1 : M.2 Key-E Socket (M2_E1)
| PIN | SIGNAL | SIGNAL | PIN |
|---|---|---|---|
| 1 | GND | +3.3V | 2 |
| 3 | USB_D+ | +3.3V | 4 |
| 5 | USB_D- | NA | 6 |
| 7 | GND | NA | 8 |
| 9 | CNV_WGR_D1- | CNV_RF_RESET | 10 |
| 11 | CNV_WGR_D1+ | NA | 12 |
| 13 | GND | MODEM_CLKREQ | 14 |
| 15 | CNV_WGR_D0- | NA | 16 |
| 17 | CNV_WGR_D0+ | GND | 18 |
| 19 | GND | NA | 20 |
| 21 | CNV_WGR_CLK- | CNV_BRI_RSP | 22 |
| 23 | CNV_WGR_CLK+ | ||
| 33 | GND | CNV_BGI_DT | 32 |
| 35 | PETp | CNV_RGI_RSP | 34 |
| 37 | PETn | CNV_BRI_DT | 36 |
| 39 | GND | NA | 38 |
| 41 | PERp | NA | 40 |
| 43 | PERn | NA | 42 |
| 45 | GND | NA | 44 |
| 47 | PEFCLKp | NA | 46 |
| 49 | PEFCLKn | NA | 48 |
| 51 | GND | SUSCLK | 50 |
| 53 | CLKREQ# | PERST0# | 52 |
| 55 | WAKE# | W_DISABLE1# | 54 |
| 57 | GND | W_DISABLE2# | 56 |
| 59 | CNV_WT_D1- | NA | 58 |
| 61 | CNV_WT_D1+ | NA | 60 |
| 63 | GND | NA | 62 |
| 65 | CNV_WT_D0- | CLKIN_XTAL_LCP | 64 |
| 67 | CNV_WT_D0+ | NA | 66 |
| 69 | GND | NA | 68 |
| 71 | CNV_WT_CLK- | NA | 70 |
| 73 | CNV_WT_CLK+ | +3.3V | 72 |
| 75 | GND | +3.3V | 74 |
- 2 : M.2 Key-M Socket (M2_M1)
| PIN | SIGNAL | SIGNAL | PIN |
|---|---|---|---|
| 1 | GND | +3.3V | 2 |
| 3 | GND | +3.3V | 4 |
| 5 | PERn3 | NA | 6 |
| 7 | PERp3 | NA | 8 |
| 9 | GND | SATA_LED | 10 |
| 11 | PETn3 | +3.3V | 12 |
| 13 | PETp3 | +3.3V | 14 |
| 15 | GND | +3.3V | 16 |
| 17 | PERn2 | +3.3V | 18 |
| 19 | PERp2 | NA | 20 |
| 21 | GND | NA | 22 |
| 23 | PETn2 | NA | 24 |
| 25 | PETp2 | NA | 26 |
| 27 | GND | NA | 28 |
| 29 | PERn1 | NA | 30 |
| 31 | PERp1 | NA | 32 |
| 33 | GND | NA | 34 |
| 35 | PETn1 | NA | 36 |
| 37 | PETp1 | NA | 38 |
| 39 | GND | NA | 40 |
| 41 | PERn0 | NA | 42 |
| 43 | PERp0 | NA | 44 |
| 45 | GND | NA | 46 |
| 47 | PETn0 | NA | 48 |
| 49 | PETp0 | PERST# | 50 |
| 51 | GND | CLKREQ# | 52 |
| 53 | PEFCLKn | WAKE# | 54 |
| 55 | PEFCLKp | NA | 56 |
| 57 | GND | NA | 58 |
| 67 | NA | NA | 68 |
| 69 | PEDET | +3.3V | 70 |
| 71 | GND | +3.3V | 72 |
| 73 | GND | +3.3V | 74 |
| 75 | GND |
- 3 : 4-pin ATX PWR Connector (4P_ATX1)
| Pin | Signal Name | Signal Name | Pin |
|---|---|---|---|
| 1 | GND | GND | 2 |
| 3 | DC Input | DC Input | 4 |
- 4 : M.2 Key-B Socket (M2_B1)
| PIN | SIGNAL | SIGNAL | PIN |
|---|---|---|---|
| 1 | NA | +3.3V | 2 |
| 3 | GND | +3.3V | 4 |
| 5 | GND | FuLL_Card_Power_off | 6 |
| 7 | USB_D+ | W_DISABLE1# | 8 |
| 9 | USB_D- | WWAN_LED# | 10 |
| 11 | GND | ||
| 21 | GND | NA | 20 |
| 23 | NA | NA | 22 |
| 25 | NA | NA | 24 |
| 27 | GND | W_DISABLE2# | 26 |
| 29 | USB3_RX- | NA | 28 |
| 31 | USB3_RX+ | UIM_RESET | 30 |
| 33 | GND | UIM_CLK | 32 |
| 35 | USB3_TX- | UIM_DATA | 34 |
| 37 | USB3_TX+ | UIM_PWR | 36 |
| 39 | GND | NA | 38 |
| 41 | PERn0 | NA | 40 |
| 43 | PERP0 | NA | 42 |
| 45 | GND | NA | 44 |
| 47 | PETn0 | NA | 46 |
| 49 | PETP0 | NA | 48 |
| 51 | GND | PERST# | 50 |
| 53 | PEFCLKn | CLKREQ# | 52 |
| 55 | PEFCLKp | WAKE# | 54 |
| 57 | GND | NA | 56 |
| 59 | NA | NA | 58 |
| 61 | NA | NA | 60 |
| 63 | NA | NA | 62 |
| 65 | NA | NA | 64 |
| 67 | NA | NA | 66 |
| 69 | PEDET | NA | 68 |
| 71 | GND | +3.3V | 70 |
| 73 | GND | +3.3V | 72 |
| 75 | NA | +3.3V | 74 |
- 5 : USB 3.2 Gen1 Header (USB3_3)
| Pin | Signal Name | Signal Name | Pin |
|---|---|---|---|
| 1 | ID | IntA_P_D+ | 2 |
| 3 | IntA_P_D+ | IntA_P_D- | 4 |
| 5 | IntA_P_D- | GND | 6 |
| 7 | GND | IntA_P_SSTX+ | 8 |
| 9 | IntA_P_SSTX+ | IntA_P_SSTX- | 10 |
| 11 | IntA_P_SSTX- | GND | 12 |
| 13 | GND | IntA_P_SSRX+ | 14 |
| 15 | IntA_P_SSRX+ | IntA_P_SSRX- | 16 |
| 17 | IntA_P_SSRX- | Vbus | 18 |
| 19 | Vbus |
- 6 : CPU FAN Connector (+12V) (CPU_FAN1)
| Pin | Signal Name |
|---|---|
| 1 | GND |
| 2 | +12V |
| 3 | CPU_FAN_SPEED |
| 4 | FAN_SPEED_CONTROL |
- 7 : SATA3 Connectors (SATA3_0, SATA3_1)
| Pin | Signal Name |
|---|---|
| 1 | GND |
| 2 | SATA-A+ |
| 3 | SATA-A- |
| 4 | GND |
| 5 | SATA-B- |
| 6 | SATA-B+ |
| 7 | GND |
– 8 : SATA Power Output Connector
| Pin | Signal Name |
|---|---|
| 1 | +5V |
| 2 | GND |
| 3 | GND |
| 4 | +12V |
-
9 : Brightness Control Mode (BLT_PWM2)
- 1- 2: 3V Level (Default)
- 2- 3: 5V Level
-
10 : Brightness Control Mode (BLT_PWM1)
- 1- 2: From eDP PWM to CON_LBKLT_CTL
- 2- 3: From LVDS PWM to CON_LBKLT_CTL (Default)
- Please set to 1-2 when adjusting brightness by Brightness Control bar under OS.
- Please set to 2-3 when adjusting brightness by BLT_VOL1.
-
*11 : LVDS Panel Connector**
| Pin | Signal Name | Signal Name | Pin |
|---|---|---|---|
| 1 | LCD_VCC | LCD_VCC | 2 |
| 3 | +3.3V | N/A | 4 |
| 5 | N/A | LVDS_A_DATA0# | 6 |
| 7 | LVDS_A_DATA0 | GND | 8 |
| 9 | LVDS_A_DATA1# | LVDS_A_DATA1 | 10 |
| 11 | GND | LVDS_A_DATA2# | 12 |
| 13 | LVDS_A_DATA2 | GND | 14 |
| 15 | LVDS_A_DATA3# | LVDS_A_DATA3 | 16 |
| 17 | GND | LVDS_A_CLK# | 18 |
| 19 | LVDS_A_CLK | GND | 20 |
| 21 | LVDS_B_DATA0# | LVDS_B_DATA0 | 22 |
| 23 | GND | LVDS_B_DATA1# | 24 |
| 25 | LVDS_B_DATA1 | GND | 26 |
| 27 | LVDS_B_DATA2# | LVDS_B_DATA2 | 28 |
| 29 | DPLVDD_EN | LVDS_B_DATA3# | 30 |
| 31 | LVDS_B_DATA3 | GND | 32 |
| 33 | LVDS_B_CLK# | LVDS_B_CLK | 34 |
| 35 | GND | CON_LBKLT_EN | 36 |
| 37 | CON_LBKLT_CTL | LCD_BLT_VCC | 38 |
| 39 | LCD_BLT_VCC | LCD_BLT_VCC | 40 |
-
PD (Panel Detection): Connect this pin to LVDS Panel’s Ground pin to detect Panel detection.
-
eDP Connector (EDP1) (on the Backside of PCB)
| PIN | Signal Name |
|---|---|
| 40 | NA |
| 39 | LCD_BLT_VCC |
| 38 | LCD_BLT_VCC |
| 37 | LCD_BLT_VCC |
| 36 | LCD_BLT_VCC |
| 35 | SMB_CLK_MAIN |
| 34 | SMB_DATA_MAIN |
| 33 | eDP_BKLTCTL_R |
| 32 | eDP_BKLTEN |
| 31 | GND |
| 30 | GND |
| 29 | GND |
| 28 | GND |
| 27 | eDP_HPD_CON |
| 26 | GND |
| 25 | GND |
| 24 | GND |
| 23 | GND |
| 22 | NA |
| 21 | LCD_VCC |
| 20 | LCD_VCC |
| 19 | LCD_VCC |
| 18 | LCD_VCC |
| 17 | GND |
| 16 | eDP_AUX#_CON |
| 15 | eDP_AUX_CON |
| 14 | GND |
| 13 | eDP_TX0_CON |
| 12 | eDP_TX#0_CON |
| 11 | GND |
| 10 | eDP_TX1_CON |
| 9 | eDP_TX#1_CON |
| 8 | GND |
| 7 | eDP_TX2_CON |
| 6 | eDP_TX#2_CON |
| 5 | GND |
| 4 | eDP_TX3_CON |
| 3 | eDP_TX#3_CON |
| 2 | GND |
| 1 | NA |
- 12 : Backlight Volume Control (BLT_VOL1)
| Pin | Signal Name |
|---|---|
| 1 | GPIO_VOL_UP |
| 2 | GPIO_VOL_DW |
| 3 | PWRDN |
| 4 | BLT_UP |
| 5 | BLT_DW |
| 6 | GND |
| 7 | GND |
- 13 : Inverter Power Control Wafer (BLT_PWR1)
| Pin | Signal Name |
|---|---|
| 1 | GND |
| 2 | GND |
| 3 | CON_LBKLT_CTL |
| 4 | CON_LBKLT_EN |
| 5 | LCD_BLT_VCC |
| 6 | LCD_BLT_VCC |
- 14 : eDP Inverter Power Control Wafer (EDP_BLT_PWR1)
| Pin | Signal Name |
|---|---|
| 1 | GND |
| 2 | GND |
| 3 | CON_LBKLT_CTL |
| 4 | CON_LBKLT_EN |
| 5 | LCD_BLT_VCC |
| 6 | LCD_BLT_VCC |
- 15 : Backlight Power Select (LCD_BLT_VCC) (BKT_PWR1)
- 1- 2: LCD_BLT_VCC: +5V (Default)
- 2- 3: LCD_BLT_VCC: +12V
- 4-5: LCD_BLT_VCC: DC_IN

-
16 : Panel Power Select (LCD_VCC) (PNL_PWR1)
- 1- 2: LCD_VCC: +3V (Default)
- 2- 3: LCD_VCC: +5V
- 4-5: LCD_VCC: +12V
-
17 : Clear CMOS Header (CLRMOS1)
- 1- 2: Auto Clear CMOS (Default)
- 2- 3: Clear CMOS
-
18 : COM Port Headers (COM1~6)
| Pin | Signal Name | Signal Name | Pin |
|---|---|---|---|
| 1 | DDCD# | RRXD | 2 |
| 3 | TTXD | DDTR# | 4 |
| 5 | GND | DDSR# | 6 |
| 7 | RRTS# | CCTS# | 8 |
| 9 | PWR | 10 |
- This motherboard supports RS232/422/485 on COM1, 2 ports.
Please refer to table below for the pin definition. In addition, COM1, 2 ports (RS232/422/485) can be adjusted in BIOS setup utility > Advanced Screen > Super IO Configuration. You may refer to our user manual for details.
COM1, 2 Port Pin Definition
| Pin | RS232 | RS422 | RS485 |
|---|---|---|---|
| 1 | DCD | TX- | RTX- |
| 2 | RXD | TX+ | RTX+ |
| 3 | TXD | RX+ | N/A |
| 4 | DTR | RX- | N/A |
| 5 | GND | GND | GND |
| 6 | DSR | N/A | N/A |
| 7 | RTS | N/A | N/A |
| 8 | CTS | N/A | N/A |
| 9 | PWR | PWR | PWR |
- 19 : System Panel Header (PANEL1)
| Pin | Signal Name | Signal Name | Pin |
|---|---|---|---|
| 1 | HDLED+ | PLED+ | 2 |
| 3 | HDLED- | PLED- | 4 |
| 5 | GND | PWRBTN# | 6 |
| 7 | RESET# | GND | 8 |
| 9 | GND | 10 |
- 20 : SMB_TEST1
| Pin | Signal Name |
|---|---|
| 1 | GPIO |
| 2 | SMB_CLK_MAIN |
| 3 | SMB_DATA_MAIN |
| 4 | GND |
| 5 | Time SYNC |
-
21 : COM Port PWR Setting Jumpers PWR_COM1~6 (For COM Port1~6)
- 1- 2: +5V (Default)
- 2- 3: +12V
-
22 : Digital Input / Output Default Value Setting (JGPIO_SET1)
- 1- 2: Pull-High (Default)
- 2- 3: Pull-Low
-
23 : Digital Input/Output Pin Header (JGPIO1)
| Pin | Signal Name | Signal Name | Pin |
|---|---|---|---|
| 1 | SIO_GP71 | GPP_D4 | 2 |
| 3 | SIO_GP72 | GPP_E1 | 4 |
| 5 | SIO_GP73 | GPP_E2 | 6 |
| 7 | SIO_GP74 | GPP_E13 | 8 |
| 9 | JGPIOPWR | GND | 10 |
-
24 : Digital Input / Output Power Select (JGPIO_PWR1)
- 1- 2: +12V
- 2- 3: +5V (Default)
-
25 : DACC Header (DACC1)
- Open: No ACC
- Short: ACC (Default)
- Auto clear CMOS when system boot improperly.
-
26 : PCIE_ISOLATION1
| Pin | Signal Name |
|---|---|
| 1 | PSON# |
| 2 | GND |
-
Connect to PCIE_ISOLATION_1 header on VGA-PWR card.
-
27 : ATX/AT Mode Jumper (SIO_AT1)
- Open: ATX Mode (Default)
- Short: AT Mode
-
28 : Chassis Intrusion Headers (CI1, CI2)
CI1:
- Open: Normal (Default)
- Short: Active Case Open
CI2:
-
Open: Active Case Open
-
Short: Normal (Default)
-
29 : ESPI Header (ESPI1)
| Pin | Signal Name |
|---|---|
| 1 | GND |
| 2 | ESPI_CLK |
| 3 | GND |
| 4 | ESPI_CS# |
| 5 | ESPI_RESET# |
| 6 | GND |
| 7 | +3V |
| 8 | GND |
| 9 | SMB_CLK |
| 10 | SMB_DATA |
| 11 | ESPI_IO0 |
| 12 | ESPI_IO1 |
| 13 | ESPI_IO2 |
| 14 | ESPI_IO3 |
| 15 | GND |
| 16 | +3VSB |
| 17 | Internal Use |
| 18 | Internal Use |
| 19 | ESPI_ALERT# |
| 20 | GND |
- 30 : Buzzer Header (BUZZ2)
| Pin | Signal Name |
|---|---|
| 1 | +5V |
| 2 | BUZZ_LOW |
- 31 : Buzzer (BUZZ1)
- 32 : SIM Socket (SIM1)
- 33 : Battery Connector (BAT1)
| Pin | Signal Name |
|---|---|
| 1 | +BAT |
| 2 | GND |
- 34 : Front Panel Audio Header (HD_AUDIO1)
| Pin | Signal Name | Signal Name | Pin |
|---|---|---|---|
| 1 | MIC1_L | GND | 2 |
| 3 | MIC1_R | 4 | |
| 5 | OUT2_R | MIC_RET | 6 |
| 7 | J_SENSE | 8 | |
| 9 | OUT2_L | OUT_RET | 10 |
- 35 : 3W Audio AMP Output Wafer (SPEAKER1)
| Pin | Signal Name |
|---|---|
| 1 | OUTLN |
| 2 | OUTLP |
| 3 | OUTRP |
| 4 | OUTRN |
- 36 : SPDIF Header (SPDIF1)
| Pin | Signal Name |
|---|---|
| 1 | +5V |
| 2 | |
| 3 | SPDIF OUT |
| 4 | GND |
-
37 : Audio Jack: Pink – Mic In
-
38 : Audio Jack: Green – Line Out
-
39 : USB 2.0 Ports (USB2_3_4)
-
40 : RJ45 LAN Port (LAN2)
-
41 : RJ45 LAN Port (LAN1)
-
42 : USB 3.2 Gen2 Ports (USB3_1_2)
-
43 : Top: HDMI Port (HDMI1)
Bottom: HDMI Port (HDMI2) -
44 : Thunderbolt Type-C Port (TC_T0)
-
45 : Thunderbolt Type-C Port (TC_T1)
-
46 : DC Jack (DC_JACK1)
Installation of ROM Socket

-
Do not apply force to the actuator cover after ic inserted.
-
Do not apply force to actuator cover when it is opening over 120 degree, Otherwise, the actuator cover may be broken.
-
The yellow dot (Pin1) on the ROM must be installed at pin1 position of the socket (white arrow area).
-
Make sure the white dot on the ROM is installed outwards of the socket.
-
For further details of how to install ROM, please refer to ASRI website. Warning: If the installation does not follow as the picture, then it may cause severe damage to chipset & MB.
Read User Manual Online (PDF format)
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