SUPERMICRO X13SCW-F High Performance Server Boards User Manual

May 15, 2024
SuperMicro

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SUPERMICRO X13SCW-F High Performance Server Boards

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Specifications

  • Model: X13SCW-F
  • Manual Revision: 1.0
  • Release Date: December 14, 2023
  • Manufacturer: Super Micro Computer, Inc.
  • Property: Software and documentation

Product Information

The X13SCW-F motherboard is designed for system integrators, IT technicians, and knowledgeable end users. It is a product of Super Micro Computer, Inc. and is provided under a license. The manual includes important safety precautions and installation instructions to ensure proper use of the motherboard.

Product Usage Instructions

About This Manual:

This manual provides detailed information for the installation and use of the X13SCW-F motherboard. It is essential to follow the instructions carefully to prevent damage to components or injury.

About This Motherboard:

The X13SCW-F motherboard is suitable for various technical users and integrators. It is important to adhere to the symbols and warnings provided in the manual to ensure safe handling and installation.

Contact Information:

If you need to contact Super Micro Computer, Inc., you can reach
them at the following:

FAQs

  • Q: What should I do if I encounter high voltage while using the motherboard?
    • A: If you encounter high voltage while using the motherboard, stop the procedure immediately and seek professional assistance to prevent any harm to yourself or damage to the components.
  • Q: Can I reproduce or copy any part of this document?
    • A: No, unless you receive written permission from Super Micro Computer, Inc., reproduction or copying of any part of this document is not allowed.

“`

X13SCW-F
USER’S MANUAL
Revision 1.0

The information in this User’s Manual has been carefully reviewed and is believed to be accurate. The vendor assumes no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date version of this manual, please see our website at www.supermicro.com.
Super Micro Computer, Inc. (“Supermicro”) reserves the right to make changes to the product described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/ or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except as expressly permitted by the terms of said license.
IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING, INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro’s total liability for all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in an industrial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual, may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely to cause harmful interference, in which case you will be required to correct the interference at your own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.
WARNING: This product can expose you to chemicals including
! lead, known to the State of California to cause cancer and birth
defects or other reproductive harm. For more information, go to www.P65Warnings.ca.gov.
The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical systems whose failure to perform be reasonably expected to result in significant injury or loss of life or catastrophic property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and proceedings of any kind arising out of or related to such ultra-hazardous use or sale.
Manual Revision 1.0
Release Date: December 14, 2023
Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this document. Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks or registered trademarks of their respective companies or mark holders.
Copyright © 2023 by Super Micro Computer, Inc. All rights reserved. Printed in the United States of America

Preface

Preface
About This Manual
This manual is written for system integrators, IT technicians, and knowledgeable end users. It provides information for the installation and use of the X13SCW-F motherboard.
About This Motherboard
The Supermicro X13SCW-F motherboard supports an Intel® Xeon® E-2400 or 12th Generation Pentium processor in a V0 – LGA 1700 socket with up to eight cores and a thermal design power (TDP) of up to 95 W. Built with the Intel C266 chipset, this motherboard supports up to 128 GB of ECC UDIMM DDR5 memory with speeds of up to 4400 MT/s in any of the population configurations (one or two DIMM(s) per channel). It features PCIe 5.0 slots, SATA 3.0 connections via SlimSAS, two M.2 slots in the 2280/22110 form factors, dual 1GbE LAN ports, and a Trusted Platform Module (TPM) header. This motherboard is the perfect solution for network appliance, telecommuting, and media-transcoding. Note that this motherboard is intended to be installed and serviced by professional technicians only. For processor/memory updates, refer to our website at http://www.supermicro.com/products/.
Conventions Used in the Manual
Special attention should be given to the following symbols for proper installation and to prevent damage done to the components or injury to yourself:
Warning! Indicates important information given to prevent equipment/property damage or personal injury.
Warning! Indicates high voltage may be encountered while performing a procedure.
Important: Important information given to ensure proper system installation or to relay safety precautions.
Note: Additional Information given to differentiate various models or provides information for proper system setup.
3

Super X13SCW-F User’s Manual

Contacting Supermicro

Headquarters

Address:

Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel:

+1 408-503-8000

Fax:

+1 408-503-8008

Email:

[email protected] (General Information)

[email protected] (Sales Inquiries)

[email protected] (Gov. Sales Inquiries)

[email protected] (Technical Support)

[email protected] (RMA Support)

[email protected] (Webmaster)

Website:

www.supermicro.com

Appendix A BIOS Codes Appendix B Software Appendix C Standardized Warning Statements Appendix D UEFI BIOS Recovery

Table of Contents

7

Super X13SCW-F User’s Manual

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader. Supermicro motherboards are designed to provide you with the highest standards in quality and performance. In addition to the motherboard, several important parts that are included with your shipment are listed below. If anything listed is damaged or missing, contact your retailer.
1.1 Checklist

Description Supermicro Motherboard Slimline x8 to 4x SATA Cable Quick Reference Guide

Main Parts List

Part Number X13SCW-F CBL-SAST-1275A-100 MNL-2559-QRG

Quantity 1 1 1

Important Links
For your system to work properly, follow the links below to download all necessary drivers/ utilities and the user manual for your server.
· Frequently Asked Questions: https://www.supermicro.com/FAQ/index.php · Supermicro product manuals: http://www.supermicro.com/support/manuals/ · Product drivers and utilities: https://www.supermicro.com/wdl/driver/ · Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm · A secure data deletion tool designed to fully erase all data from storage devices can be
found at our website: https://www.supermicro.com/about/policies/disclaimer.cfm?url=/wftp/ utility/Lot9_Secure_Data_Deletion_Utility/
· If you have any questions, contact our support team: [email protected]
This manual may be periodically updated without notice. Check the Supermicro website for possible updates to the manual revision level.
8

Chapter 1: Introduction Figure 1-1. X13SCW-F Motherboard Image
Note: All graphics shown in this manual were based upon the latest PCB revision available at the time of publication of the manual. The motherboard you received may or may not look exactly the same as the graphics shown in this manual.
9

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

Super X13SCW-F User’s Manual
Figure 1-2. X13SCW-F Motherboard Layout (not drawn to scale)

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA
MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME

J7

M.2-P

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

JPI2C1 PWR I2C

MH5

JPW1

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR
FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

JSATA1
I-SATA0­7

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

USB9/10(3.2) JDBG2 JVRM1

Note: Components not documented are for internal testing only. 10

Chapter 1: Introduction

Quick Reference

JUIDB1 JPME2
MH2 JSXB1A
JSXB2 JPL1
LEDM1 JPL2 JPG1 JBT1
JSXB1B
JNVME1
MH3 JSXB1C DIMMA1 DIMMA2 DIMMB1 DIMMB2 I-SATA0­I-SATA7

JSATA1 I-SATA0­7

JSXB1C

JSXB1B SXB1B:PCIe x16

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1A

USB6/7 (3.2)

COM1

JWD1

USB0/1

UID-LED

VGA LAN2 LAN1 IPMI_LAN

MH1

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

USB2/3 USB4/5 +

USB9/10(3.2) JDBG2 JVRM1

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

SRW7 COM2 BT1 USB2/3 USB4/5 SRW5 SRW6 USB8 (3.2) SRW4
JTPM1
LEDMCU1
USB9/10 (3.2) J26 J23 MH7
JPI2C1

JPI2C1 PWR I2C

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JL1 MH5 JBPNI2C1 JSEN1 JIPMB1
LE6 JF1 LEDPWR MH4
Notes:

JIPMB1

MH5

JSEN1

DIMMA1 DIMMA2

DDIIMMMMBB12FAN4

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

FAN3

MH4 FAN5
FAN6 FAN5 FAN4 FAN3

CPU

JPW1

CPU JPW1

FAN1 FAN2

JPW2 MH6

JPW2 MH6

FAN2 FAN1

· See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-
nections.

· ” ” indicates the location of Pin 1.

· Jumpers/components/LED indicators not indicated are used for internal testing only.

· Use only the correct type of onboard CMOS battery as specified by the manufacturer. Do
not install the onboard battery upside down to avoid possible explosion.

11

Super X13SCW-F User’s Manual

Quick Reference Table

Jumper JBT1 JPG1 JPL1, JPL2 JPME2

Description CMOS Clear VGA Enable LAN1, LAN2 Enable ME Manufacturing Mode

Default Setting Open (Normal) Pins 1­2 (Enabled) Pins 1­2 (Enabled) Pins 1­2 (Normal)

LED
LE6
LEDM1 LEDMCU1 LEDPWR UID-LED

Description
Power Ready LED
BMC Heartbeat LED Micro Control Unit (MCU) Heartbeat LED Onboard Power LED Unit Identifier (UID) LED

Status Solid Amber: Standby Solid Red: Power Failed Solid Green: Power On Blinking Green: BMC Normal Blinking Green: MCU Normal Solid Green: Power On Solid Blue: Unit Identified

Connector BT1 COM1, COM2 FAN1­FAN6 IPMI_LAN I-SATA0­I-SATA7 JBPNI2C1 JF1 JIPMB1 JL1 JNVME1 JPI2C1 JPW1 JPW2 JSEN1 JSXB1A, JSXB1B, JSXB1C JSXB2 JTPM1 JUIDB1 LAN1, LAN2
M.2-C

Description Onboard Battery COM Port, COM Header CPU/System Fan Headers Dedicated IPMI LAN Port Intel® PCH SATA 3.0 Ports (with RAID 0, 1, 5, 10) 4-pin BMC External I2C Header (for a BPN-NVME5-LA15-S4 backplane) Front Control Panel Header 4-pin BMC External I2C Header (for an IPMI card) Chassis Intrusion Header NVMe MCIO Connector x8 (two PCIe 4.0 x4 via PCH) Power I2C System Management Bus (SMB) Header 24-pin ATX Power Supply Connector 8-pin Power Connector Inlet Sensor Header Supermicro Proprietary WIO_L (Left) Add-On Card Slots Supermicro Proprietary WIO_R (Right) Add-On Card Slot Trusted Platform Module (TPM)/Port 80 Header Unit Identifier (UID) Switch 1GbE LAN Ports M.2 Slot for CPU PCIe 4.0 x4 (Supports M-Key 2280/22110 FF)

Note: The table above is continued on the next page.

12

Connector
M.2-P
SRW4­SRW7 USB0/1 USB2/3, USB4/5 USB6/7 USB8 USB9/10 VGA

Description M.2 Slot for PCH PCIe 4.0 x4 (Supports M-Key 2280/22110 FF) M.2 Mounting Holes Back Panel USB 2.0 Ports Front Accessible USB 2.0 Headers Back Panel USB 3.2 Gen 2 x1 Ports USB 3.2 Gen 2 x1 Type-A Header Front Accessible USB 3.2 Gen 1 x1 Header VGA Port

Chapter 1: Introduction

13

Super X13SCW-F User’s Manual

Motherboard Features

Motherboard Features CPU
· Supports an Intel Xeon E-2400 or 12th Generation Pentium (V0 – LGA1700) processor with up to eight cores Memory
· Up to 128 GB of ECC UDIMM DDR5 memory with speeds of up to 4400 MT/s in four memory slots

Note: This motherboard supports 4400 MT/s with the one or two DIMM(s) per channel population configuration.

DIMM Size · 8 GB, 16 GB, 32 GB at 1.1 V

Note: For the latest CPU/memory updates, refer to our website at http://www.supermicro.com/products/motherboard.

Chipset

· Intel C266

Expansion Slots · One Supermicro-Proprietary WIO-L Slot PCIe 5.0 x16 (JSXB1A, JSXB1B, JSXB1C) · One Supermicro-Proprietary WIO-R Slot PCIe 4.0 x4 (JSXB2) · One M.2 slot for CPU PCIe 4.0 x4 (Supports M-Key 2280/22110 FF) · One M.2 slot for PCH PCIe 4.0 x4 (Supports M-Key 2280/22110 FF)
Network Controllers
· Intel I210 for Dual 1 GbE BASE-T Ports · One Dedicated IPMI LAN port located on the back I/O panel
Baseboard Management Controller (BMC)

· ASpeed AST2600 BMC

Graphics

· Graphics controller via ASpeed AST2600 BMC

I/O Devices
· Serial (COM) Port · SlimSAS x8 Connector · Video (VGA) Port

· One serial port on the back I/O panel (COM1) · One front accessible serial port header (COM2) · Eight SATA 3.0 ports at 6 Gb/s (I-SATA 0­I-SATA7 with RAID 0, 1, 5, 10)
· One VGA connection on the back I/O panel

Notes: The table above is continued on the next page. 14

Chapter 1: Introduction
Motherboard Features
Peripheral Devices · Two USB 2.0 ports on the back I/O panel (USB0/1) · Two USB 3.2 Gen 2 x1 ports on the back I/O panel (USB6/7) · Two front accessible USB 2.0 headers with two USB connections each (USB2/3, USB4/5) · One front accessible USB 3.2 Gen 1 x1 header with two USB connections (USB9/10) · One USB 3.2 Gen 2 x1 Type-A header (USB8)
BIOS · 256Mb AMI BIOS® SPI Flash BIOS · ACPI 6.0 or later, PCI F/W 3.0 or later, Plug and Play (PnP), SPI dual speed support, riser card auto detection support,
SMBIOS 2.7 or later, real time clock (RTC) wakeup
Power Management · ACPI power management · Power button override mechanism · Power-on mode for AC power recovery · Power supply monitoring
System Health Monitoring · Onboard voltage monitoring for +3.3 V, +5 V, +12 V, +3.3 V Stby, +5 VStby, Vcore, Vmem, CPU temperature, PCH
temperature, system temperature, memory temperature, and peripheral temperature
· 6 CPU switch phase voltage regulator · CPU thermal trip support · Platform Environment Control Interface (PECI)/TSI Fan Control · Fan status monitoring via IPMI connections · Single cooling zone · Multi-fan speed control support through onboard BMC · Six 4-pin fan headers System Management · Trusted Platform Module (TPM) support · Watchdog · Chassis intrusion header and detection · Server Platform Service LED Indicators · CPU/system overheat LED · Power/suspend-state indicator LED · Fan failed LED · UID/remote UID · HDD activity LED · LAN activity LED
Notes: The table above is continued on the next page.
15

Super X13SCW-F User’s Manual Motherboard Features
Dimensions · 8″ (W) x 13″ (L) (203.2 mm x 330.2 mm) Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and heatsink cooling restrictions. For proper thermal management, check the chassis and heatsink specifications for proper CPU TDP sizing. Note 2: For IPMI configuration instructions, refer to the Embedded IPMI Configuration User’s Guide available at http://www.supermicro.com/support/manuals/. Note 3: Starting in 2020, Supermicro ships standard products with a unique password that can be found on a label on the motherboard. For products shipped before 2020, the manufacturer default username is ADMIN and the password is ADMIN. For general documentation and information on IPMI, visit our website at: https://www.supermicro. com/en/solutions/management-software/bmc-resources.
16

Chapter 1: Introduction

Figure 1-3. System Block Diagram

IMVP 9.1 95 W 6 PHASE for Vcore 1 PHASE for VCCIN AUX

SXB1 PCIe 5.0 x16

PCIe Gen5 x16 #0­15 LGA1700 PEG60 DMI4 #0­3

B2 #B1 #A2

A1

RMII/NCSI DDR5-4400

DMI4 x8

PCIe Gen4 x4 M.2-C SSD

2x Intel I210

RJ45

LAN 2 I210

RJ45

LAN 1 I210

PCIe x1 #2
PCIe x1 #1

PCIe Gen4 x4 #21/22/23/24

M.2-P SSD

5/6/7/8 PCIe Gen4 x4 PCIe 4.0 x4 (in x16) SXB2

25/26/27/28 PCIe Gen4 x8 PCIe 4.0 x4 + x4 #9/10/11/12

MCIO

RJ45

PHY

RGMII

RTL8211FD-CG

DDR4
SPI BMC Boot Flash

BMC AST2600

SMBUS

VGA Connector

COM1 Connector

COM2 Header

Temp Sensor SYSTEM POWER

I-SATA0­7 SATA 6 Gb/s Slim SAS x8 (SATA)

PCIe x1 USB 2.0 eSPI SPI

PCH-H C266

1­2 #3­4

3

5

8, 9 USB 2.0USB 2.0 #6­7 USB 2.0 #12­13

USB 2.0 #10­11

USB 3.2 Gen 1 x1 USB 3.2 Gen 2 x1 USB 3.2 Gen 2 x1
USB 2.0 USB 2.0

2x USB 3.2 Gen 1 x1 (Header) 2x USB 3.2 Gen 2 x1 (Rear I/O) 1x USB 3.2 Gen 2 x1 (Type-A Vertical) 4x USB 2.0 (Header) 2x USB 2.0 (Rear I/O)

SPI

SMBus

MCU

MUX SPI
BIOS

TPM HEADER Debug Card

M2351

FRONT PANEL

FAN SPEED CTRL

Note: This is a general block diagram and may not exactly represent the features on your motherboard. See the previous pages for the actual specifications of your motherboard.
17

Super X13SCW-F User’s Manual
1.2 Processor and Chipset Overview
Built upon the functionality and capability of the Intel Xeon E-2400 or 12th Generation Pentium processor (V0 – (LGA1700), and the Intel C266 chipset, the X13SCW-F motherboard provides optimized system performance, efficient power management, and features based on cutting edge technology to address the needs of next-generation computer users. The X13SCW-F offers maximum I/O flexibility and data reliability in an Intel 7 process technology and is ideal for network appliance, telecommuting, and media-transcoding. The Intel Xeon E-2400 or 12th Generation Pentium processor, and the Intel C266 chipset support the following features:
· DDR5 288-pin memory support · Intel Hyper-Threading, Intel VT-D, VT-x · Intel SGX · Intel Turbo Boost Technology · SPI Enhancements · Intel Node Manager, which provides a suite of tools to control and monitor power, thermal,
and resource usage
· BMC supports remote management, virtualization, and the security package for enterprise
platforms
1.3 Special Features
Recovery from AC Power Loss
The Basic I/O System (BIOS) provides a setting that determines how the system will respond when AC power is lost and then restored to the system. You can choose for the system to remain powered off (in which case you must press the power switch to turn it back on), or for it to automatically return to the power-on state. See the Advanced BIOS Setup section for this setting. The default setting is Last State.
18

Chapter 1: Introduction
1.4 System Health Monitoring
Onboard Voltage Monitors
An onboard voltage monitor will continuously scan the voltages of the onboard chipset, memory, CPU, and battery. Once a voltage becomes unstable, a warning is given or an error message is sent to the screen. You can adjust the voltage thresholds to define the sensitivity of the voltage monitor. Real time voltage levels are displayed in IPMI.
Fan Status Monitor with Firmware Control
The system health monitor embedded in the BMC chip can check the RPM status of the cooling fans. The CPU and chassis fans are controlled via lPMI.
Environmental Temperature Control
System Health sensors in the BMC monitor the temperatures and voltage settings of onboard processors and the system in real time via the IPMI interface. Whenever the temperature of the CPU or the system exceeds a user-defined threshold, system/CPU cooling fans will be turned on to prevent the CPU or the system from overheating.
Note: To avoid possible system overheating, be sure to provide adequate airflow to your system.
System Resource Alert
This feature is available when used with SuperDoctor 5®. SuperDoctor 5 is used to notify you of certain system events. For example, you can configure SuperDoctor 5 to provide you with warnings when the system temperature, CPU temperatures, voltages, and fan speeds go beyond a predefined range.
19

Super X13SCW-F User’s Manual
1.5 ACPI Features
ACPI stands for Advanced Configuration and Power Interface. The ACPI specification defines a flexible and abstract hardware interface that provides a standard way to integrate power management features throughout a computer system, including its hardware, operating system and application software. This enables the system to automatically turn on and off peripherals such as network cards, hard disk drives, and printers. In addition to enabling operating system-directed power management, ACPI also provides a generic system event mechanism for Plug and Play, an operating system-independent interface for configuration control. ACPI leverages the Plug and Play BIOS data structures while providing a processor architecture-independent implementation that is compatible with Windows Server 2016 (64-bit, MSFT Inbox graphic drivers), RedHat Enterprise Linux Server (64-bit), SUSE Linux Enterprise Server (64-bit), and Ubuntu Server (64-bit) operating systems.
1.6 Power Supply
As with all computer products, a stable power source is necessary for proper and reliable operation. It is even more important for processors that have high CPU clock rates where noisy power transmission is present. The X13SCW-F motherboard accommodates a 24-pin ATX power supply. Although most power supplies generally meet the specifications required by the CPU, some are inadequate. In addition, one 12 V 8-pin power connection is also required to ensure adequate power to the system.
Warning: To avoid damaging the power supply or the motherboard, be sure to use power supplies that contain 24-pins and 8-pins, respectively. Be sure to connect the power supplies to the 24-pin power connector (JPW1), and the 8-pin power connector (JPW2) on the motherboard. Failure in doing so may void the manufacturer warranty on your power supply and motherboard. It is strongly recommended that you use a high quality power supply that meets ATX power supply Specification 2.02 or above and is SSI compliant. (For more information, refer to the website at http://www.ssiforum.org/).
1.7 Serial Port
The X13SCW-F motherboard supports two serial communication connections. COM Port 1 and COM Header 2 can be used for input/output. The UART provides legacy speeds with a baud rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or 1 Mb/s, which support high-speed serial communication devices.
20

Chapter 2: Installation
Chapter 2

Installation

2.1 Static-Sensitive Devices
Electrostatic Discharge (ESD) can damage electronic components. To avoid damaging your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD.
Precautions · Use a grounded wrist strap designed to prevent static discharge. · Touch a grounded metal object before removing the board from the antistatic bag. · Handle the motherboard by its edges only. Do not touch its components, peripheral chips,
memory modules, or gold contacts.
· When handling chips or modules, avoid touching their pins. · Put the motherboard and peripherals back into their antistatic bags when not in use. · For grounding purposes, make sure that your computer chassis provides excellent conduc-
tivity between the power supply, the case, the mounting fasteners, and the motherboard.
· Use only the correct type of onboard CMOS battery. Do not install the onboard battery
upside down to avoid possible explosion.
Unpacking
The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking the motherboard, make sure that the person handling it is static protected.
21

Super X13SCW-F User’s Manual

2.2 Motherboard Installation
All motherboards have standard mounting holes to fit different types of chassis. Make sure that the locations of all the mounting holes for both the motherboard and the chassis match. Although a chassis may have both plastic and metal mounting fasteners, metal ones are highly recommended because they ground the motherboard to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.
Tools Needed

8 9 10 11 12 13

14
Torque Driver (1)

JSXB1C

JSXB1B SXB1B:PCIe x16

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1A

Phillips Screws (7)

Standoffs (7) Only if Needed

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB2/3 USB4/5 +

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME

J7

M.2-P

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

MH5

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JPW1

JSEN1

JIPMB1

DIMMA1 DIMMA2

DDIIMMMMBB12FAN4

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

CPU

JPW2

FAN1 FAN2

LEDPWR FAN6

MH4 FAN5

FAN3

MH6

Location of Mounting Holes

Note 1: Do not use a force greater than 8 in-lbf (0.904 N-m) on each mounting screw during motherboard installation. Exceeding this force may over-torque the screw, causing damage to the motherboard and screw.

Note 2: Some components are very close to the mounting holes. Take precautionary measures to avoid damaging these components when installing the motherboard to the chassis.

22

Chapter 2: Installation
Installing the Motherboard
1. Install the I/O shield into the back of the chassis, if applicable.
2. Locate the mounting holes on the motherboard. See the previous page for the location.
3. Locate the matching mounting holes on the chassis. Align the mounting holes on the motherboard against the mounting holes on the chassis.
4. Install standoffs in the chassis as needed. 5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components. 6. Using the torque driver, insert a pans head #6 screw into a mounting hole on the
motherboard and its matching mounting hole on the chassis. 7. Repeat Step 6 to insert #6 screws into all mounting holes. 8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis or components might look different from those shown in this manual.
23

Super X13SCW-F User’s Manual
2.3 Processor and Heatsink Installation
· Use ESD protection. · Unplug the AC power cord from all power supplies after shutting down the system. · Check that the plastic protective cover is on the CPU socket and none of the socket pins
are bent. If they are, contact your retailer.
· When handling the processor, avoid touching or placing direct pressure on the LGA lands
(gold contacts). Improper installation or socket misalignment can cause serious damage to the processor or CPU socket, which may require manufacturer repairs.
· If you buy a CPU separately, make sure that you use an Intel-certified multi-directional
heatsink only.
· Refer to the Supermicro website for updates on processor support. · All graphics in this manual are for illustrational purposes only. Your components may look
different.
Installing the LGA 1700 Processor

Plastic protective cover
Load Lever

Load Plate

24

1. Remove the plastic protective cover from the load plate.

Chapter 2: Installation

Lever lock
2. Gently push down the load lever to release and lift it, then lift the load plate to open it completely.
3. Use your thumb and your index finger to hold the CPU. Align the small triangle maker and notches on the CPU to the corresponding triangle maker and notches on the CPU
Pin 1 CPU notch
CPU load bracket notch
load bracket. Once aligned, carefully lower the CPU straight down into the socket. (Do not drop the CPU on the socket, or move it horizontally or vertically.) 4. Do not rub the CPU against the surface or against any pins of the socket to avoid damaging the CPU or the socket.
25

Super X13SCW-F User’s Manual 5. With the CPU inside the socket, inspect all the corners to make sure it is properly installed.
Lever lock
6. Close the load plate with the CPU inside the socket. Gently push the load lever down until it locks under the Lever Lock latch. Attention! You can only install the CPU inside the socket in one direction. Make sure that it is properly inserted into the CPU socket before closing the load plate. If it doesn’t close properly, do not force it as it may damage your CPU. Instead, open the load plate again and double-check that the CPU is aligned properly.
26

Chapter 2: Installation
Installing the CPU Heatsink
Note 1: The installation described in this section is for reference only. The actual installation steps may vary depending on the CPU heatsink model. Please refer to the heatsink instruction for more details. Note 2: Graphic drawings included in this manual are for reference only. They might look different from the components installed in your system. 1. Loosen four screws to release the backplate. Note that one screw is not shown in the illustration below.
Heatsink

Backplate

Unscrew Unscrew

Unscrew

2. If there is a thin layer of protective film on the backplate, remove it.

Protective film

Backplate top side

27

Super X13SCW-F User’s Manual 3. Attach the backplate into the mounting holes around the CPU socket on the bottom side of the motherboard.
Backplate bottom side
Motherboard bottom side Mounting hole
Motherboard Top side
28

Chapter 2: Installation
4. Remove the thin layer of protective film from the heatsink. CPU overheating may occur if the protective film is not removed from the heatsink.

5. Place the heatsink on top of the CPU so that the four mounting holes on the heatsink are aligned with those on the retention mechanism.
6. With a T30 bit torque driver set to a force of 8.0 in-lbf (0.904 N-m), tighten the screws.

3 4 5 6 7 8 9 10 11

8.0
IN-LBF
0.904
N-M

Screw Screw

Screw
Motherboard top side

29

Super X13SCW-F User’s Manual
Removing the CPU Heatsink
Warning: We do not recommend that the CPU or heatsink be removed. However, if you do need to remove the heatsink, follow the instructions below to remove the heatsink and prevent damage done to the CPU or other components. 1. Unplug the power cord from the power supply and the power connector from the cooler
and fan header. 2. Loosen the screws as shown below. 3. Gently wiggle the heatsink to loosen it. Do not use excessive force when wiggling the
heatsink.

Unscrew Unscrew

Unscrew

4. Once the heatsink is loosened, remove it from the motherboard.

30

Chapter 2: Installation
2.4 Memory Support and Installation
Notes: Check the Supermicro website for recommended memory modules. Exercise extreme care when installing or removing DIMM modules to prevent any damage.
Memory Support
The X13SCW-F supports up to 128 GB of ECC UDIMM DDR5 memory with speeds of up to 4400 MT/s in any of the population configurations (one or two DIMM(s) per channel). Refer to the tables below for the recommended DIMM population order and additional memory information.

Number of DIMMs 1 2 4
DIMM Type 1R UDIMM 2R UDIMM 1R or 2R UDIMM

1 CPU, 4 DIMM Slots
Memory Population Sequence
DIMMB2 DIMMA2
DIMMB2 / DIMMB1 DIMMB2 / DIMMA2 DIMMA2 / DIMMA1
DIMMB2 / DIMMA2 / DIMMB1/ DIMMA1

Memory Support Speed (MT/s)
4000 3600 4400

DIMM Slots DIMMA1, DIMMA2, DIMMB1, DIMMB2 DIMMA1, DIMMA2, DIMMB1, DIMMB2
DIMMA2, DIMMB2

31

Super X13SCW-F User’s Manual

General Guidelines for Optimizing Memory Performance · The blue slots must be populated first.
· It is recommended to use DDR5 memory of the same type, size, and speed.
· Mixed DIMM speeds can be installed. However, all DIMMs will run at the speed of the
slowest DIMM.
· The motherboard will support an odd number amount of memory modules. However, to
achieve the best memory performance, a balanced memory population is recommended.

JSXB1A

USB2/3 USB4/5 +

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

JSXB1B SXB1B:PCIe x16

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME

J7

M.2-P

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

MH5

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JPW1

JSEN1

JIPMB1

DIMMA1 DIMMA2

DDIIMMMMBB12FAN4

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

CPU

LEDPWR FAN6

FAN3

MH4 FAN5
DIMMA1 DIMMA2 DIMMB1 DIMMB2
32

FAN1 FAN2

JPW2 MH6

DIMM Installation
1. Insert the desired number of DIMMs into the memory slots based on the recommended DIMM population table on page 31.
2. Push the release tabs outwards on both ends of the DIMM slot to unlock it.
3. Align the key of the DIMM module with the receptive point on the memory slot.
4. Align the notches on both ends of the module against the receptive points on the ends of the slot.
5. Press the notches on both ends of the module straight down into the slot until the module snaps into place.
6. Press the release tabs to the lock positions to secure the DIMM module into the slot.
DIMM Removal
Press both release tabs on the ends of the DIMM socket to unlock it. Once the DIMM module is loosened, remove it from the memory slot.

JIPMB1

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JSATA1 I-SATA0­7

JSXB1C

JSXB1B SXB1B:PCIe x16

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1A

Chapter 2: Installation

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

USB9/10(3.2) JDBG2 JVRM1

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME

J7

M.2-P

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

JPI2C1 PWR I2C

MH5

JPW1

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

Notches
Release Tabs Press both notches straight down into the memory slot.

33

Super X13SCW-F User’s Manual

2.5 Rear I/O Ports

See the layout below for the locations and descriptions of the various I/O ports on the rear

of the motherboard.

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB2/3 USB4/5 +

USB6/7 (3.2(10 Gb))
JPL2

JSXB1A

LEDM1

JSXB2 SXB2:PCIe x4

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

BMC

SRW7 22110

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JSXB1B SXB1B:PCIe x16

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

MH5

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JPW1

JSEN1

JIPMB1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

Back I/O Panel Port Locations and Definitions 2

1

3

5

7

8

9

10

4

6

Rear I/O Ports

Description

Description

1 COM1

6 USB6 (USB 3.2 Gen 2 x1)

2 Dedicated IPMI LAN

7 LAN1

3 USB1 (USB 2.0)

8 LAN2

4 USB0 (USB 2.0)

9 VGA Port

5 USB7 (USB 3.2 Gen 2 x1) 10 UID Switch

34

Chapter 2: Installation

COM Port There is one COM port (COM1) on the back I/O panel and one COM header (COM2) on the motherboard. The COM port and header provide serial communication support.

COM Port Pin Definitions

Pin# Definition

Pin# Definition

1

DCD

6

DSR

2

RXD

7

RTS

3

TXD

8

CTS

4

DTR

9

RI

5

GND

10 N/A

VGA Port The onboard VGA port is located next to LAN2 on the back I/O panel. Use this connection for VGA display.

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

JSATA1 I-SATA0­7

JWD1 JPME2

3
UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1 JPFR2

1

MH1 COM1

COM2 USB0/1 BT1

2

IPMI_LAN

USB2/3 USB4/5 +

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

USB9/10(3.2) JDBG2 JVRM1

JPI2C1 PWR I2C

MH5

JPW1

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

35

1. COM1 2. COM2 3. VGA Port

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

Super X13SCW-F User’s Manual

LAN Ports
Two Gigabit Ethernet ports (LAN1, LAN2) are located on the back I/O panel. In addition, a dedicated IPMI LAN is located above USB0/1. All of these ports accept RJ45 cables. Refer to the LED Indicator section for LAN LED information.

LAN Ports Pin Definition

Pin# Definition

Pin# Definition

1

TRD1+

13

IET+

2

TRD1-

14

IET-

3

TRCT1

15

L1-GRE-

4

TRD2+

16

L1-GRE+

5

TRD2-

17

L2-YEL-

6

TRCT2

18

COMMON

7

TRD3+

19

L2-GRE-

8

TRD3-

20

CG1

9

TRCT3

21

CG2

10

TRD4+

11

TRD4-

12

TRCT4

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

UID-SW JUIDB1 UID-LED

21

JWD1 JPME2

VGA MH2
LAN2 LAN1
JPFR2

3
MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

JPI2C1 PWR I2C

MH5

JPW1

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

JSATA1 I-SATA0­7

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

USB2/3 USB4/5 +

USB9/10(3.2) JDBG2 JVRM1

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

IPMI LAN Pin Definition

Pin# Definition

Pin# Definition

9

VCC

19

YEL-

10

TX1+

20

YEL+

11

TX1-

21

ORG+/GRN-

12

TX2+

22

ORG-/GRN+

13

TX2-

23

SGND

14

TX3+

24

SGND

15

TX3-

25

SGND

16

TX4+

26

SGND

17

TX4-

18

GND

1. LAN1 2. LAN2 3. IPMI LAN

36

Chapter 2: Installation

Unit Identifier Switch (UID-SW): One button with two functions A Unit Identifier (UID) switch and two LED Indicators are located on the motherboard. The UID switch is located next to the VGA port on the back panel.

Function
UID LED Indicator BMC Reset

User Input

Behavior

LED Activity

Push Once

Turns on the UID LED

UID LED turns solid blue

Push Again

Turns off the UID LED

UID LED turns off

Push and hold for 6 seconds BMC will do a cold boot

BMC Hearbeat LED turns solid green

Push and hold for 12 seconds BMC will reset to factory default BMC Hearbeat LED turns solid green

Note: After pushing and holding the UID-SW for 12 seconds, all BMC settings including username and password will revert back to the factory default. Only the network settings and FRU are retained.

UID Switch Pin Definitions

Pin# Definition

1

GND

2

GND

3

Button In

4

Button In

UID LED Pin Definitions

Color

Status

Blue: On Unit Identified

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

12

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

1. UID Switch 2. UID LED

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

MH5

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JPW1

JSEN1

JIPMB1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

37

Super X13SCW-F User’s Manual

Universal Serial Bus (USB) Ports
There are two USB 2.0 ports (USB0/1) and two USB 3.2 Gen 2 x1 ports (USB6/7) located on the back I/O panel. The motherboard also has two front access USB 2.0 headers (USB2/3, USB4/5) and one front access USB 3.2 Gen 1 x1 header (USB9/10). The USB8 header is USB 3.2 Gen 2 Type-A. The onboard headers can be used to provide front side USB access with a cable (not included).

Back Panel USB0/1 (2.0) Pin Definitions

Pin# Definition

Pin# Definition

1

+5 V

5

+5 V

2

USB_N

6

USB_N

3

USB_P

7

USB_P

4

GND

8

GND

Front Panel USB2/3, USB4/5(2.0) Pin Definitions

Pin# Definition

Pin# Definition

1

+5 V

2

+5 V

3

USB_N

4

USB_N

5

USB_P

6

USB_P

7

GND

8

GND

9

Key

10 NC

Back Panel USB6/7 (USB 3.2 Gen 2 x1) Pin Definitions

Pin# Definition

Pin# Definition

A1 VBUS

B1 VBUS

A2 USB_N

B2 USB_N

A3 USB_P

B3 USB_P

A4 GND

B4 GND

A5 Stda_SSRX- B5 Stda_SSRX-

A6 Stda_SSRX+ B6 Stda_SSRX+

A7 GND

B7 GND

A8 Stda_SSTX- B8 Stda_SSTX-

A9 Stda_SSTX+ B9 Stda_SSTX+

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

41

USB6/7 (3.2(10 Gb))
JPL2

UID-SW JUIDB1 UID-LED

VGA MH2

MH1 COM1
COM2

JWD1 JPME2

LAN2 LAN1

USB0/1 BT1

IPMI_LAN

JPFR2

2

BMC

3 SRW7
22110

USB2/3 USB4/5 +

LEDM1

JSXB2 SXB2:PCIe x4

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5

22110

SRW6 2280

5

JNVME1

C266

BIOS LICENSE
MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

SRW4 2280

JTPM1

LEDMCU1

LEDMCU2

6

JDBG5

M.2 NVME

J7

M.2-P

IPMI CODE MAC CODE

BAR CODE

M.2 NVME M.2-C
MH7

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

MH5

JPW1

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

Front Panel USB9/10 (USB 3.2 Gen 1 x1) Pin Definitions

Pin# Definition

Pin# Definition

1

VBUS

11 USB_P

2

Stda_SSTX-

12 USB_N

3

Stda_SSTX+

13 GND

4

GND

14 Stda_SSTX+

5

Stda_SSRX-

15 Stda_SSRX-

6

Stda_SSRX+ 16 GND

7

GND

17 Stda_SSTX+

8

USB_N

18 Stda_SSTX-

9

USB_P

19 VBUS

10 GND

USB8 (USB 3.2 Gen 2 x1 Type-A) Pin Definitions

Pin# Definition

Pin# Definition

1

VBUS

5

SSRX-

2

USB_N

6

SSRX+

3

USB_P

7

GND

4

GND

8

SSTX-

9

SSTX+

1. USB0/1 2. USB2/3 3. USB4/5 4. USB6/7 5. USB8 6. USB9/10

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

38

Chapter 2: Installation

2.6 Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed specifically for use with Supermicro chassis. See the figure below for the descriptions of the front control panel buttons and LED indicators.

JSXB1A

USB2/3 USB4/5 +

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

JSXB1B SXB1B:PCIe x16

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

MH5

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JPW1

JSEN1

JIPMB1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

Figure 2-1. JF1 Header Pins

1 PWR Power Button Reset Reset Button
3.3V UID LED 3.3V Stby 3.3V Stby
UID SW 3.3V

2 Ground Ground Power Fail LED OH/Fan Fail LED NIC2 Active LED NIC1 Active LED HDD LED PWR LED

X

X

NMI 19 20

Ground

39

Super X13SCW-F User’s Manual

Power Button
The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both pins will power on/off the system. This button can also be configured to function as a suspend button (with a setting in the BIOS – see Chapter 4). To turn off the power when the system is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for pin definitions.

Power Button Pin Definitions (JF1)

Pin# Definition

1

Signal

2

GND

Reset Button
The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset switch on the computer case to reset the system. Refer to the table below for pin definitions.

Reset Button Pin Definitions (JF1)

Pin# Definition

3

Reset

4

GND

12

1 PWR Power Button

Ground

2 Reset Reset Button

Ground

3.3V UID LED 3.3V Stby

Power Fail LED OH/Fan Fail LED NIC2 Active LED

3.3V Stby

NIC1 Active LED

UID SW

HDD LED

3.3V

PWR LED

X

X

NMI 19 20

Ground

40

1. PWR Button 2. Reset Button

Chapter 2: Installation

Power Fail LED The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below for pin definitions.
Power Fail LED Pin Definitions (JF1) Pin# Definition 5 3.3 V 6 PWR Supply Fail

Ovearheat/Fan Fail and UID LED
Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan Fail LED connections. The LED on pin 8 provides warnings of overheat or fan failure. Refer to the tables below for pin definitions.

OH/Fan Fail Indicator Status

State

Definition

Off

Normal

On

Overheat

Flashing Fan Fail

OH/Fan Fail LED Pin Definitions (JF1) Pin# Definition 7 UID LED (Blue)
8 OH/FAN Fail LED

1 PWR Power Button

2 Ground

Reset Reset Button

Ground

3.3V

Power Fail LED 1

2 UID LED

OH/Fan Fail LED 3

3.3V Stby

NIC2 Active LED

3.3V Stby

NIC1 Active LED

UID SW

HDD LED

3.3V

PWR LED

X

X

NMI 19 20

Ground

41

1. Power Fail LED 2. UID LED 3. OH/Fan Fail LED

Super X13SCW-F User’s Manual

NIC1/NIC2 (LAN1/LAN2)
The Network Interface Controller (NIC) LED connection for LAN port 1 is located on pins 11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to display network activity. Refer to the table below for pin definitions.

LAN1/LAN2 LED Pin Definitions (JF1)

Pins

Definition

9

VCC

10

NIC2 Link/Active LED

11

VCC

12

NIC1 Link/Active LED

HDD LED/UID Switch
The HDD LED/UID Switch connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to show hard drive activity status. Attach a cable to pin 13 to use the UID switch. Refer to the table below for pin definitions.
HDD LED/UID Switch Pin Definitions (JF1) Pin# Definition 13 3.3 V Stdby/UID SW 14 HDD Active

12

PWR Power Button

Ground

Reset Reset Button

Ground

3.3V

Power Fail LED

UID LED 3.3V Stby

OH/Fan Fail LED
NIC2 Active LED 1

3.3V Stby

NIC1 Active LED 2

3 UID SW

HDD LED 4

3.3V

PWR LED

X

X

NMI 19 20

Ground

42

1. NIC2 LED 2. NIC1 LED 3. UID Switch 4. HDD LED

Chapter 2: Installation
Power LED The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below for pin definitions.
Power LED Pin Definitions (JF1) Pin# Definition 15 3.3 V 16 PWR LED
NMI Button The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer to the table below for pin definitions.
NMI Button Pin Definitions (JF1) Pin# Definition 19 Control 20 GND

1 PWR Power Button

2 Ground

Reset Reset Button

Ground

3.3V

Power Fail LED

UID LED 3.3V Stby

OH/Fan Fail LED NIC2 Active LED

3.3V Stby

NIC1 Active LED

UID SW 3.3V

HDD LED
PWR LED 1

X

X

2 NMI

19 20

Ground

43

1. PWR LED 2. NMI

Super X13SCW-F User’s Manual

2.7 Connectors

Power Connections
ATX Power Supply Connector The primary 24-pin power supply connector (JPW1) meets the ATX SSI EPS 12 V specification. An 8-pin (JPW2) processor power connector must also be connected to your power supply.

ATX Power 24-pin Connector Pin Definitions

Pin# Definition Pin# Definition

13 +3.3 V

1

+3.3 V

14 NC

2

+3.3 V

15 GND

3

GND

16 PS_ON 4

+5 V

17 GND

5

GND

18 GND

6

+5 V

19 GND

7

GND

20 Res (NC) 8

PWR_OK

21 +5 V

9

5 VSB

22 +5 V

10 +12 V

23 +5 V

11 +12 V

24 GND

12 +3.3 V

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

1. 24-pin ATX Power Supply

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

MH5

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW1

1
JPW2 MH6
44

Chapter 2: Installation
8-Pin CPU Power Connector JPW2 is an 8-pin 12 V DC power input for the CPU that must be connected to the power supply. Refer to the table below for pin definitions.
12 V 8-pin Power Pin Definitions
Pin# Definition 1­4 GND 5­8 +12 V
Important: To provide adequate power supply to the motherboard, be sure to connect the 24-pin ATX power and the 8-pin power connectors to the power supply. Failure to do so may void the manufacturer warranty on your power supply and motherboard.

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

JSATA1 I-SATA0­7

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

JPI2C1 PWR I2C

MH5

USB9/10(3.2) JDBG2 JVRM1

JPW1

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2
1
MH6

45

1. 8-pin CPU Power

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

Super X13SCW-F User’s Manual

Headers
4-pin BMC External I2C Header
A System Management Bus header for IPMI 2.0 is located at JIPMB1. Connect the appropriate cable here to use the IPMB I2C connection on your system. Refer to the table below for pin definitions. JBPNI2C1 is used to updated the CPLD of the BPN-NVME5-LA15-S4 backplane.
Note: The cables for JIPMB1 and JBPNI2C1 must be equal to or shorter than 30 cm.

Chassis Intrusion

External I2C Header Pin Definitions

Pin# Definition

1

Data

2

GND

3

Clock

4

NC

NC = No Connection

A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable

from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to

the table below for pin definitions.

Chassis Intrusion Pin Definitions

Pin# Definition

1

Intrusion Input

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

2

GND

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB2/3 USB4/5 +

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME

J7

M.2-P

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

1. JIPMB1 2. JBPNI2C1 3. Chassis Intrusion

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

3
MH5
2

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JPW1

JSEN1

JIPMB1

1 JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6
46

Chapter 2: Installation

Fan Headers

There are six 4-pin fan headers (FAN1­FAN6) on the motherboard. All these 4-pin fan

headers are backwards compatible with the traditional 3-pin fans. However, fan speed control

is available for 4-pin fans only by Thermal Management via the IPMI 2.0 interface. Refer to

the table below for pin definitions.

Fan Header Pin Definitions
Pin# Definition

1

GND (Black)

2

+12 V (Red)

3

Tachometer

4

PWM Control

Inlet Temperature Sensor

JSEN1 is the system front inlet temperature sensor. It represents the ambient air temperature

entering the system. The equivalent temperature sensor retrievable by the onboard BMC is

RT0.

Inlet Sensor Header Pin Definitions

Pin# Definition

1

Data

2

GND

3

CLK

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

4

P3V3_STBY

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

1. FAN1 2. FAN2

USB2/3 USB4/5 +

USB6/7 (3.2(10 Gb))
JPL2

JSXB1A

LEDM1

JSXB2 SXB2:PCIe x4

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

BMC

SRW7 22110

3. FAN3

JSXB1B SXB1B:PCIe x16

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

4. FAN4 5. FAN5 6. FAN6 7. JSEN1

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

7 MH5

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JPW1

JSEN1

JIPMB1

DIMMA1 DIMMA2

DDIIMMMMBB12FAN4

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

4

CPU

LEDPWR FAN6

FAN3

6

5MH4

3

2

FAN5

FAN1 FAN2

JPW2 MH6
1
47

Super X13SCW-F User’s Manual
M.2 Slots The X13SCW-F motherboard has two M.2 slots. M.2 was formerly known as Next Generation Form Factor (NGFF) and serves to replace mini PCIe. M.2 allows for a variety of card sizes, increased functionality, and spatial efficiency. M.2-C supports PCIe 4.0 x4 for the CPU while M.2-P supports PCIe 4.0 x4 for the PCH. Both M.2 slots support M-Keys in the 2280/22110 form factor.
MCIO Connector JNVME1 is a connector that supports two PCIe 4.0 x4 via PCH.

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

JSATA1 I-SATA0­7

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

USB9/10(3.2) JDBG2 JVRM1

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

3
JNVME1
BIOS LICENSE

JBT1
JBT1:CMOS CLEAR
C266

SRW5 22110 SRW6 2280
SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

2

M.2 NVME

J7

M.2-P

1

IPMI CODE

MAC CODE BAR CODE

M.2 NVME M.2-C

MH7

JDBG5

JPI2C1 PWR I2C

MH5

JPW1

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

48

1. M.2-C 2. M.2-P 3. MCIO Connector

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

Chapter 2: Installation

Power SMB (I2C) Header The Power System Management Bus (I2C) connector (JPI2C1) monitors the power supply, fan, and system temperatures. Refer to the table below for pin definitions.

Power SMBus Header Pin Definitions

Pin# Definition

1

Clock

2

Data

3

PMBUS_Alert

4

GND

5

+3.3 V

SlimSAS Connector The X13SCW-F has eight SATA 3.0 ports via one SlimSAS connector (I-SATA0­I-SATA7) supported by the Intel C266 chipset. These SATA ports support RAID 0, 1, 5, and 10.

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

JSATA1 I-SATA0­7

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

USB9/10(3.2) JDBG2 JVRM1

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3
2

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME

J7

M.2-P

BAR CODE

1 M.2 NVME
M.2-C MH7

JDBG5

JPI2C1 PWR I2C

MH5

JPW1

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

49

1. Power SMB (I2C) Header 2. SlimSAS Connector

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

Super X13SCW-F User’s Manual

TPM/Port 80 Header
A Trusted Platform Module (TPM)/Port 80 header is located at JTPM1 to provide TPM support and Port 80 connection. Use this header to enhance system performance and data security. Refer to the table below for pin definitions. Go to the following link for more information on the TPM: http://www.supermicro.com/manuals/other/TPM.pdf.

Trusted Platform Module Header Pin Definitions

Pin# Definition

Pin# Definition

1

+3.3 V

2

SPI_CS#

3

RESET#

4

SPI_MISO

5

SPI_CLK

6

GND

7

SPI_MOSI

8

NC

9

+3.3 VStdby

10 SPI_IRQ#

NC = No Connection

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

JSATA1 I-SATA0­7

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

USB9/10(3.2) JDBG2 JVRM1

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW6 2280

SRW5 22110
1

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

M.2 NVME

J7

M.2-P

JDBG5

IPMI CODE MAC CODE

BAR CODE

M.2 NVME M.2-C
MH7

JPI2C1 PWR I2C

MH5

JPW1

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

50

1. TPM/Port 80 Header

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

Chapter 2: Installation

2.8 Jumper Settings

How Jumpers Work
To modify the operation of the motherboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board. See the diagram below for an example of jumping pins 1 and 2. Refer to the motherboard layout page for jumper locations.
Note: On two-pin jumpers, “Closed” means the jumper is on and “Open” means the jumper is off the pins.

Connector Pins

3 2 1

Jumper

Setting

3 2 1

CMOS Clear JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper consists of contact pads to prevent accidentally clearing the contents of CMOS.
To Clear CMOS
1. First power down the system and unplug the power cord(s). 2. Remove the cover of the chassis to access the motherboard. 3. Remove the onboard battery from the motherboard. 4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds. 5. Remove the screwdriver (or shorting device). 6. Replace the cover, reconnect the power cord(s), and power on the system.
Note: Clearing CMOS will also clear all passwords. Do not use the PW_ON connector to clear CMOS.
JBT1 contact pads

51

Super X13SCW-F User’s Manual

LAN Port Enable/Disable
Change the setting of jumpers JPL1 for LAN1 and JPL2 for LAN2 to enable or disable the LAN ports. The default setting is Enabled.

LAN Port Enable/Disable Jumper Settings

Jumper Setting Definition

Pins 1­2

Enabled

Pins 2­3

Disabled

ME Manufacturing Mode
Close pins 2­3 of jumper JPME2 to bypass SPI flash security and force the system to operate in the manufacturing mode, which will allow you to flash the system firmware from a host server for system setting modifications. Refer to the table below for jumper settings. The default setting is Normal.

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

ME Manufacturing Mode Jumper Settings

Jumper Setting Definition

Pins 1­2

Normal

Pins 2­3

Manufacturing Mode

JWD1 JPME2

3 UID-SW
JUIDB1 UID-LED
VGA MH2
LAN2 LAN1 JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB2/3 USB4/5 +

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JNVME1
BIOS LICENSE

JBT1
JBT1:CMOS CLEAR
2
C266

SRW5 22110 SRW6 2280

1

SRW4

2280

JTPM1 LEDMCU1
LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

M.2 NVME M.2-P

J7

JDBG5

IPMI CODE MAC CODE

BAR CODE

M.2 NVME M.2-C
MH7

1. LAN1 Enable 2. LAN2 Enable 3. ME Manufacturing Mode

JSXB1B SXB1B:PCIe x16

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

MH5

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JPW1

JSEN1

JIPMB1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

52

Chapter 2: Installation

VGA Enable
Jumper JPG1 allows you to enable the onboard VGA connector. The default setting is pins 1­2 to enable the connection. Refer to the table below for jumper settings.

VGA Enable/Disable Jumper Settings

Jumper Setting Definition

Pins 1­2

Enabled

Pins 2­3

Disabled

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

JSATA1 I-SATA0­7

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

USB9/10(3.2) JDBG2 JVRM1

USB6/7 (3.2(10 Gb))
JPL2

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2
1
BMC

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN
SRW7 22110

LEDM1

JSXB2 SXB2:PCIe x4

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

JPI2C1 PWR I2C

MH5

JPW1

JSEN1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

53

1. VGA Enable

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

Super X13SCW-F User’s Manual

2.9 LED Indicators
BMC Heartbeat LED
A BMC Heartbeat LED is located at LEDM1 on the motherboard. When LEDM1 is blinking, the BMC is functioning normally. Refer to the table below for more information.

BMC Heartbeat LED Indicator

LED Color

Definition

Green: Blinking

BMC Normal

BMC LAN LED
A BMC LAN is located on the I/O back panel. The amber LED on the right indicates activity, while the LED on the left indicates the speed of the connection. Refer to the table below for more information.

JSXB1A

Link (left) Activity (Right)

BMC LAN LEDs

Color/State Green: Solid Amber: Solid

Definition 100 Mbps 1 Gbps

Amber: Blinking Active

USB6/7 (3.2(10 Gb))
JPL2

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
1 JPFR2
BMC

2
MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN
SRW7 22110

LEDM1

JSXB2 SXB2:PCIe x4

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

BMC LAN

Link LED

Activity LED

1. BMC Heartbeat LED 2. BMC LAN LED

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

MH5

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JPW1

JSEN1

JIPMB1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6

54

Chapter 2: Installation

LAN Port LEDs
There are two LAN ports (LAN1 and LAN2) on the I/O back panel of the motherboard. Each Ethernet LAN port has two LEDs. The yellow LED indicates activity, while the other LED may be green, amber, or off to indicate the speed of the connection.

LAN Link LED (Left) LED State

Color

Definition

Off

No Connection

Amber

1 Gbps

Green

100 Mbps

LAN Activity LED (Right) LED State

LED Color

Status

Definition

Green

Flashing

Active

Onboard Power LED
The Onboard Power LED is located at LEDPWR on the motherboard. When this LED is on, the system is on. Be sure to turn off the system and unplug the power cord before removing or installing components. Refer to the table below for more information.

JSXB1A

Onboard Power LED Indicator

LED Color

Definition

System Off

Off

(power cable not

connected)

Green

System On

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

JWD1 JPME2

1
UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

1. LAN Port LEDs 2. Onboard Power LED

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

USB9/10(3.2) JDBG2 JVRM1

JSATA1 I-SATA0­7

JPI2C1 PWR I2C

MH5

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JPW1

JSEN1

JIPMB1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

2

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW2 MH6
55

Super X13SCW-F User’s Manual

Power Ready LED A Power Ready LED is located at LE6 on the motherboard. When this LED is green, all onboard power VRMs are normal. See the table below for more information.

Power Ready LED Indicator

LED Color

Definition

Green

All onboard PWR VRMs are normal

One or more PWR Red
VRMs has failed

Amber

System in standby mode

JSXB1A

JWD1:Watch Dog 1-2:RST 2-3:NMI
JPME2
1-2:Normal 2-3:ME MANUFACTURING MODE

JSXB1B SXB1B:PCIe x16

JSXB1C

JSATA1 I-SATA0­7

USB2/3 USB4/5 +

USB8 (3.2(10 Gb))
JTPM1 :TPM/PORT80

USB9/10(3.2) JDBG2 JVRM1

JWD1 JPME2

UID-SW JUIDB1 UID-LED
VGA MH2
LAN2 LAN1
JPFR2

MH1 COM1
COM2 USB0/1 BT1 IPMI_LAN

USB6/7 (3.2(10 Gb))
JPL2

LEDM1

JSXB2 SXB2:PCIe x4

BMC

SRW7 22110

JPL1:LAN1 1-2:ENABLE 2-3:DISABLE JPL2:LAN2 1-2:ENABLE 2-3:DISABLE JPG1:VGA 1-2:ENABLE 2-3:DISABLE
JPL1
JPG1

JBT1
JBT1:CMOS CLEAR

SRW5 22110 SRW6 2280

JNVME1
BIOS LICENSE

C266

SRW4 2280
JTPM1 LEDMCU1 LEDMCU2

MH3

X13SCW-F
REV:1.01
DESIGNED IN USA

IPMI CODE MAC CODE

M.2 NVME M.2-P

J7

BAR CODE

M.2 NVME M.2-C
MH7

JDBG5

JPI2C1 PWR I2C

MH5

JSEN1

1

JF1

LE6

JF1
PWR ON RST PWR FAIL OH FF NIC 2 NIC 1 HDD PWR LED
NMI

X

LEDPWR FAN6

MH4 FAN5

DDIIMMMMBB12FAN4

FAN3

DIMMA1 DIMMA2

CPU

FAN1 FAN2

JPW1

JPW2 MH6

56

1. Power Ready LED

JL1
JL1:CHASSIS INTRUSION
JBPNI2C1

JIPMB1

Chapter 3: Troubleshooting
Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the Technical Support Procedures’ and/ orReturning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any non hot-swap hardware components.
Before Power On
1. Make sure that there are no short circuits between the motherboard and chassis. 2. Disconnect all ribbon/wire cables from the motherboard, including those for the keyboard
and mouse. 3. Remove all add-on cards. 4. Install the CPU (making sure it is fully seated) and connect the front panel connectors to
the motherboard.
No Power
1. Make sure that there are no short circuits between the motherboard and the chassis. 2. Make sure that the ATX power connectors are properly connected. 3. Check that the 115 V/230 V switch, if available, on the power supply is properly set. 4. Turn the power switch on and off to test the system, if applicable. 5. Check the CPU socket for bent pins and make sure the CPU is fully seated. 6. The battery on your motherboard may be old. Check to verify that it still supplies
approximately 3 VDC. If it does not, replace it with a new one.
57

Super X13SCW-F User’s Manual
System Boot Failure
If the system does not display Power-On-Self-Test (POST) or does not respond after the power is turned on, do the following: 1. Check the screen for an error message. 2. Clear the CMOS settings by unplugging the power cord and contacting both pads on the
CMOS clear jumper (JBT1). Restart the system. Refer to Section 2-8 in Chapter 2. 3. Remove all components from the motherboard and turn on the system with only one
DIMM module installed. If the system boots, turn off the system and repopulate the components back into the system to retest. Add one component at a time to isolate which one may have caused the system boot issue.
Memory Errors
When suspecting faulty memory is causing the system issue, check the following: 1. Make sure that the memory modules are compatible with the system and are properly
installed. See Chapter 2 for installation instructions. (For memory compatibility, refer to the “Tested Memory List” link on the motherboard’s product page to see a list of supported memory.) 2. Check if different speeds of DIMMs have been installed. It is strongly recommended that you use the same RAM type and speed for all DIMMs in the system. 3. Make sure that you are using the correct type of ECC DDR5 modules recommended by the manufacturer. 4. Check for bad DIMM modules or slots by swapping a single module among all memory slots and check the results.
Losing the System’s Setup Configuration
1. Make sure that you are using a high-quality power supply. A poor-quality power supply may cause the system to lose the CMOS setup information. Refer to Chapter 2 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still supplies approximately 3 VDC. If it does not, replace it with a new one.
3. If the above steps do not fix the setup configuration problem, contact your vendor for repairs.
58

Chapter 3: Troubleshooting
When the System Becomes Unstable
A. If the system becomes unstable during or after OS installation, check the following: 1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.
2. Memory support: Make sure that the memory modules are supported by testing the modules using memtest86 or a similar utility.
Note: Click on the “Tested Memory List” link on the motherboard’s product page to see a list of supported memory.
3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the bad HDDs with good ones.
4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/ system fans, etc., work properly. Check the hardware monitoring settings in the IPMI to make sure that the CPU and system temperatures are within the normal range. Also check the front panel Overheat LED and make sure that it is not on.
5. Adequate power supply: Make sure that the power supply provides adequate power to the system. Make sure that all power connectors are connected. Refer to our website for more information on the minimum power requirements.
6. Proper software support: Make sure that the correct drivers are used.
B. If the system becomes unstable before or during OS installation, check the following: 1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as a USB flash or media device. 2. Cable connection: Check to make sure that all cables are connected and working
properly.
3. Use the minimum configuration for troubleshooting: Remove all unnecessary components (starting with add-on cards first), and use the minimum configuration (but with the CPU and a memory module installed) to identify the trouble areas. Refer to the steps listed in Section A above for proper troubleshooting procedures.
4. Identify bad components by isolating them: If necessary, remove a component in question from the chassis, and test it in isolation to make sure that it works properly. Replace a bad component with a good one.
5. Check and change one component at a time instead of changing several items at the same time. This will help isolate and identify the problem.
59

Super X13SCW-F User’s Manual 6. To find out if a component is good, swap this component with a new one to see if the system will work properly. If so, then the old component is bad. You can also install the component in question in another system. If the new system works, the component is good and the old system has problems.
60

Chapter 3: Troubleshooting
3.2 Technical Support Procedures
Before contacting Technical Support, take the following steps. Also, note that as a motherboard manufacturer, Supermicro also sells motherboards through its channels, so it is best to first check with your distributor or reseller for troubleshooting services. They should know of any possible problems with the specific system configuration that was sold to you. 1. Go through the Troubleshooting Procedures and Frequently Asked Questions (FAQ)
sections in this chapter or see the FAQs on our website (http://www.supermicro.com/ FAQ/index.php) before contacting Technical Support. 2. BIOS upgrades can be downloaded from our website (http://www.supermicro.com/ ResourceApps/BIOS_IPMI_Intel.html). 3. If you still cannot resolve the problem, include the following information when contacting Supermicro for technical support:
· Motherboard model (X13SCW-F) and PCB revision number · BIOS release date/version (This can be seen on the initial display when your system first
boots up.)
· System configuration
4. An example of a Technical Support form is on our website at http://www.supermicro.com/ RmaForm/.
5. Distributors: For immediate assistance, have your account number ready when placing a call to our Technical Support department. We can be reached by email at support@ supermicro.com.
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Super X13SCW-F User’s Manual
3.3 Frequently Asked Questions
Question: What type of memory does my motherboard support? Answer: The motherboard supports up to 128 GB of ECC UDIMM DDR5 memory with speeds of up to 4400 MT/s (with the one or two DIMM(s) per channel population configuration) in four memory slots (two DIMMs per channel). To enhance memory performance, do not mix memory modules of different speeds and sizes. Follow all memory installation instructions given on Section 2-4 in Chapter 2. Question: How do I update my BIOS? Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing any problems with your system. Updated BIOS files are located on our website at http://www. supermicro.com/ResourceApps/BIOS_IPMI_Intel.html. Check our BIOS warning message and the information on how to update your BIOS on our website. Select your motherboard model and download the BIOS file to your computer. Also, check the current BIOS revision to make sure that it is newer than your BIOS before downloading. Unzip the BIOS file onto a bootable USB device and then boot into the built-in UEFI Shell and type “flash.nsh <BMC Username>” to start the BIOS update. The flash script will invoke the SUM (EFI) tool automatically to perform the BIOS update, beginning with uploading the BIOS image to BMC. After uploading the firmware, the system will reboot to continue the process. The BMC will take over and continue the BIOS update in the background. The process will take 3-5 minutes. Warning: Do not shut down or reset the system while updating the BIOS to prevent possible system boot failure! Read the X13_AMI_BIOS_Upgrade_README file carefully before you perform the BIOS update.
62

Chapter 3: Troubleshooting
3.4 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below: 1. Power off your system and unplug your power cable. 2. Locate the onboard battery as shown below. 3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder. 4. Remove the battery.
Proper Battery Disposal
Warning: Handle used batteries carefully. Do not damage the battery in any way; a damaged battery may release hazardous materials into the environment. Do not discard a used battery in the garbage or a public landfill. Comply with the regulations set up by your local hazardous waste management agency to dispose of your used battery properly.
Battery Installation
1. To install an onboard battery, follow steps 1 and 2 above and continue below: 2. Identify the battery’s polarity. The positive (+) side should be facing up. 3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked. Warning: When replacing a battery, be sure to only replace it with the same type.
OR
63

Super X13SCW-F User’s Manual
3.5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number. When returning the motherboard to the manufacturer, the RMA number should be prominently displayed on the outside of the shipping carton, and the shipping package is mailed prepaid or hand-carried. Shipping and handling charges will be applied for all orders that must be mailed when service is complete. For faster service, you can also request a RMA authorization online (http://www.supermicro. com/RmaForm/). This warranty only covers normal consumer use and does not cover damages incurred in shipping or from failure due to the alternation, misuse, abuse or improper maintenance of products. During the warranty period, contact your distributor first for any product problems.
64

Chapter 4: UEFI BIOS
Chapter 4

UEFI BIOS

4.1 Introduction
This chapter describes the AMIBIOSTM Setup utility for the motherboard. The BIOS is stored on a chip and can be easily upgraded using a flash program.
Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual. Refer to the Manual Download area of our website for any changes to BIOS that may not be reflected in this manual.
Starting the Setup Utility
To enter the BIOS Setup Utility, hit the Delete key while the system is booting-up. In most cases, the key is used to invoke the BIOS setup screen. There are a few cases when other keys are used, such as , , etc. Each main BIOS menu option is described in this manual. The Main BIOS screen has two main frames. The left frame displays all the options that can be configured. “Grayed-out” options cannot be configured. The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white. Often a text message accompany it. (Note that BIOS has default text messages built in. We retain the option to include, omit, or change any of these text messages.) Settings printed in Bold are the default values. A ” ” indicates a submenu. Highlighting such an item and pressing the key open the list of settings within that submenu. The BIOS setup utility uses a key-based navigation system called hot keys. Most of these hot keys (,

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4.2 Main Setup
When you first enter the AMI BIOS setup utility, you enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen. The Main BIOS setup screen is shown below. The following Main menu items be displayed:
System Date/System Time Use this option to change the system date and time. Highlight System Date or System Time using the arrow keys. Enter new values using the keyboard. Press the key or the arrow keys to move between fields. The date must be entered in MM/DD/YYYY format. The time is entered in HH:MM:SS format.
Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00. Supermicro X13SCW-F BIOS Version This feature displays the version of the BIOS ROM used in the system. Build Date This feature displays the date when the version of the BIOS ROM used in the system was built. MCU Version This feature displays the version of the MCU.
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4.3 Advanced Setup Configurations
Use the arrow keys to select the Advanced submenu and press to access the submenu items.
Warning: Take caution when changing the Advanced settings. An incorrect value, an improper DRAM frequency, or a wrong BIOS timing setting may cause the system to malfunction. When this occurs, revert the setting to the manufacture default settings.
Boot Feature
Quiet Boot Use this feature to select the screen display between the POST messages or the OEM logo upon bootup. Select Disabled to display the POST messages. Select Enabled to display the OEM logo instead of the normal POST messages. The options are Disabled and Enabled.
Note: BIOS Power-on Self Test (POST) messages are always displayed regardless of the setting of this feature. Option ROM Messages Use this feature to set the display mode for the Option ROM. Select Keep Current to use the current AddOn ROM display settings. Select Force BIOS to use the Option ROM display mode set by the system BIOS. The options are Force BIOS and Keep Current.
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Bootup NumLock State Use this feature to set the Power-on state for the

key. The options are On and Off. Wait For “F1” If Error Select Enabled to force the system to wait until the key is pressed if an error occurs. The options are Disabled and Enabled. INT19 Trap Response Interrupt 19 is the software interrupt that handles the boot disk function. When this feature is set to Immediate, the ROM BIOS of the host adaptors will “capture” Interrupt 19 at bootup immediately and allow the drives that are attached to these host adaptors to function as bootable disks. If this feature is set to Postponed, the ROM BIOS of the host adaptors will not capture Interrupt 19 immediately and allow the drive attached to these adaptors to function as bootable devices at boot up. The options are Immediate and Postponed. Re-try Boot If this feature is enabled, the BIOS will automatically reboot the system from a specified boot device after its initial boot failure. The options are Disabled and EFI Boot. Power Configuration Watch Dog Function If this feature is enabled, the Watch Dog Timer will allow the system to reset or generate NMI based on the JWD1 jumper on the motherboard when it is inactive for more than five minutes. The options are Disabled and Enabled. Front USB Port(s) (Available when DCMS key is activated) Select Enabled to allow the specific type of USB devices to be used in the front USB ports. Select Enabled (Dynamic) to allow or disallow this particular type of USB device to be used in the front USB ports without rebooting the system. The options are Enabled, Disabled, and Enabled (Dynamic). Rear USB Port(s) (Available when DCMS key is activated) Select Enabled to allow the specific type of USB devices to be used in the rear USB ports. Select Enabled (Dynamic) to allow or disallow this particular type of USB device to be used in the rear USB ports without rebooting the system. The options are Enabled, Disabled, and Enabled (Dynamic). Restore on AC Power Loss Use this feature to set the power state after a power outage. Select Power Off for the system power to remain off after a power loss. Select Power On for the system power to be turned on after a power loss. Select Last State to allow the system to resume its last power state before a power loss. The options are Stay Off, Power On, and Last State. 69

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Power Button Function This feature controls how the system shuts down when the power button is pressed. Select 4 Seconds Override for you to power off the system after pressing and holding the power button for four seconds or longer. Select Instant Off to instantly power off the system as soon as you presses the power button. The options are Instant Off and 4 Seconds Override.
CPU Configuration
The following CPU information is displayed:
· CPU Signature · Brand String · Microcode Revision · L1 Data Cache · L1 Instruction Cache · L2 Cache · L3 Cache · SMX/TXT
C6DRAM This feature enables moving DRAM contents to PRM memory when the CPU is in a C6 state. The options are Disabled and Enabled. CPU Flex Ratio Override Use this feature to set whether CPU Flex Ratio Override programming is Disabled or Enabled. The options are Disabled and Enabled. CPU Flex Ratio Settings (Available when “CPU Flex Ratio Override” is set to Enabled) Use this feature to set the CPU Flex Ratio when CPU Flex Ratio Override is enabled. The value must be a value between the Max Efficient Ratio (LFM) and Maximum non- Turbo ratio set by the hardware (HFW). The default setting is dependent on the CPU. Hardware Prefetcher If this feature is set to Enabled, the hardware prefetcher will prefetch streams of data and instructions from the main memory into the L2 cache to improve CPU performance. The options are Disabled and Enabled.
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Adjacent Cache Line Prefetch If this feature is set to Disabled, the CPU will prefetch cache lines for 64 bytes. If set to Enabled, the CPU will prefetch cache lines for 128 bytes as comprised. The options are Disabled and Enabled. Intel (VMX) Virtualization Technology Select Enabled to use the Intel Virtualization Technology so that I/O device assignments will be reported to Virtual Memory Management (VMM) through the DMAR ACPI Tables. This feature offers fully-protected I/O resource sharing across Intel platforms, allowing for greater reliability, security, and availability in networking and data sharing. The options are Disabled and Enabled. PECI Use this feature to enable or disable Platform Environment Control Interface (PECI). PECI provides an interface between the processor and external components, such as Super IO and embedded controllers, to view and configure processor thermal management or power services. The options are Disabled and Enabled. AVX Use this feature to enable or disable Intel Advanced Vector Extensions (AVX) instructions. When AVX instructions are enabled, performance during demanding high performance computing (HPC) workloads may increase. This feature only affects performance cores. The options are Enabled and Disabled. Active Processor Cores This feature determines how many cores will be activated. When All is selected, all Performance-cores will be activated. The number of cores and E-cores are locked together. The default setting is All. Hyper-threading Select Enabled to support Intel Hyper-Threading Technology to enhance CPU performance. The options are Enabled and Disabled. BIST Use this feature to enable the Built-In Self Test (BIST) at system reset or reboot. The options are Disabled and Enabled. AP Threads Idle Manner Use this feature to set the AP Threads Idle Manner setting. The options are HALT Loop, MWAIT Loop, and RUN Loop.
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AES Select Enabled to use the Intel Advanced Encryption Standard (AES) to ensure data security. The options are Disabled and Enabled. Machine Check Use this feature to enable or disable Machine Check. The options are Disabled and Enabled. Monitor MWait Select Enable to support Monitor and Mwait, which are two instructions in Streaming SIMD Extension 3 (SSE3) to improve synchronization between multiple threads for CPU performance enhancement. The options are Disabled and Enabled.
Power & Performance
Boot Performance Mode This feature allows you to select the performance state that the BIOS will set before handoff to the OS. The options are Power Saving, Max Non-Turbo Performance, and Turbo Performance. Intel(R) SpeedStep(tm) Intel SpeedStep Technology allows the system to automatically adjust processor voltage and core frequency to reduce power consumption and heat dissipation. The options are Disabled and Enabled. Race to Halt (RTH) Use this feature to enable or disable Race to Halt (RTH). RTH will dynamically increase CPU frequency to enter C-States more quickly to reduce overall power. The options are Disabled and Enabled. Intel(R) Speed Shift Technology When this feature is enabled, the Collaborative Processor Performance Control (CPPC) v2 interface will be available to control CPU P-States. The options are Disabled, Native Mode, and Out of Band Mode. Per Core P State OS Control Mode Use this feature to enable or disable Per Core P State OC Control Mode. Setting this feature to Disabled will set Bit 31 = 1 command 0x06. When this bit is set, the highest core request is used for all other core requests. The options are Disabled and Enabled.
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HwP Autonomous Epp Grouping Use this feature to enable or disable Hardware- Controlled Performance States (HwP) Autonomous Energy Performance Preference (EPP) Grouping. When this feature is set to enabled, the same value will be requested for all cores with the same EPP. When this feature is set to disabled, requests will not necessarily be the same value for all cores with the same EPP. The options are Disabled and Enabled. HDC Control Use this feature to enable or disable Hardware Duty Cycling (HDC). When this feature is enabled, HDC can be enabled during OS if OS support is available. The options are Disabled and Enabled.
Turbo Mode Select Enabled for processor cores to run faster than the frequency specified by the manufacturer. The options are Disabled and Enabled.
Power Limit 1 Use this feature to enable or disable Platform Power Limit 1 (PsysPL1) programming. When this feature is set to Enabled, Power Limit 1 Power and Power Limit 1 Time Window can be configured. The options are Disabled and Enabled. Power Limit 1 Power (Available when “Power Limit 1” is set to Enabled) Use this feature to configure Package Power Limit 1 in milliwatts. The CPU will exceed this limit for as long as the value set in “Power Limit 1 Time Window” in seconds before returning to a power usage below this limit. For 12.50 W, enter 12500. The BIOS will round to the nearest 1/8 W. Enter 0 for no custom override. This value must be between Min Power Limit and the Max Power Limit defined by PACKAGE_POWER_SKU_MSR. The default setting is 0. Power Limit 1 Time Window (Available when “Power Limit 1” is set to Enabled) Use this feature to set the Power Limit 1 Time Window value in seconds. This value defines how long Power Limit 1 may be exceeded. The CPU throttles to remain under Power Limit 1 when the duration set by Power Limit 1 Time Window is exceeded. Set this value to 0 to use the default value for this processor. The default setting is 0. Power Limit 2 Use this feature to enable or disable Platform Power Limit 2 (PsysPL2) programming. When this feature is set to Enabled, Power Limit 2 Power can be configured. The options are Disabled and Enabled.
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Power Limit 2 Power (Available when “Power Limit 2” is set to Enabled) Use this feature to configure Package Power Limit 2 in milliwatts or milli- percents. For example, to set Power Limit 2 Power to 12%, enter 12000. The BIOS will round to the nearest 1/8 W or 1/8%. Enter 0 for no custom override. This setting will act as the new Power Limit 2 Power value for the Package running average power limit (RAPL) algorithm. The RAPL algorithm attempts to limit power spikes that go above this limit. When this value is set to 0, the Power Limit 2 Power will default to PACKAGE_POWER_SKU_MSR. The default setting is 0.
Power Limit 3 Override Use this feature to enable or disable Platform Power Limit 3 (PsysPL3) override. When this feature is set to Enabled, Power Limit 3, Power Limit 3 Time Window, Power Limit 3 Duty Cycle, and Power Limit 3 Lock can be configured. The options are Disabled and Enabled.
Power Limit 3 (Available when “Power Limit 3 Override” is set to Enabled) Use this feature to configure Package Power Limit 3 in milliwatts or milli- percents. For example, to set Power Limit 2 Power to 12%, enter 12000. The BIOS will round to the nearest 1/8 W or 1/8%. Enter 0 for no custom override. For XE SKUs, this value may be set up to Psys Pmax. For Overclocking SKUs, this value must be between Max and Min Power Limits defined by PACKAGE_POWER_SKU_MSR. For any other SKUs, this value must be between Min Power Limit and the Processor Base Power (TDP). If this value is 0, the default hardware value will be used. The default setting is 0.
Power Limit 3 Time Window (Available when “Power Limit 3 Override” is set to Enabled) Use this feature to set the Power Limit 3 Time Window value in milliseconds. This value defines how long Power Limit 3 may be exceeded. The CPU throttles to remain under Power Limit 3 when the duration set by Power Limit 3 Time Window is exceeded. This value may be between 3 and 64. Set this feature to 0 to use the default value for this processor. The default setting is 0. For ATX12V0 PSU systems, the recommended value is 40.
Power Limit 3 Duty Cycle (Available when “Power Limit 3 Override” is set to Enabled) Use this feature to set the duty cycle that the processor maintains during the Power Limit 3 Time Window. The value can be between 0 and 100. The default setting is 0. For ATX12V0 PSU system, the recommended value is 25.
Power Limit 3 Lock (Available when “Power Limit 3 Override” is set to Enabled) Use this feature to enable or disable the ability to change Power Limit 3 configurations during OS. When this feature is disabled, Power Limit 3 configurations can be changed during OS. The default setting is Disabled.
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Power Limit 4 Override Use this feature to enable or disable Platform Power Limit 4 (PsysPL4) override When this feature is set to Enabled, Power Limit 4 and Power Limit 4 Lock can be configured. The options are Disabled and Enabled. Power Limit 4 (Available when “Power Limit 4 Override” is set to Enabled) Use this feature to configure Package Power Limit 4 in milliwatts or milli-percents. For example, to set Power Limit 4 Power to 12%, enter 12000. The BIOS will round to the nearest 1/8 W or 1/8%. Enter 0 for no custom override. The default value is 0. Power Limit 4 Lock (Available when “Power Limit 4 Override” is set to Enabled) Use this feature to enable or disable the ability to change Power Limit 4 configurations during OS. When this feature is disabled, Power Limit 4 configurations can be changed during OS. The default setting is Disabled. C-States Use this feature to enable CPU C-States. The options are Disabled and Enabled.
Enhanced C-States Use this feature to enable enhanced C-States (C1E). When enabled, the CPU will switch to minimum speed if all cores are in C-State. The options are Disabled and Enabled.
C-State Auto Demotion Use this feature to prevent unnecessary excursion into C-States. The options are Disabled and C1.
C-State Un-Demotion Use feature to enable or disable un-demotion of C-States. The options are Disabled and C1.
Package C-State Demotion Use this feature to enable or disable Package C-State Demotion. The options are Disabled and Enabled.
Package C-State Un-Demotion Use this feature to enable or disable Package C-State Un-Demotion. The options are Disabled and Enabled.
C-State Pre-Wake Use this feature to enable or disable C-State Pre-Wake. The options are Disabled and Enabled.
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IO MWait Redirection Use this feature to redirect IO_read instructions sent to IO register PMG_IOBASE ADDRBASE+offset to MWAIT(offset). The options are Disabled and Enabled. Package C-State Limit Use this feature to set the Package C-State limit. The options are C0/C1, C2, C3, C6, C7, C7S, C8, C9, C10, Cpu Default, and Auto. Total Memory Encryption Use this feature to enable or disable the Total Memory Encryption (TME) function for enhanced memory data security. TME protects DRAM data from physical attacks. The options are Disabled and Enabled.
Chipset Configuration
Warning: Setting the wrong values in the following features may cause the system to malfunction.
System Agent (SA) Configuration
System Agent (SA) Configuration The following System Agent information will be displayed:
· VT-d
Memory Configuration
Memory Configuration The following memory information will be displayed:
· Memory RC Version · Memory Frequency · Memory Timings (tCL-tRCD-tRP-tRAS) · DIMMA1 · DIMMA2 · DIMMB1 · DIMMB2
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Memory Test on Warm Boot Use this feature to enable or disable memory test on a warm boot. The options are Disabled and Enabled.
Maximum Memory Frequency This feature selects the speed of the memory installed. The default setting is Auto. All values are in MT/s.
ECC Support Use this feature to enable or disable DDR ECC support. The options are Disabled and Enabled.
Max TOLUD This feature sets the Top of Low Usable DRAM (TOLUD) value. The TOLUD value specifies the memory space used by internal graphics devices, GTT Stolen Memory, and TSEG, respectively, if these devices are enabled. The options are Dynamic, 1 GB, 1.25 GB, 1.5 GB, 1.75 GB, 2 GB, 2.25 GB, 2.5 GB, 2.75 GB, 3 GB, 3.25 GB, and 3.5 GB.
Note: TSEG is a block of memory that is only accessible by the processor while operating in System Management Mode (SMM).
Retrain on Fast Fail Use this feature to enable or disable restarting of the Memory Reference Code (MRC) in Cold mode if the memory test fails during fast flow. The options are Disabled and Enabled.
Row Hammer Mode Use this feature to select which mitigation to use against Row Hammer. Row Hammer attacks attempt to trigger bit flips in DRAM chips by repeatedly hitting a row of memory cell until electrical leakage triggers a bit flip in a different row. Pseudo target row refresh (pTRR) automatically refreshes a victim row to mitigate Row Hammer attacks when a row activation threshold is exceeded. Refresh management (RFM) triggers additional row refresh commands when a memory controller detects too many row activations. RFM falls back to pTRR if RFM is unavailable. The options are Disabled, RFM, and pTRR.
RH LFSR0 Mask (Available when “Row Hammer Mode” is set to RFM or pTRR) Use this feature to set the Row Hammer linear feedback shift register (LFSR) mask for the Row Hammer pTRR feature. The options are a number ranging from 1/2^1 to 1/2^15. The default setting is 1/2^11.
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RH LFSR1 Mask (Available when “Row Hammer Mode” is set to RFM or pTRR) Use this feature to set the Row Hammer linear feedback shift register (LFSR) mask for the Row Hammer pTRR feature. The options are a number ranging from 1/2^1 to 1/2^15. The default setting is 1/2^11. Power Down Mode Use this feature to set the Clock-Enable (CKE) power down mode. When this feature is set to No Power Down, CKE is disabled. When this feature is set to Active Power-down (APD), open pages are retained when de-asserting CKE. When this feature is set to Pre-charged Power-down (PPD) Delayed-locked Loop off (DLLoff), DDR enters a deep power-down state when all rows are pre-charged. PDD_DLLoff saves more power than No Power Down and APD. The options are Auto, No Power Down, APD, PPD-DLLoff. Page Close Idle Timeout Use this feature to set if memory controller should force open pages to close after an idle cycle threshold is exceeded. The options are Disabled and Enabled. Memory Scrambler Use this feature to enable or disable memory scrambler support for memory error correction. The options are Disabled and Enabled. Force ColdReset Use this feature when ColdBoot is required during MRC execution. The options are Enabled and Disabled. Force Single Rank Use this feature to force DIMMs to use a single rank. When enabled, only Rank0 will be use in each DIMM. The options are Disabled and Enabled. MRC Fast Boot This feature enables or disables fast path through the MRC. The options are Disabled and Enabled.
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PEG Port Configuration M.2-C This feature indicates if M.2-C is present. M.2-C Use this feature to disable or enable the PCIe root port. The options are Disabled and Enabled. ASPM Use this feature to set the Active State Power Management level. The options are Disabled, L0s, L1, and L0sL1. PCIe Speed Use this feature to select the PCI Express port speed. The options are Auto, Gen1, Gen2, Gen3, and Gen4. RSC-W-68G5 SLOT2 PCIe 5.0 x16 This feature indicates if RSC-W-68G5 SLOT2 PCIe 5.0 x16 is present. RSC-W-68G5 SLOT1 PCIe 5.0 x16 Use this feature to disable or enable the PCIe root port. The options are Disabled and Enabled. ASPM Use this feature to set the Active State Power Management level. The options are Disabled, L0s, L1, and L0sL1. PCIe Speed Use this feature to select the PCI Express port speed. The options are Auto, Gen1, Gen2, Gen3, Gen4, and Gen5. RSC-W-68G5 SLOT1 PCIe 5.0 x8 This feature indicates if RSC-W-68G5 SLOT1 PCIe 5.0 x8 is present. RSC-W-68G5 SLOT2 PCIe 5.0 x8 Use this feature to disable or enable the PCIe root port. The options are Disabled and Enabled.
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ASPM Use this feature to set the Active State Power Management level. The options are Disabled, L0s, L1, and L0sL1.
PCIe Speed Use this feature to select the PCI Express port speed. The options are Auto, Gen1, Gen2, Gen3, Gen4, and Gen5.
Stop Grant Configuration Use this feature to configure the stop grant configuration. The options are Auto and Manual. Number of Stop Grant Cycles (Available when “Stop Grant Configuration” is set to Manual) Use this feature to set the number of stop-grant cycles. The default value is 1. VT-d Select Enabled to enable Intel Virtualization Technology support for Direct I/O VT-d by reporting the I/O device assignments to VMM through the DMAR ACPI Tables. This feature offers fully-protected I/O resource-sharing across the Intel platforms, providing you with greater reliability, security and availability in networking and data sharing. The options are Enabled and Disabled. Control Iommu Pre-boot Behavior Use this feature to enable the input-output memory management unit (IOMMU) in the preboot environment if the Direct-Memory Access Remapping (DMAR) table is installed in the driver execution environment (DXE) and if VTD_INFO_PPI is installed during pre-EFI initialization (PEI). The options are Disable IOMMU and Enable IOMMU during boot. X2APIC Opt Out Use this feature to enable or disable the X2APIC Opt Out Bit. The options are Enabled and Disabled. DMA Control Guarantee Use this feature to enable or disable Direct Memory Access (DMA) Control Guarantee. The options are Enabled and Disabled. GNA Device (B0:D8:F0) Use this feature to enable SA GNA device. The options are Enabled and Disabled.
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PCH-IO Configuration
PCI Express Configuration PCI Express Configuration
RSC-WR-6 SLOT1 PCIe 4.0 x16
ASPM 6 Use this feature to set the Active State Power Management (ASPM) level for the PCIe device. Select Auto for the system BIOS to automatically set the ASPM level based on the system configuration. Select Disabled to disable ASPM support. The options are Disabled, L1, and Auto. L1 Substates Use this feature to configure the PCI Express L1 Substates. The options are Disabled, L1.1, and L1.1 & L1.2. PCIe Speed Use this feature to select the PCI Express port speed. The options are Auto, Gen1, Gen2, Gen3, and Gen4.
M.2-P
ASPM 21 Use this feature to set the Active State Power Management (ASPM) level for the PCIe device. Select Auto for the system BIOS to automatically set the ASPM level based on the system configuration. Select Disabled to disable ASPM support. The options are Disabled, L1, and Auto. L1 Substates Use this feature to configure the PCI Express L1 Substates. The options are Disabled, L1.1, and L1.1 & L1.2. PCIe Speed Use this feature to select the PCI Express port speed. The options are Auto, Gen1, Gen2, Gen3, and Gen4.
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Port 61h Bit-4 Emulation Use this feature to set the emulation of Port 61h bit-4 toggling in System Management Mode (SMM). The options are Enabled and Disabled.
Super IO Configuration
Super IO Configuration
· Super IO Chip – AST2600
Serial Port 1 Configuration
Serial Port 1 Configuration Serial Port 1 This feature will enable or disable the serial port. The options are Disabled or Enabled. Device Settings – IO=3F8h; IRQ=4; Change Settings This feature configures the IRQ setting for the serial port. The options are Auto, IO=3F8h; IRQ=4;, IO=3F8h; IRQ=3,4,5,6,7,8,9,10,11,12;, IO=2F8h; IRQ=3,4,5,6,7,8,9,10,11,12, IO=3E8h; IRQ=3,4,5,6,7,8,9,10,11,12;, and IO=2E8h; IRQ=3,4,5,6,7,8,9,10,11,12;.
Serial Port 2 Configuration
Serial Port 2 Configuration Serial Port 2 This feature will enable or disable the serial port. The options are Disabled or Enabled. Device Settings – IO=2F8h; IRQ=3; Change Settings This feature configures the IRQ setting for the serial port. The options are Auto, IO=2F8h; IRQ=4;, IO=3F8h; IRQ=3,4,5,6,7,8,9,10,11,12;, IO=2F8h; IRQ=3,4,5,6,7,8,9,10,11,12, IO=3E8h; IRQ=3,4,5,6,7,8,9,10,11,12;, and IO=2E8h; IRQ=3,4,5,6,7,8,9,10,11,12;. Serial Port 2 Attribute Use this feature to set the attribute of the serial port. The options are SOL and COM.
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Serial Port Console Redirection
COM1 / SOL/COM2 COM1 Console Redirection / SOL/COM2 Console Redirection Use this feature to enable the console redirection support for a serial port specified by you. The options for COM1 Console Redirection are Disabled and Enabled. The options for SOL/ COM2 Console Redirection are Disabled and Enabled.
COM1 Console Redirection Settings / SOL/COM2 Console Redirection Settings (Available when “Console Redirection” is set to Enabled)
Use this feature to specify how the host computer will exchange data with the client computer, which is the remote computer. COM1 Console Redirection Settings / SOL/COM2 Console Redirection Settings Terminal Type Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100+, VT-UTF8, and ANSI. Bits Per Second Use this feature to set the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 38400, 57600, and 115200 (bits per second). Data Bits Use this feature to set the data transmission size for Console Redirection. The options are 7 and 8. Parity A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1’s in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1’s in data bits is odd. Select None if you do not want to send a parity bit with your data bits in transmission. Select Mark to add a mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a parity bit to be sent with your data bits. The options are None, Even, Odd, Mark, and Space.
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Stop Bits A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2. Flow Control Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a “Stop” signal to stop sending data when the receiving buffer is full. Send a “Start” signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS. VT-UTF8 Combo Key Support Use this feature to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals. The options are Disabled and Enabled. Recorder Mode Use this feature to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled. Resolution 100×31 Use this feature to enabled for extended terminal resolution support. The options are Disabled and Enabled. Putty KeyPad This feature selects the settings for Function Keys and KeyPad used for Putty, which is a terminal emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO, ESCN, and VT400. Legacy Console Redirection
Legacy Console Redirection Settings
Redirection COM Port Use this feature to select the COM port used to display redirection of Legacy OS and Legacy OPROM messages. The options are COM1 and COM2/SOL. Resolution Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support. The options are 80×24 and 80×25.
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Redirection After BIOS POST Use this feature to enable or disable legacy console redirection after BIOS POST. When set to Bootloader, legacy console redirection is disabled before booting the OS. When set to Always Enable, legacy console redirection remains enabled when booting the OS. The options are Always Enable and BootLoader. Serial Port for Out-Of-Band Management/Windows Emergency Management Services (EMS) Console Redirection EMS Select Enabled to use a COM port EMS Console Redirection. The options are Disabled and Enabled.
Console Redirection Settings Out-of-Band Mgmt Port EMS This feature selects a serial port in a client server to be used by the Microsoft Windows Emergency Management Services (EMS) to communicate with a remote host server. The options are COM1, and SOL. Terminal Type EMS Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII character set. Select VT100+ to add color and function key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes. The options are VT100, VT100Plus, VT-UTF8, and ANSI. Bits Per Second EMS This feature sets the transmission speed for a serial port used in Console Redirection. Make sure that the same speed is used in the host computer and the client computer. A lower transmission speed may be required for long and busy lines. The options are 9600, 19200, 57600, and 115200 (bits per second).
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Flow Control EMS Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a “Stop” signal to stop sending data when the receiving buffer is full. Send a “Start” signal to start sending data when the receiving buffer is empty. The options are None, Hardware RTS/CTS, and Software Xon/Xoff. The setting for each of these features is displayed:
· Data Bits EMS · Parity EMS · Stop Bits EMS
SATA And VROC Configuration
SATA And VROC Configuration SATA Controller(s) This feature enables SATA device(s). The options are Disabled and Enabled. *If this feature is set to Enabled, the following features will become available for configuration: SATA Mode Selection Use this feature select the SATA mode. Select AHCI to configure an sSATA drive specified as an AHCI drive. The options are AHCI and Intel VROC SATA RAID. SATA Interrupt Selection (Available when “SATA Mode Selection” is set to Intel VROC SATA RAID) Use this feature to select the interrupt that will be available to the operating system. The options are MSI-x, MSI, and Legacy. Support Aggressive Link Power Management This feature enables the PCH to aggressively enter link power state. The options are Disabled and Enabled. Serial ATA Port 0-7 Hot Plug This feature designates the specified port for hot plugging. Set the setting to Enabled for hotplugging support, which will allow you to replace a SATA disk drive without shutting down the system. The options are Disabled and Enabled.
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Serial ATA Port 0-7 Spin Up Device When this feature is disabled, all drives will spin up at boot. When this option is enabled, it will perform Staggered Spin Up on any drive this option is activated. The options are Disabled and Enabled. Serial ATA Port 0-7 SATA Device Type Use this feature to identify the type of HDD that is connected to the SATA port. The options are Hard Disk Drive and Solid State Drive.
PCH-FW Configuration
The following PCH-FW information is displayed: · Operation Firmware Version · Backup Firmware Version · Recovery FIrmware Version · ME Firmware Status #1 · ME Firmware Status #2 · Current State · Error Code
ACPI Settings
High Precision Event Timer Select Enabled to activate the High Precision Event Timer (HPET). The HPET produces periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing multimedia streams, providing smooth playback, and reducing the dependency on other timestamp calculation devices. The HPET replaces the 8254 Programmable Interval Timer. The options are Disabled and Enabled. Native PCIe Enable Enable this feature to grant control of PCIe Native hot plug, PCIe Power Management Events, and PCIe Capability Structure Control. The options are Disabled and Enabled.
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Native ASPM Use this feature to set whether ASPM should be controlled by the OS or by the BIOS. The options are Auto, Enabled, and Disabled.
USB Configuration
USB Configuration The following information will be displayed:
· USB Module Version · USB Controllers · USB Devices · Legacy USB Support XHCI Hand-off This feature is a workaround solution for operating systems that do not support Extensible Host Controller Interface (XHCI) hand-off. The XHCI ownership change should be claimed by the XHCI driver. The options are Enabled and Disabled. USB Mass Storage Driver Support This feature enables USB mass storage driver support. The options are Disabled and Enabled.
PCIe/PCI/PnP Configuration
PCI Devices Common Settings: SR-IOV Support Use this feature to enable or disable Single Root IO Virtualization Support. The options are Disabled and Enabled. BME DMA Mitigation Enable this feature to help block DMA attacks. The options are Disabled and Enabled. Onboard Video Option ROM Use this feature to select the Onboard Video Option ROM type. The options are Disabled and EFI. Above 4GB MMIO BIOS Assignment Select Enable for remapping of BIOS above 4GB. The options are Enabled and Disabled.
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PCI PERR/SERR Support Select Enabled to allow a PCI device to generate a PERR/SERR number for a PCI Bus Signal Error Event. The options are Disabled and Enabled. VGA Priority Use this feature to select the graphics device to be used as the primary video display for system boot. The options are Onboard and Offboard. NVMe Firmware Source Use this feature to select the NVMe firmware to support booting. The options are Vendor Defined Firmware and AMI Native Support. The default option, Vendor Defined Firmware, is pre-installed on the drive and may resolve errata or enable innovative functions for the drive. The other option, AMI Native Support, is offered by the BIOS with a generic method. Storage Option ROM/UEFI Driver Use this feature to enable device name support for onboard devices and slots. The options are Do not Launch, UEFI, and Legacy. PCIe/PCI/PnP Configuration M.2-C OPROM / M.2-P OPROM / Onboard LAN1 Option ROM Select EFI to allow you to boot the computer with the EFI device installed on the specified PCIe slot. The options are Disabled and EFI. Onboard LAN1 Option Support / Onboard LAN2 Option Support Use this feature to enabled or disable this onboard LAN port. The options are Disabled and Enabled. PCIE Clock Use this feature to set PCIe Clock Native/FREE_RUNNING. The options are Native and FREE_RUNNING.
Network Configuration
Network Stack Select Enabled to enable Unified Extensible Firmware Interface (UEFI) for network stack support. The options are Disabled and Enabled. IPv4 PXE Support (Available when “Network Stack” is set to Enabled) Select Enabled to enable IPv4 Preboot Execution Environment (PXE) for boot support. If this feature is set to Disabled, IPv4 PXE boot option will not be supported. The options are Disabled and Enabled.
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IPv4 HTTP Support (Available when “Network Stack” is set to Enabled) Use this feature to enable IPv4 HTTP boot support. The options are Disabled and Enabled.
IPv6 PXE Support (Available when “Network Stack” is set to Enabled) Select Enabled to enable IPv6 Preboot Execution Environment (PXE) for boot support. If this feature is set to Disabled, IPv6 PXE boot option will not be supported. The options are Disabled and Enabled.
IPv6 HTTP Support (Available when “Network Stack” is set to Enabled) Use this feature to enable IPv6 HTTP boot support. The options are Disabled and Enabled.
PXE boot wait time (Available when “Network Stack” is set to Enabled) Enter a value for the wait time (in seconds) to press the key to abort the PXE boot. The default is 0.
Media detect count (Available when “Network Stack” is set to Enabled) Enter a value for the number of times the presence of media will be checked. The default is 1.

MMAACC::

XXXXXXXXXXXX-IPv4 XXXXXXXXXXXX-IPv4

Network Network

Configuration Configuration

Configured

This feature indicates whether a network address configured successfully or not. The options are Disabled and Enabled.

*If this feature is set to Enabled, the following features will become available for configuration:

Enable DHCP Use this feature to set the DHCP. The options are Disabled and Enabled.

*If this feature is set to Disabled, the following features will become available for configuration: Local IP Address –

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