MICROCHIP v4.2 Speed ID IQ PI Controller User Guide

June 13, 2024
MICROCHIP

MICROCHIP v4.2 Speed ID IQ PI Controller User Guide

Introduction

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The PI controller is a widely used closed-loop controller for controlling a first-order system. The basic functionality of a PI controller is to make the feedback measurement to track the reference input. PI controller performs this action controls its output until the error between the reference and feedback signals becomes zero.

There are two components that contribute to the output: the proportional term and the integral term, as shown in the following figure. The proportional term depends only on the instantaneous value of the error signal, whereas the integral term depends on the present and previous values of an error.

Figure 1. PI Controller in Continuous Domain

FIG 1 PI Controller in Continuous Domain.JPG

Where,
y (t) = PI controller output
e (t) = reference (t) – feedback (t) is the error between reference and feedback
To implement the PI controller in the digital domain, it has to be discretized. The discretized form of the PI controller based on zero order hold method is shown in the following figure.

Figure 2. PI Controller based on Zero Order Hold Method

FIG 2 PI Controller based on Zero Order Hold
Method.JPG

FIG 3 PI Controller based on Zero Order Hold
Method.JPG

Summary

FIG 4 Summary.JPG

Features (Ask a Question)
The Speed ID IQ PI Controller has the following key features:

  • Computes d-axis current, q-axis current, and motor speed
  • PI controller algorithm runs for one parameter at a time
  • Automatic anti-windup and initialization functions are included

Implementation of IP Core in Libero Design Suite (Ask a Question)
IP core must be installed to the IP Catalog of the Libero SoC software. This is done automatically through the IP Catalog update function in the Libero SoC software, or the IP core can be manually downloaded from the catalog. Once the IP core is installed in the Libero SoC software IP Catalog, the core can be configured, generated, and instantiated within the SmartDesign tool for inclusion in the Libero project list.

Device Utilization and Performance

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The following table lists the device utilization used for Speed ID IQ PI Controller.
Table 1. Speed ID IQ PI Controller Utilization

FIG 5 Device Utilization and Performance.JPG

FIG 6 Device Utilization and Performance.JPG

Important:

  1. The data in the preceding table is captured using typical synthesis and layout settings. The CDR reference clock source is set to Dedicated with other configurator values unchanged.
  2. Clock is constrained to 200 MHz while running the timing analysis to achieve the performance numbers.

1. Functional Description (Ask a Question)

This section describes the implementation details of the Speed ID IQ PI Controller.
The following figure shows the system-level block diagram of the Speed ID IQ PI Controller.
Figure 1-1. System-Level Block Diagram of Speed ID IQ PI Controller

FIG 7 Functional Description.JPG

Note: The Speed ID IQ PI controller executes a PI controller algorithm for three quantities—d-axis current, q-axis current, and motor speed. The block is designed to minimize hardware resource utilization. The block allows the PI controller algorithm to be run for one parameter at a time.

1.1 Anti-Windup and Initialization (Ask a Question)
The PI controller has minimum and maximum limits of output to keep the output within practical values. If a non-zero error signal persists for a long time, the integral component of the controller keeps increasing and might reach a value limited by its bit width. This phenomenon is called integrator windup and must be avoided to have a proper dynamic response. The PI controller IP has an automatic anti-windup function, which limits the integrator as soon as the PI controller reaches saturation.

In certain applications, such as motor control, it is important to initialize the PI controller to a proper value before enabling it. Initializing the PI controller to a good value avoids jerky operations. The IP block has an enable input to enable or disable the PI controller. If disabled, the output is equal to the unit input, and when this option is enabled,
the output is the PI computed value.

1.2 Time Sharing of PI Controller (Ask a Question)
In the Field Oriented Control (FOC) algorithm, there are three PI controllers for Speed, d-axis current ID, and q-axis current Iq. The input of one PI controller depends on the output of the other PI controller, and so they are executed sequentially. At any instant, there is only one instance of the PI controller in operation. As a result, instead of using three separate PI controllers, a single PI controller is time shared for Speed, Id, and Iq for optimum usage of resources.

The Speed_Id_Iq_PI module allows sharing of the PI controller through the start and done signals for each of Speed, Id, and Iq. The tuning parameters Kp, Ki, and minimum and maximum limits of each instance of a controller can be configured independently through corresponding inputs.

2. Speed ID IQ PI Controller Parameters and Interface Signals (Ask a

Question)

This section discusses the parameters in the Speed ID IQ PI Controller GUI configurator and I/O signals.

2.1 Configuration Settings (Ask a Question)
The following table lists the description of the configuration parameters used in the hardware implementation of Speed ID IQ PI Controller. These are generic parameters and can be varied as per the requirement of the application.

Table 2-1. Configuration Parameter

FIG 8 Configuration Parameter.JPG

2.2 Input and Output Signals (Ask a Question)
The following table lists the input and output ports of Speed ID IQ PI Controller.

Table 2-2. Inputs and Outputs of Speed ID IQ PI Controller

FIG 9 Inputs and Outputs of Speed ID IQ PI
Controller.JPG

FIG 10 Inputs and Outputs of Speed ID IQ PI
Controller.JPG

FIG 11 Inputs and Outputs of Speed ID IQ PI
Controller.JPG

FIG 12 Inputs and Outputs of Speed ID IQ PI
Controller.JPG

3. Timing Diagrams (Ask a Question)

This section discusses Speed ID IQ PI Controller timing diagrams.
The following figure shows the timing diagram of Speed ID IQ PI Controller.

Figure 3-1. Speed ID IQ PI Controller Timing Diagram

FIG 13 Speed ID IQ PI Controller Timing Diagram.JPG

4. Testbench

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A unified testbench is used to verify and test Speed ID IQ PI Controller called as user testbench. Testbench is provided to check the functionality of the Speed ID IQ PI Controller IP.

4.1 Simulation (Ask a Question)
The following steps describe how to simulate the core using the testbench:
1. Go to Libero SoC Catalog tab, expand Solutions-MotorControl, double click Speed ID IQ PI Controller, and then click OK. The documentation associated with the IP are listed under Documentation.

Important: If you do not see the Catalog tab, navigate to View > Windows menu and click Catalog to make it visible.

Figure 4-1. Speed ID IQ PI Controller IP Core in Libero SoC Catalog

FIG 13 Speed ID IQ PI Controller Timing Diagram.JPG

2. On the Stimulus Hierarchy tab, select the testbench (speed_id_iq_pi_controller_tb.v), right click and then click Simulate Pre- Synth Design > Open Interactively.
Important: If you do not see the Stimulus Hierarchy tab, navigate to View > Windows menu and click Stimulus Hierarchy to make it visible.

Figure 4-2. Simulating Pre-Synthesis Design

FIG 14 Simulating Pre-Synthesis Design.jpg

ModelSim opens with the testbench file, as shown in the following figure.

Figure 4-3. ModelSim Simulation Window

FIG 15 ModelSim Simulation Window.jpg

Important: If simulation is interrupted due to the runtime limit specified in the .do file, use the run -all command to complete the simulation.

5. Revision History (Ask a Question)

The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication.

Table 5-1. Revision History

FIG 16 Revision History.JPG

Microchip FPGA Support

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Microchip FPGA products group backs its products with various support services, including Customer Service,
Customer Technical Support Center, a website, and worldwide sales offices. Customers are suggested to visit Microchip online resources prior to contacting support as it is very likely that their queries have been already answered.

Contact Technical Support Center through the website at www.microchip.com/support. Mention the FPGA Device Part number, select appropriate case category, and upload design files while creating a technical support case. Contact Customer Service for non-technical product support, such as product pricing, product upgrades, update information, order status, and authorization.

  • From North America, call 800.262.1060
  • From the rest of the world, call 650.318.4460
  • Fax, from anywhere in the world, 650.318.8044

Microchip Information

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The Microchip Website (Ask a Question)
Microchip provides online support via our website at www.microchip.com/. This website is used to make files and information easily available to customers. Some of the content available includes:

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Product Change Notification Service

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Microchip’s product change notification service helps keep customers current on Microchip products. Subscribers will receive email notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest.

To register, go to www.microchip.com/pcn and follow the registration instructions.

Customer Support (Ask a Question)

Users of Microchip products can receive assistance through several channels:

  • Distributor or Representative
  • Local Sales Office
  • Embedded Solutions Engineer (ESE)
  • Technical Support

Customers should contact their distributor, representative or ESE for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in this document.

Technical support is available through the website at: www.microchip.com/support

Microchip Devices Code Protection Feature (Ask a Question)

Note the following details of the code protection feature on Microchip products:

  • Microchip products meet the specifications contained in their particular Microchip Data Sheet.
  • Microchip believes that its family of products is secure when used in the intended manner, within operating specifications, and under normal conditions.
  • Microchip values and aggressively protects its intellectual property rights. Attempts to breach the code protection features of Microchip product is strictly prohibited and may violate the Digital Millennium Copyright Act.
  • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not mean that we are guaranteeing the product is “unbreakable”. Code protection is constantly evolving. Microchip is committed to continuously improving the code protection features of our products.

Legal Notice

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This publication and the information herein may be used only with Microchip products, including to design, test, and integrate Microchip products with your application. Use of this information in any other manner violates these terms. Information regarding device applications is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. Contact your local Microchip sales office for additional support or, obtain additional support at www.microchip.com/en-us/support/design-help/client-support- services.

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Trademarks

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The Microchip name and logo, the Microchip logo, Adaptec, AVR, AVR logo, AVR Freaks, BesTime, BitCloud,
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registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed
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© 2023, Microchip Technology Incorporated and its subsidiaries. All Rights Reserved.
ISBN: 978-1-6683-2179-9

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FIG 17 Worldwide Sales and Service.JPG

FIG 18 Worldwide Sales and Service.JPG

FIG 19 Worldwide Sales and Service.JPG

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