QUECTEL RM520N-GL Hardware Design User Guide
- October 28, 2023
- QUECTEL
Table of Contents
RM520N-GL Hardware Design
RM520N-GL Hardware Design
5G Module Series Version: 1.0 Date: 2022-07-15 Status: Released
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5G Module Series
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5G Module Series
Safety Information
The following safety precautions must be observed during all phases of
operation, such as usage, service or repair of any cellular terminal or mobile
incorporating the module. Manufacturers of the cellular terminal should notify
users and operating personnel of the following safety information by
incorporating these guidelines into all manuals of the product. Otherwise,
Quectel assumes no liability for customers’ failure to comply with these
precautions.
Full attention must be paid to driving at all times in order to reduce the
risk of an accident. Using a mobile while driving (even with a handsfree kit)
causes distraction and can lead to an accident. Please comply with laws and
regulations restricting the use of wireless devices while driving.
Switch off the cellular terminal or mobile before boarding an aircraft. The
operation of wireless appliances in an aircraft is forbidden to prevent
interference with communication systems. If there is an Airplane Mode, it
should be enabled prior to boarding an aircraft. Please consult the airline
staff for more restrictions on the use of wireless devices on an aircraft.
Wireless devices may cause interference on sensitive medical equipment, so
please be aware of the restrictions on the use of wireless devices when in
hospitals, clinics or other healthcare facilities.
Cellular terminals or mobiles operating over radio signal and cellular network
cannot be guaranteed to connect in certain conditions, such as when the mobile
bill is unpaid or the (U)SIM card is invalid. When emergency help is needed in
such conditions, use emergency call if the device supports it. In order to
make or receive a call, the cellular terminal or mobile must be switched on in
a service area with adequate cellular signal strength. In an emergency, the
device with emergency call function cannot be used as the only contact method
considering network connection cannot be guaranteed under all circumstances.
The cellular terminal or mobile contains a transceiver. When it is ON, it
receives and transmits radio frequency signals. RF interference can occur if
it is used close to TV sets, radios, computers or other electric equipment.
In locations with explosive or potentially explosive atmospheres, obey all
posted signs and turn off wireless devices such as mobile phone or other
cellular terminals. Areas with explosive or potentially explosive atmospheres
include fuelling areas, below decks on boats, fuel or chemical transfer or
storage facilities, and areas where the air contains chemicals or particles
such as grain, dust or metal powders.
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5G Module Series
About the Document
Revision History
Version 1.0
Date 2021-11-25 2022-07-15
Author
Wynna SHU/ Simon WANG Juriyi XIE/ Wynna SHU/ Simon WANG
Description Creation of the document First official release
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Contents
Safety Information……………………………………………………………………………………………………………………… 3 About the
Document ………………………………………………………………………………………………………………….. 4 Contents
……………………………………………………………………………………………………………………………………. 5 Table
Index………………………………………………………………………………………………………………………………… 8 Figure Index
…………………………………………………………………………………………………………………………….. 10
1 Introduction ………………………………………………………………………………………………………………………. 11 1.1.
Introduction ………………………………………………………………………………………………………………. 11 1.2. Reference
Standard …………………………………………………………………………………………………… 11 1.3. Special Mark
…………………………………………………………………………………………………………….. 12
2 Product Overview ……………………………………………………………………………………………………………… 13 2.1.
Frequency Bands and Functions …………………………………………………………………………………. 13 2.2. Key
Features …………………………………………………………………………………………………………….. 14 2.3. EVB Kit
…………………………………………………………………………………………………………………….. 16 2.4. Functional Diagram
……………………………………………………………………………………………………. 17 2.5. Pin Assignment
…………………………………………………………………………………………………………. 18 2.6. Pin Description
………………………………………………………………………………………………………….. 19
3 Operating Characteristics ………………………………………………………………………………………………….. 24 3.1.
Operating Modes……………………………………………………………………………………………………….. 24 3.1.1. Sleep Mode
…………………………………………………………………………………………………….. 25 3.1.2. Airplane Mode
…………………………………………………………………………………………………. 26 3.2. Communication Interface with a
Host …………………………………………………………………………… 26 3.3. Power Supply
……………………………………………………………………………………………………………. 27 3.3.1. Voltage Stability
Requirements………………………………………………………………………….. 27 3.3.2. Reference Design for
Power Supply…………………………………………………………………… 28 3.3.3. Power Supply Monitoring
………………………………………………………………………………….. 29 3.4. Turn On
……………………………………………………………………………………………………………………. 29 3.5. Turn Off
……………………………………………………………………………………………………………………. 30 3.6. Reset
……………………………………………………………………………………………………………………….. 32
4 Application Interfaces ……………………………………………………………………………………………………….. 36 4.1.
(U)SIM Interfaces ………………………………………………………………………………………………………. 36 4.1.1. Pin
Definition of (U)SIM…………………………………………………………………………………….. 36 4.1.2. (U)SIM Hot-
Plug ………………………………………………………………………………………………. 37 4.1.3. Normally Closed (U)SIM
Card Connector……………………………………………………………. 38 4.1.4. Normally Open (U)SIM Card
Connector ……………………………………………………………… 39 4.1.5. (U)SIM Card Connector Without
Hot-Plug…………………………………………………………… 39 4.1.6. (U)SIM2 Card Compatible Design
……………………………………………………………………… 40 4.1.7. (U)SIM Design
Notices……………………………………………………………………………………… 40 4.2. USB
Interface……………………………………………………………………………………………………………. 41 4.3. PCIe Interface
…………………………………………………………………………………………………………… 43
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4.3.1. PCIe Operating Mode ………………………………………………………………………………………. 43 4.3.2. Pin
Definition of PCIe ……………………………………………………………………………………….. 44 4.3.3. Reference
Design for PCIe ……………………………………………………………………………….. 45 4.4. Control and
Indication Interfaces …………………………………………………………………………………. 46 4.4.1.
W_DISABLE1#………………………………………………………………………………………………… 46 4.4.2. W_DISABLE2#
………………………………………………………………………………………………. 47 4.4.3.
LED_WWAN#………………………………………………………………………………………………….. 48 4.4.4. WAKE_ON_WAN#
…………………………………………………………………………………………… 49 4.4.5. DPR
……………………………………………………………………………………………………………… 49 4.5. Cellular/WLAN COEX
Interface*………………………………………………………………………………….. 50 4.6. Antenna Tuner Control
Interface …………………………………………………………………………………. 50 4.7. Configuration
Pins……………………………………………………………………………………………………… 51
5 RF Characteristics …………………………………………………………………………………………………………….. 53 5.1.
Antenna Interfaces …………………………………………………………………………………………………….. 53 5.1.1. Pin
Definition …………………………………………………………………………………………………… 53 5.1.2. Cellular Network
………………………………………………………………………………………………. 54 5.1.2.1. Rx
Sensitivity…………………………………………………………………………………………. 54 5.1.2.2. Tx Power
………………………………………………………………………………………………. 57 5.1.3. GNSS
…………………………………………………………………………………………………………….. 57 5.1.3.1. GNSS Frequency
…………………………………………………………………………………… 57 5.1.3.2. GNSS Performance
……………………………………………………………………………….. 58 5.2. Antenna Connectors
………………………………………………………………………………………………….. 59 5.2.1. Antenna Connector
Specifications……………………………………………………………………… 59 5.2.2. Antenna Connector Location
…………………………………………………………………………….. 60 5.2.3. Antenna Connector
Installation………………………………………………………………………….. 61 5.2.4. Recommended RF Connector
Installation…………………………………………………………… 62 5.2.4.1. Assemble Coaxial Cable Plug
Manually ……………………………………………………. 62 5.2.4.2. Assemble Coaxial Cable Plug with
Jig ……………………………………………………… 63 5.2.5. Recommended Manufacturers of RF Connector
and Cable ………………………………….. 64 5.3. Antenna Requirements
………………………………………………………………………………………………. 64
6 Electrical Characteristics and Reliability ……………………………………………………………………………. 65
6.1. Power Supply Requirements ………………………………………………………………………………………. 65 6.2.
Power Consumption…………………………………………………………………………………………………… 65 6.3. Digital I/O
Characteristic …………………………………………………………………………………………….. 67 6.4. ESD
Protection………………………………………………………………………………………………………….. 68 6.5. Thermal
Dissipation …………………………………………………………………………………………………… 69 6.6. Absolute Maximum
Ratings ………………………………………………………………………………………… 70 6.7. Operating and Storage
Temperatures ………………………………………………………………………….. 71 6.8. Notification
……………………………………………………………………………………………………………….. 71 6.8.1. Coating
…………………………………………………………………………………………………………… 71 6.8.2. Cleaning
…………………………………………………………………………………………………………. 71
7 Mechanical Dimensions and Packaging …………………………………………………………………………….. 72 7.1.
Mechanical Dimensions ……………………………………………………………………………………………… 72
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7.2. Top and Bottom Views ……………………………………………………………………………………………….. 73 7.3. M.2
Connector…………………………………………………………………………………………………………… 73 7.4. Packaging
………………………………………………………………………………………………………………… 74
7.4.1. Blister Tray ……………………………………………………………………………………………………… 74 7.4.2.
Packaging Process ………………………………………………………………………………………….. 75
8 Appendix A References……………………………………………………………………………………………………… 76 9 Appendix B
Operating Frequency………………………………………………………………………………………. 80
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Table Index
Table 1: Special Mark………………………………………………………………………………………………………………… 12 Table 2:
Frequency Bands & MIMO & GNSS Systems………………………………………………………………….. 13 Table 3:
Key Features of RM520N-GL ………………………………………………………………………………………… 14 Table 4:
Definition of I/O Parameters…………………………………………………………………………………………… 19 Table 5:
Pin Description …………………………………………………………………………………………………………….. 19 Table 6:
Overview of Operating Modes ……………………………………………………………………………………….. 24 Table 7:
Definition of VCC and GND Pins ……………………………………………………………………………………. 27 Table 8:
Definition of FULL_CARD_POWER_OFF# ……………………………………………………………………… 29 Table 9:
Turn-on Timing of the Module………………………………………………………………………………………… 30 Table 10:
Turn-off Timing of the Module Through FULL_CARD_POWER_OFF#……………………………… 31
Table 11: Definition of RESET# Pin …………………………………………………………………………………………….. 32
Table 12: Reset Timing of the Module’s Warm Reset …………………………………………………………………….
34 Table 13: Reset Timing of the Module’s Hard Reset
……………………………………………………………………… 34 Table 14: Pin Definition of (U)SIM Interfaces
……………………………………………………………………………….. 36 Table 15: Pin Definition of USB Interface
…………………………………………………………………………………….. 41 Table 16: USB Trace Length Inside the
Module……………………………………………………………………………. 42 Table 17: Pin Definition of PCIe
Interface…………………………………………………………………………………….. 44 Table 18: PCIe Trace Length
Inside the Module …………………………………………………………………………… 46 Table 19: Pin Definition of
Control and Indication Interfaces…………………………………………………………… 46 Table 20: RF
Function Status …………………………………………………………………………………………………….. 47 Table 21: GNSS
Function Status ………………………………………………………………………………………………… 47 Table 22: Network
Status Indications of LED_WWAN# …………………………………………………………………. 48 Table 23: State
of the WAKE_ON_WAN# ……………………………………………………………………………………. 49 Table 24: Function of
the DPR Signal………………………………………………………………………………………….. 49 Table 25: Pin Definition
of COEX Interface ………………………………………………………………………………….. 50 Table 26: Pin
Definition of Antenna Tuner Control Interface …………………………………………………………… 50 Table
27: Configuration Pins List of M.2 Specification …………………………………………………………………… 51
Table 28: Configuration Pins of the Module………………………………………………………………………………….. 51
Table 29: RM520N-GL Pin Definition of Antenna Interfaces
…………………………………………………………… 53 Table 30: RM520N-GL Conducted Receiving Sensitivity
(Unit: dBm)………………………………………………. 54 Table 31: Cellular Output Power
…………………………………………………………………………………………………. 57 Table 32: GNSS Frequency
……………………………………………………………………………………………………….. 57 Table 33: GNSS Performance
……………………………………………………………………………………………………. 58 Table 34: Major Specifications of
the RF Connector ……………………………………………………………………… 59 Table 35: Antenna Requirements
……………………………………………………………………………………………….. 64 Table 36: Power Supply Requirements
……………………………………………………………………………………….. 65 Table 37: Averaged Current Consumption
…………………………………………………………………………………… 65 Table 38: Logic Levels of 1.8 V Digital
I/O……………………………………………………………………………………. 67 Table 39: Logic Levels of 3.3 V
Digital I/O……………………………………………………………………………………. 67 Table 40: (U)SIM 1.8 V I/O
Requirements ……………………………………………………………………………………. 67 Table 41: (U)SIM 3.0 V I/O
Requirements ……………………………………………………………………………………. 68
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Table 42: Electrostatic Discharge Characteristics (Temperature: 25 ºC,
Humidity: 40 %) ………………….. 68 Table 43: Absolute Maximum Ratings
…………………………………………………………………………………………. 70 Table 44: Operating and Storage
Temperatures …………………………………………………………………………… 71 Table 45: Related
Documents…………………………………………………………………………………………………….. 76 Table 46: Terms and
Abbreviations …………………………………………………………………………………………….. 76 Table 47: Operating
Frequencies (5G) ………………………………………………………………………………………… 80 Table 48: Operating
Frequencies (2G + 3G + 4G) ………………………………………………………………………… 82
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Figure Index
Figure 1: Functional Diagram……………………………………………………………………………………………………… 17 Figure
2: Pin Assignment …………………………………………………………………………………………………………… 18 Figure 3: DRX
Run Time and Current Consumption in Sleep Mode………………………………………………… 25 Figure 4:
Sleep Mode Application with USB Remote Wakeup ………………………………………………………… 25 Figure
5: Power Supply Limits during Burst Transmission ……………………………………………………………… 27
Figure 6: Reference Circuit for VCC ……………………………………………………………………………………………. 28
Figure 7: Reference Circuit for Power Supply ……………………………………………………………………………….
28 Figure 8: Turn On the Module with a Host GPIO……………………………………………………………………………
29 Figure 9: Turn-on Timing of the Module………………………………………………………………………………………..
30 Figure 10: Turn-off Timing through
FULL_CARD_POWER_OFF#………………………………………………….. 31 Figure 11: Reference Circuit for
RESET# with NPN Driver Circuit ………………………………………………….. 32 Figure 12: Reference
Circuit for RESET# with a Button…………………………………………………………………. 33 Figure 13: Reset
Timing of the Module’s Warm Reset …………………………………………………………………… 33 Figure 14:
Reset Timing of the Module’s Hard Reset…………………………………………………………………….. 34 Figure
15: Reference Circuit for Normally Closed (U)SIM Card Connector
………………………………………. 38 Figure 16: Reference Circuit for Normally Open (U)SIM Card
Connector ………………………………………… 39 Figure 17: Reference Circuit for a 6-Pin (U)SIM
Card Connector ……………………………………………………. 39 Figure 18: Recommended Compatible
Design for (U)SIM2 Interface………………………………………………. 40 Figure 19: Reference
Circuit of USB 3.1 & 2.0 Interfaces ………………………………………………………………. 41 Figure 20:
PCIe Interface Reference Circuit …………………………………………………………………………………. 45 Figure
21: W_DISABLE1# and W_DISABLE2# Reference Circuit ………………………………………………….. 48
Figure 22: LED_WWAN# Reference Circuit …………………………………………………………………………………. 48
Figure 23: WAKE_ON_WAN# Signal Reference Circuit ………………………………………………………………… 49
Figure 24: Recommended Circuit for Configuration Pins
……………………………………………………………….. 52 Figure 25: Dimensions of the Receptacle (Unit:
mm) …………………………………………………………………….. 59 Figure 26: RM520N-GL Antenna
Connectors……………………………………………………………………………….. 60 Figure 27: Dimensions of Mated
Plugs (Ø0.81/Ø1.13 mm Coaxial Cables) (Unit: mm) ……………………… 61 Figure 28: Space
Factor of Mated Connectors (Ø 0.81 mm Coaxial Cables) (Unit: mm)……………………. 61
Figure 29: Space Factor of Mated Connectors (Ø 1.13 mm Coaxial Cables) (Unit:
mm)……………………. 62 Figure 30: Plug in a Coaxial Cable Plug
………………………………………………………………………………………. 62 Figure 31: Pull out a Coaxial Cable Plug
……………………………………………………………………………………… 63 Figure 32: Install the Coaxial Cable Plug
with Jig………………………………………………………………………….. 63 Figure 33: Thermal Dissipation Area
Inside and on Bottom Side of the Module ……………………………….. 69 Figure 34: Placement
and Fixing of the Heatsink ………………………………………………………………………….. 70 Figure 35:
Mechanical Dimensions of the Module (Unit: mm)…………………………………………………………. 72
Figure 36: RM520N-GL Top and Bottom Views ……………………………………………………………………………. 73
Figure 37: Blister Tray Dimension Drawing ………………………………………………………………………………….. 74
Figure 38: Packaging Process ……………………………………………………………………………………………………. 75
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5G Module Series
1 Introduction
1.1. Introduction
The document introduces RM520N-GL module and describes its air and hardware
interfaces connected to your applications. This document helps you quickly
understand the interface specifications, RF characteristics, electrical and
mechanical details, as well as other related information. To facilitate its
application in different fields, reference design is also provided. Associated
with application notes and user guides, you can use the module to design and
set up mobile applications easily. You can also see document [1] to understand
the module hardware architecture.
1.2. Reference Standard
The module complies with the following standards: PCI Express M.2
Specification Revision 4.0, Version 1.0 PCI Express Base Specification
Revision 4.0 Universal Serial Bus 3.1 Specification ISO/IEC 7816-3 MIPI
Alliance Specification for RF Front-End Control Interface version 2.0 3GPP TS
27.007 and 3GPP TS 27.005
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1.3. Special Mark
5G Module Series
Table 1: Special Mark
Mark *
Definition
Unless otherwise specified, when an asterisk () is used after a function,
feature, interface, pin name, AT command, or argument, it indicates that the
function, feature, interface, pin, AT command, or argument is under
development and currently not supported; and the asterisk () after a model
indicates that the sample of the model is currently unavailable.
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5G Module Series
2 Product Overview
2.1. Frequency Bands and Functions
RM520N-GL is a 5G NR/LTE-FDD/LTE-TDD/UMTS/HSPA+ wireless communication module
with receive diversity. It provides data connectivity on 5G NR SA and NSA,
LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMA networks. RM520N-GL
is a standard M.2 Key-B WWAN module. For more details, see PCI Express M.2
Specification Revision 4.0, Version 1.0
RM520N-GL supports embedded operating systems such as Windows, Linux and
Android, and also provides GNSS and voice* functions to meet specific
application demands.
RM520N-GL is an industrial-grade module for industrial and commercial
applications only.
The following table shows the frequency bands, MIMO and GNSS systems supported
by the module.
Table 2: Frequency Bands & MIMO & GNSS Systems
Mode 5G NR SA
5G NR NSA
LTE WCDMA GNSS
Frequency Bands
n1/n2/n3/n5/n7/n8/n12/n13/n14/n18/n20/n25/n26/n28/n29/n30/n38/n40/n41/n48/
n66/n70/n71/n75/n76/n77/n78/n79 DL 4 × 4 MIMO:
n1/n2/n3/n7/n25/n30/n38/n40/n41/n48/n66/n70/n77/n78/n79 UL 2 × 2 MIMO:
n38/n41/n48/n77/n78/n79
n1/n2/n3/n5/n7/n8/n12/n13/n14/n18/n20/n25/n26/n28/n29/n30/n38/n40/n41/n48/
n66/n70/n71/n75/n76/n77/n78/n79 DL 4 × 4 MIMO:
n1/n2/n3/n7/n25/n30/n66/n38/n40/n41/n48/n70/n77/n78/n79 FDD:
B1/B2/B3/B4/B5/B7/B8/B12/B13/B14/B17/B18/B19/B20/B25/B26/B28/B29/
B30/B32/B66/B71 TDD: B34/B38/B39/B40/B41/B42/B43/B46(LAA)/B48 DL 4 × 4 MIMO:
B1/B2/B3/B4/B7/B25/B30/B38/B40/B41/B42/B43/B48/B66
B1/B2/B4/B5/B8/B19
GPS/GLONASS/BDS/Galileo/QZSS
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The module can be applied to the following fields:
Rugged tablet PC and laptop computer Remote monitor system Smart metering
system Wireless CPE Smart TV Outdoor live streaming equipment Wireless router
and switch Other wireless terminal devices
5G Module Series
2.2. Key Features
Table 3: Key Features of RM520N-GL
Feature Function Interface Power Supply (U)SIM Interface eSIM
USB Interface
PCIe Interface
Details
PCI Express M.2 Interface
Supply voltage: 3.1354.4 V Typical supply voltage: 3.7 V Compliant with
ISO/IEC 7816-3, ETSI and IMT-2000 Supported (U)SIM card: Class B (3.0 V) and
Class C (1.8 V) (U)SIM1 and (U)SIM2 interfaces Dual SIM Single Standby
Optional eSIM function
Compliant with USB 3.1 Gen2 and USB 2.0 specifications Maximum transmission
rates:
– USB 3.1 Gen2: 10 Gbps – USB 2.0: 480 Mbps Used for AT command communication,
data transmission, firmware upgrade (USB 2.0 only), software debugging, GNSS
NMEA sentence output and voice over USB* Supported USB serial drivers: –
Windows 7/8/8.1/10, – Linux 2.65.18 – Android 4.x12.x Complaint with PCIe
Gen4 PCIe × 1 lane, supporting up to 16 Gbps Used for AT command
communication, data transmission, firmware upgrade, software debugging, GNSS
NMEA sentence output
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5G Module Series
5G NR bands: Class 3 (23 dBm ±2 dB)
5G NR HPUE bands (n38/n40/n41/n77/n78/n79): Class 2 (26 dBm +2/-3 dB)
Transmitting Power LTE bands: Class 3 (23 dBm ±2 dB)
LTE HPUE 1 bands (B38/B41/B42/B43): Class 2 (26 dBm ±2 dB) WCDMA bands: Class 3 (24 dBm +1/-3 dB)
3GPP Release 16
Supported modulations:
– Uplink: /2-BPSK, QPSK, 16QAM, 64QAM and 256QAM
– Downlink: QPSK, 16QAM, 64QAM and 256QAM
5G NR Features
Supported SCS: 15 kHz 2 and 30 kHz 2 SA 3 and NSA 3 operation modes supported on all the 5G band
Option 3x, 3a, 3 and Option 2
Maximum transmission data rates 4:
– NSA: 3.4 Gbps (DL)/ 550 Mbps (UL)
– SA: 2.4 Gbps (DL)/ 900 Mbps (UL)
3GPP Release 16
LTE Category: DL Cat 19/ UL Cat 18
Supported modulations:
LTE Features
– Uplink: QPSK, 16QAM and 64QAM and 256QAM
– Downlink: QPSK, 16QAM and 64QAM and 256QAM Supports 1.4/3/5/10/15/20 MHz RF bandwidth
Maximum transmission data rates 4: 1.6 Gbps (DL)/ 200 Mbps (UL)
3GPP Release 9, DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMA
Supported modulations: QPSK, 16QAM and 64QAM
UMTS Features
Maximum transmission data rates 4: – DC-HSDPA: 42 Mbps (DL)
– HSUPA: 5.76 Mbps (UL)
– WCDMA: 384 kbps (DL)/ 384 kbps (UL)
Rx-diversity
5G NR/LTE/WCDMA Rx-diversity
GNSS Features
Protocol: NMEA 0183 Data Update Rate: 1 Hz
Antenna Interfaces ANT0, ANT1, ANT2, and ANT3
AT Commands
Internet Protocol Features
Firmware Upgrade
Compliant with 3GPP TS 27.007 and 3GPP TS 27.005 Quectel enhanced AT commands NITZ, PING and QMI protocols PAP and CHAP for PPP connections USB 2.0 interface PCIe interface
1 HPUE is only for single carrier. 2 5G NR FDD bands only support 15 kHz SCS, and NR TDD bands only support 30 kHz SCS. 3 See document [2] for bandwidth supported by each frequency band in the NSA and SA modes. 4 The maximum rates are theoretical and the actual values depend on the network configuration.
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5G Module Series
(D)FOTA (A/B system updates supported)
SMS
Physical
Characteristics
Temperature Range
Text and PDU modes Point-to-point MO and MT SMS cell broadcast SMS storage: ME by default M.2 Key-B Size: 30.0 mm × 52.0 mm × 2.3 mm Weight: approx. 8.7 g Operating temperature range: -30 °C to +75 °C 5 Extended temperature range: -40 °C to +85 °C 6 Storage temperature range: -40 °C to +90°C
RoHS
All hardware components are fully compliant with EU RoHS directive
2.3. EVB Kit
To help you develop applications with the module, Quectel supplies an
evaluation board (5G-M2 EVB) with accessories to control or test the module.
For more details, see document [3].
5 To meet this operating temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module can meet 3GPP specifications. 6 To meet this extended temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module remains the ability to establish and maintain functions such as voice, SMS, emergency call, etc., without any unrecoverable malfunction. Radio spectrum and radio network are not influenced, while one or more specifications, such as Pout, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again.
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2.4. Functional Diagram
The following figure is a block diagram of RM520N-GL.
Power management Baseband LPDDR4X SDRAM + NAND Flash Radio frequency M.2 Key-B
interface
VCC
GND FULL_CARD_POWER_OFF#
RESET#
PMU
PCI Express M.2 Key-B Interface
EBI0 EBI2
NAND 4Gb x 8 LPDDR4X 4Gb x 16
eSIM
SPMI
32.768KHZ
76.8MHz XO
Clock IC
RF_CLK 76.8MHz
BB_CLK 19.2MHz
(U)SIM2 (U)SIM1 USB 2.0 & USB 3.1 PCIe Gen4.0
RFFE LED_WWAN# WAKE_ON_WAN# W_DISABLE1#
W_DISABLE2#
Baseband
Qlink Control
Sub-6 GHz Transceiver
5G Module Series
APT
Tx
PRx
ANT3
ANT2
Tx/Rx Blocks
ANT1 DRx
ANT0
Figure 1: Functional Diagram
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2.5. Pin Assignment
The following figure shows the pin assignment of the module.
5G Module Series
PIN74
PIN75
BOT
TOP
PIN10 PIN2
PIN11 PIN1
Figure 2: Pin Assignment
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2.6. Pin Description
5G Module Series
Table 4: Definition of I/O Parameters
Type AI AO AIO DI DO DIO OD PI PO PU PD
Description Analog Input Analog Output Analog Input/Output Digital Input Digital Output Digital Input/Output Open Drain Power Input Power Output Pull Up Pull Down
The following table shows the pin definition and description of the module.
Table 5: Pin Description
Pin No. Pin Name
I/O
1
CONFIG_3
DO
2
VCC
PI
3
GND
4
VCC
PI
5
GND
Description
DC Characteristic Comment
Not connected internally
Power supply for the module
Vmin = 3.135 V Vnom = 3.7 V Vmax = 4.4 V
Ground
Power supply for the module
Vmin = 3.135 V Vnom = 3.7 V Vmax = 4.4 V
Ground
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5G Module Series
Turn on/off the module VIHmax = 4.4 V
Internally pulled
FULLCARD
6
POWER_OFF#
DI, PD High level: Turn on
VIHmin = 1.19 V
down with a 100 k
Low level: Turn off
VILmax = 0.2 V
resistor.
7
USB_DP
AIO USB differential data (+)
Airplane mode control
8
W_DISABLE1# DI, PU
1.8/3.3 V
Active LOW
Internally pulled up to 1.8 V with a 100 k resistor.
9
USB_DM
AIO USB differential data (-)
RF status LED indicator
10
LED_WWAN#
OD
VCC
Active LOW
11
GND
Ground
12
Notch
Notch
13
Notch
Notch
14
Notch
Notch
15
Notch
Notch
16
Notch
Notch
17
Notch
Notch
18
Notch
Notch
19
Notch
Notch
20
RESERVED
21
CONFIG_0
DO
Not connected internally
22
RESERVED
Wake up the host
23
WAKE_ON_WAN# OD
1.8/3.3 V
Active LOW
24
VDDIO_1V8
Provide 1.8 V for PO
external circuit
1.8 V
25
DPR*
Dynamic power DI, PU
reduction
1.8 V
GNSS control
26
W_DISABLE2#* DI, PU
Active LOW
1.8/3.3 V
27
GND
Ground
Maximum output current: 50 mA
Internally pulled up to 1.8 V with a 100 k resistor.
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28
RESERVED
USB 3.1 super-speed
29
USB_SS_TX_M AO
transmit (-)
30
USIM1_RST
DO, PD (U)SIM1 card reset
USIM1_VDD 1.8/3.0 V
USB 3.1 super-speed
31
USB_SS_TX_P AO
transmit (+)
32
USIM1_CLK
DO, PD (U)SIM1 card clock
USIM1_VDD 1.8/3.0 V
33
GND
Ground
DIO,
USIM1_VDD
34
USIM1_DATA
(U)SIM1 card data
PU
1.8/3.0 V
USB 3.1 super-speed
35
USB_SS_RX_M AI
receive (-)
(U)SIM1 card power USIM1_VDD
36
USIM1_VDD
PO
supply
1.8/3.0 V
USB 3.1 super-speed
37
USB_SS_RX_P AI
receive (+)
Notification from WLAN
38
WLAN_TX_EN* DI
to SDR when WLAN 1.8 V
transmitting
39
GND
Ground
(U)SIM2 card hot-plug
40
USIM2_DET 7
DI, PD
1.8 V
detect
41
PCIE_TX_M
AO
PCIe transmit (-)
DIO,
USIM2_VDD
42
USIM2_DATA
(U)SIM2 card data
PU
1.8/3.0 V
43
PCIE_TX_P
AO
PCIe transmit (+)
44
USIM2_CLK
DO, PD (U)SIM2 clock
USIM2_VDD 1.8/3.0 V
45
GND
Ground
46
USIM2_RST
DO, PD (U)SIM2 card reset
USIM2_VDD 1.8/3.0 V
47
PCIE_RX_M
AI
PCIe receive (-)
5G Module Series
7 USIM1_DET and USIM2_DET are pulled LOW by default, and will be internally pulled up to 1.8 V by software configuration only when (U)SIM hot-plug is enabled by AT+QSIMDET.
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5G Module Series
(U)SIM2 card power USIM2_VDD
48
USIM2_VDD
PO
supply
1.8/3.0V
49
PCIE_RX_P
AI
PCIe receive (+)
PCIe reset
50
PCIE_RST_N
DI 8
Active LOW
1.8/3.3 V
51
GND
Ground
PCIe clock request
52
PCIE_CLKREQ_N OD 8
1.8/3.3 V
Active LOW
53
PCIE_REFCLK_M AIO PCIe reference clock (-)
PCIe wake up
54
PCIE_WAKE_N OD 8
Active LOW
1.8/3.3 V
55
PCIE_REFCLK_P AIO PCIe reference clock (+)
Used for external MIPI
56
RFFE_CLK* 9
DO, PD
1.8 V
IC control
57
GND
Ground
DIO, Used for external MIPI
58
RFFE_DATA* 9
1.8 V
PD
IC control
59
RESERVED
Notification from SDR to
60
N79_TX_EN*
DO
WLAN when n79
1.8 V
transmitting
61
RESERVED
5G/LTE and WLAN
62
COEX_RXD* 10 DI, PD
1.8 V
coexistence receive
63
RESERVED
5G/LTE and WLAN
64
COEX_TXD* 10
DO, PD
1.8 V
coexistence transmit
65
RESERVED
(U)SIM1 card hot-plug
66
USIM1_DET 7
DI, PD
1.8 V
detect
67
RESET#
Reset the module DI, PU
Active LOW
1.8 V
Internally pulled up to 1.8 V
8 PCIE_RST_N behaves as DI in PCIe EP mode, and as OD in PCIe RC mode.
PCIE_CLKREQ_N and PCIE_WAKE_N
behave as OD in PCIe EP mode, and as DI in PCIe RC mode. PCIe EP mode is the
default. 9 If this function is required, please contact Quectel for more
details. 10 Please note that COEX_RXD and COEX_TXD cannot be used as general
UART ports.
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5G Module Series
68
RESERVED
69
CONFIG_1
70
VCC
71
GND
72
VCC
73
GND
74
VCC
75
CONFIG_2
Connected to GND DO
internally
Vmin = 3.135 V
Power supply for the
PI
Vnom = 3.7 V
module
Vmax = 4.4 V
Ground
Vmin = 3.135 V
Power supply for the
PI
Vnom = 3.7 V
module
Vmax = 4.4 V
Ground
Vmin = 3.135 V
Power supply for the
PI
Vnom = 3.7 V
module
Vmax = 4.4 V
DO
Not connected internally
NOTE
1. Keep all RESERVED and unused pins unconnected. 2. When the module is
connected with an IPQ device to achieve Wi-Fi function, pin 68, pin 64, and
pin
62 can be used for status signal between the IPQ device and the module. Pin 68
(AP2SDX_STATUS): Status indication signal from the IPQ device to the module
Pin 64 (SDX2AP_STATUS): Status indication signal from the module to the IPQ
device Pin 62 (SDX2AP_E911_STATUS): E911 status indication signal from the
module to IPQ device.
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5G Module Series
3 Operating Characteristics
3.1. Operating Modes
The table below briefly summarizes the various operating modes of the module.
Table 6: Overview of Operating Modes
Mode Full Functionality Mode Minimum Functionality Mode Airplane Mode
Sleep Mode
Power Down Mode
Details
Software is active. The module has registered on the network, and Idle
it is ready to send and receive data. Network is connected. In this mode, the
power consumption is Voice/Data determined by network setting and data
transfer rate. AT+CFUN=0 command sets the module to a minimum functionality
mode without removing the power supply. In this mode, both RF function and
(U)SIM card are invalid. AT+CFUN=4 command or driving W_DISABLE1# pin LOW will
set the module to airplane mode. In this mode, the RF function is invalid.
When AT+QSCLK=1 command is executed and the host’s USB enters suspend mode,
the module will enter sleep mode. The module keeps receiving paging messages,
SMS, voice calls and TCP/UDP data from the network with its current
consumption reducing to the minimal level. In this mode, the power management
unit shuts down the power supply. Software is inactive, all application
interfaces are inaccessible, and the operating voltage (connected to VCC)
remains applied.
NOTE For more details about the AT command, see document [4].
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5G Module Series
3.1.1. Sleep Mode
DRX of the module is able to reduce the current consumption to a minimum value
during the sleep mode, and DRX cycle values are broadcasted by the wireless
network. The figure below shows the relationship between the DRX run time and
the current consumption in sleep mode. The longer the DRX cycle is, the lower
the current consumption will be.
Current
DRX OFF ON OFF
ON
OFF ON
OFF ON
OFF
Run Time
Figure 3: DRX Run Time and Current Consumption in Sleep Mode
The following part of this section presents the power saving procedure and
sleep mode of the module.
If the host supports USB suspend/resume and remote wakeup function, the
following two conditions must be met to set the module to sleep mode.
AT+QSCLK=1 command is executed. The module’s USB interface enters suspend
mode.
The following figure shows the connection between the module and the host.
Module
Host
USB Interface GND
USB Interface GND
Figure 4: Sleep Mode Application with USB Remote Wakeup
The module and the host will wake up in the following conditions:
Sending data to the module through USB will wake up the module. When the
module has a URC to report, it will send remote wake-up signals via USB to
wake up the
host.
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5G Module Series
3.1.2. Airplane Mode The module provides a W_DISABLE1# pin to disable or
enable airplane mode through hardware operation. See Chapter 4.4.1 for more
details.
3.2. Communication Interface with a Host
The module supports to communicate through both USB and PCIe interfaces,
respectively referring to the USB mode and the PCIe mode as described below:
USB Mode
Supports all USB 2.0/3.1 features Supports MBIM/QMI/QRTR/AT over USB interface
Communication can be switched to PCIe mode by AT command
USB is the default communication interface between the module and the host. To
use PCIe interface for the communication between a host, an AT command under
USB mode can be used. For more details about the AT command, see document [4].
It is suggested that USB 2.0 interface be reserved for firmware upgrade.
USB-AT-based PCIe Mode
Supports MBIM/QMI/QRTR/AT over PCIe interface Supports AT over USB interface
Communication can be switched back to USB mode by AT command
When the module works at the USB-AT-based (switched from USB mode by AT
command) PCIe mode, it supports MBIM/QMI/QRTR/AT, and can be switched back to
USB mode by AT command.
For USB-AT-based PCIe mode, the firmware upgrade via PCIe interface is not
supported, so USB 2.0 interface must be reserved for the firmware upgrade.
eFuse-based PCIe Mode
Supports MBIM/QMI/QRTR/AT over PCIe interface Supports Non-X86 systems and X86
system (supports BIOS PCIe early initial)
The module can also be reprogrammed to PCIe mode based on eFuse. If switched
to PCIe mode by burnt eFuse, the communication cannot be switched back to USB
mode.
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5G Module Series
Note that if the host does not support firmware upgrade through PCIe, the
firmware can be upgraded by the 5G-M2 EVB, which could be connected to PC with
a USB type-B cable. For more details, see document [3].
3.3. Power Supply
The following table shows pin definition of VCC pins and ground pins.
Table 7: Definition of VCC and GND Pins
Pin
Pin Name I/O
2, 4, 70, 72, 74
VCC
PI
3, 5, 11, 27, 33, 39, GND
45, 51, 57, 71, 73
Description Power supply for the module Ground
DC Characteristics
Vmin = 3.135 V Vnom = 3.7 V Vmax = 4.4 V
3.3.1. Voltage Stability Requirements
The power supply range of the module is from 3.135 V to 4.4 V. Please ensure
that the input voltage will never drop below 3.135 V, otherwise the module
will power off automatically. The voltage ripple of the input power supply
should be less than 100 mV. The figure below shows the power supply limits
during burst transmission when 3.3 V power supply is applied.
Burst Transmission
Load (A)
VCC (V) Voltage Drop
3.135 V
Burst Transmission
Voltage Ripple < 100 mV
Figure 5: Power Supply Limits during Burst Transmission
Ensure the continuous current capability of the power supply is 3.0 A at least. To decrease the voltage drop, two bypass capacitors of 220 µF with low ESR should be used, and a multi-layer ceramic chip capacitor (MLCC) array should also be used due to its ultra-low ESR. It is recommended to use ceramic capacitors (100 nF, 6.8 nF, 220 pF, 68 pF, 15 pF, 9.1 pF, 4.7 pF) for composing the MLCC array, and place these capacitors close to VCC pins. The width of VCC trace should be no less than 3 mm. In principle, the longer the VCC trace is, the wider it should be. In addition, to guarantee stability of the power supply, it is recommended to use a TVS with working peak
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5G Module Series
reverse voltage of 5 V.
VCC (3.7 V Typ.)
Module
VCC 2, 4
+ C2 C4 C6 C8 C10
220 F 100nF 6.8 nF 220 pF 68 pF
PMU
GND 3, 5, 11
VCC 70, 72, 74
TVS
C1 C3
C5 C7 C9 C11 C12
220 F 100nF 220pF 68 pF 15 pF 9.1 pF 4.7 pF
APT
GND
27, 33, 39, 45, 51, 57,
71, 73
Figure 6: Reference Circuit for VCC
3.3.2. Reference Design for Power Supply
The performance of the module largely depends on the power source. If the
voltage difference between the input and output is not too big, it is
suggested that an LDO should be used when supplying power for the module. If
there is a big voltage difference between the input source and the desired
output (VCC = 3.7 V Typ.), a buck DC-DC converter is preferred.
The following figure shows a reference design for +5.0 V input power source based on a DC-DC converter. The typical output of the power supply is about 3.7 V and the rated load current is 5.0 A.
PWR_IN
U1
C1
C2 C3 C4
220 F 220 F 100 nF 33 pF
PWR_EN
R7 4.7k
R8 47k
R1 88.7k
R2
VFB
35.7k
R3 R4 10k 182k
VIN VIN VIN EN VSNS COMP RT/CLK SS
EP
Q1 NPN
C5
C6
NM_0.5pf 10 nF
C7 10 nF
PH PH PH BOOT PWRGD GND GND AGND
L1 1 H
PWR_OUT
C8 100 nF
PWRGD
C9
C10 C11 C12 C13
100 F 100 F 100 nF 33 pF 10 pF
R5 330k 1%
R6 100k 1%
VFB
Figure 7: Reference Circuit for Power Supply
NOTE To avoid damages to the internal flash, DO NOT cut off the power supply
before the module is completely turned off by pulling down
FULL_CARD_POWER_OFF# pin for more than 900 ms, and DO NOT cut off power supply
directly when the module is working.
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3.3.3. Power Supply Monitoring
AT+CBC can be used to monitor the voltage value of VCC.
5G Module Series
3.4. Turn On
FULL_CARD_POWER_OFF# is used to turn on/off the module or reset the module
through hard reset. This input signal is 3.3 V tolerant and can be driven by
either 1.8 V or 3.3 V GPIO. And it has internally pulled down with a 100 k
resistor.
When FULL_CARD_POWER_OFF# is de-asserted (driven HIGH, 1.19 V), the module
will turn on.
Table 8: Definition of FULL_CARD_POWER_OFF#
Pin No. Pin Name
I/O
Description
DC Characteristics Comment
FULLCARD
Turn on/off the module. VIHmax = 4.4 V
Pull down with a
6
DI, PD High level: Turn on POWER_OFF#
Low level: Turn off
VIHmin = 1.19 V VILmax = 0.2 V
100 k resistor.
It is recommended to use a host GPIO to control FULL_CARD_POWER_OFF#. A simple reference circuit is illustrated by the following figure.
Host
1.8 V or 3.3 V
Module
GPIO
FULL_CARD_POWER_OFF# 6
R1 100k
PMU
NOTE: The voltage of pin 6 should be no less than 1.19 V when it is at HIGH level. Figure 8: Turn On the Module with a Host GPIO
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5G Module Series
The timing of turn-on scenario is illustrated by the following figure.
VCC(H)
FULLCARD POWER_OFF#
RESET# PCIE_CLKREQ_N
PCIE_RST_N
Module power-on
Tpr
System turn-on and booting
Ton3
Ton1
Ton Ton2
3.7 V VIH 1.19 V 1.8 V
PCIE_REFCLK
Module Status
OFF
Booting
Active
NOTE: When the module is in USB mode, please ignore the PCIe related signals and their timing parameters in the figure.
Figure 9: Turn-on Timing of the Module
Table 9: Turn-on Timing of the Module
Symbol Min.
Typ.
Tpr
100 ms –
Ton1
–
–
Ton
100 ms
Ton2
100 s –
Ton3
–
–
Max.
Comment
–
System turn-on time depending on the host.
The period when the module requests the PCIe clock from Ton – Ton2
the host. The period when the host GPIO controls the module to exit the PCIe
reset state. The period during which PCIE_REFCLK_P/M is stable before
PCIE_RST_N is inactive. The time delay when RESET# is pulled up internally
after PCIE_RST_N is de-asserted. Do not pull down RESET# 390 ms before the
module is powered on. The time will continue to be updated.
3.5. Turn Off
For the design that turns on the module with a host GPIO, when the power is
supplied to VCC, driving FULL_CARD_POWER_OFF# pin LOW ( 0.2 V) or tri-stating
the pin will turn off the module. Sending the
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5G Module Series
command AT+CFUN=0 is necessary before shutting down the module.
The following is a proper shutdown handshake for FULL_CARD_POWER_OFF#, which
complies with the M.2 specification. Only after this process is completed, can
the module be successfully turned off by pulling down FULL_CARD_POWER_OFF#.
1. The host sends AT+CFUN=0 to the module. 2. The module will do the
essential shutdown tasks. 3. The module responds OK.
The timing of turn-off scenario is illustrated by the following figure.
3.7 V
VCC(H)
FULLCARD VIH 1.19 V
POWER_OFF#
Tpd
RESET# 1.8 V
Toff2
VIL 0.2 V
Execute AT+CFUN=0, and the module responds OK
Toff1
PCIE_RST_N
Module Status
RunninAgctive
Turn-off procedure
OFOFFF
NOTE: When the module is in USB mode, please ignore the PCIe related signals and their timing parameters in the figure.
Figure 10: Turn-off Timing through FULL_CARD_POWER_OFF#
Table 10: Turn-off Timing of the Module Through FULL_CARD_POWER_OFF#
Symbol Min. Typ. Max.
Toff1
–
100 ms –
Toff2
0 ms 100 ms –
Tpd
900 ms –
–
Comment
The period from the host pulls down PCIE_RST_N to it pulls down RESET# The
period from the host pulls down RESET# to it pulls down FULL_CARD_POWER_OFF#
The period from the host pulls down FULLCARD POWER_OFF# to the module turns
off. It is recommended to cut off the VCC when the module has been turned off
completely.
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5G Module Series
3.6. Reset
RESET# is an active LOW signal (1.8 V logic level). When this pin is asserted,
the module will immediately enter reset condition.
Please note that triggering the RESET# signal will lead to loss of all data in
the module and removal of system drivers. It will also disconnect the modem
from the network.
Table 11: Definition of RESET# Pin
Pin No. Pin Name I/O
67
RESET# DI, PU
Description
DC Characteristics
Reset the module. 1.8 V
Active LOW
Comment
Internally pulled up to 1.8 V.
The module can be reset by pulling down the RESET#. An open collector/drain driver or a button can be used to control RESET#.
Host
Module
VDD 1.8 V
Reset pulse
GPIO R2 1k
R3 100k
RESET# 67
Q1 NPN
TRST#
1.5 A BB
Figure 11: Reference Circuit for RESET# with NPN Driver Circuit
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5G Module Series
Module
VDD 1.8 V
RESET# 67
S1
TVS C1
33 pF
TRST#
1.5 A BB
NOTE: The capacitor C1 is recommended to be less than 47 pF.
Figure 12: Reference Circuit for RESET# with a Button
For a warm reset when only the reset signal is pulled LOW, see the timing illustrated by the figure below. In this reset mode, the power of the module will not be turned off. This timing sequence is recommended for scenarios where the module is reset with a button.
VCC(H)
FULLCARD POWER_OFF#(H)
RESET# PCIE_CLKREQ_N
(L)
PCIE_RST_N(H)
TRST#
3.7 V 1.8 V
PCIE_REFCLK
Module Status
Active
Baseband Resetting
Booting
NOTE: When the module is in USB mode, please ignore the PCIe related signals and their timing parameters in the figure.
Figure 13: Reset Timing of the Module’s Warm Reset
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5G Module Series
Table 12: Reset Timing of the Module’s Warm Reset
Symbol Min.
Typ.
Max.
TRST#
200 ms 400 ms
–
Comment Reset baseband chip IC only
For a hard reset, see the timing illustrated by the figure below. This timing sequence is recommended for scenarios where the module is reset with NPN driver circuit. Sending the command AT+CFUN=0 is necessary before resetting the module.
VCC(H)
FULLCARD POWER_OFF#
RESET#
Toff2
3.7 V Toff
VIH 1.19 V
Ton1
1.8 V Ton3
PCIE_CLKREQ_N
Execute AT+CFUN=0, and the module responds OK
Toff1
PCIE_RST_N
Ton Ton2
PCIE_REFCLK
Module Status
Active
Resetting
Booting
NOTE: 1. The timing parameters after the host pulls up FULL_CARD_POWER_OFF#
refer to the booting timing of the PCIe
mode in Chapter 3.4. 2. When the module is in USB mode, please ignore the PCIe
related signals and their timing parameters in the figure.
Figure 14: Reset Timing of the Module’s Hard Reset
Table 13: Reset Timing of the Module’s Hard Reset
Symbol Min.
Toff1
–
Toff2
0 ms
Toff
900 ms
Ton1
–
Typ. 100 ms 100 ms –
Max.
Comment
The period from the host pulls down PCIE_RST_N to it –
pulls down RESET#. The period from the host pulls down RESET# to it pulls down
FULL_CARD_POWER_OFF#. Module hard reset. Ensure that the module has been
turned off completely. The period when the module requests the PCIe clock from
Ton – Ton2 the host.
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Ton
100 ms –
Ton2
100 s –
Ton3
–
–
5G Module Series
–
390 ms
The period when the host GPIO controls the module to exit the PCIe reset state. The period during which REFCLK_P/M is stable before PCIE_RST_N is inactive. RESET# signal will be pull up internally during the module’s turn-on process. For the host, this time is the maximum period to be allowed to keep RESET# at low level. The time will continue to be updated.
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5G Module Series
4 Application Interfaces
The physical connections and signal levels of the module comply with the PCI
Express M.2 specification. This chapter mainly describes the definition and
application of the following interfaces/pins of the module:
(U)SIM interfaces USB interface PCIe interface Control and indication
interfaces Cellular/WLAN COEX interface* Antenna tuner control interface
Configuration pins
4.1. (U)SIM Interfaces
The (U)SIM interface circuitry meets ISO/IEC 7816-3, ETSI and IMT-2000
requirements. Both Class B (3.0 V) and Class C (1.8 V) (U)SIM cards are
supported.
4.1.1. Pin Definition of (U)SIM
The module has two (U)SIM interfaces, and supports dual SIM single standby.
Table 14: Pin Definition of (U)SIM Interfaces
Pin No. Pin Name
I/O
36
USIM1_VDD PO
Description (U)SIM1 card power supply
34
USIM1_DATA DIO, PU (U)SIM1 card data
32
USIM1_CLK DO, PD (U)SIM1 card clock
30
USIM1_RST DO, PD (U)SIM1 card reset
66
USIM1_DET DI, PD (U)SIM1 card hot-plug detect
DC Characteristics
USIM1_VDD 1.8/3.0 V USIM1_VDD 1.8/3.0 V USIM1_VDD 1.8/3.0 V USIM1_VDD 1.8/3.0
V
1.8 V
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5G Module Series
48
USIM2_VDD PO
(U)SIM2 card power supply
USIM2_VDD 1.8/3.0V
42
USIM2_DATA DIO, PU (U)SIM2 card data
USIM2_VDD 1.8/3.0 V
44
USIM2_CLK DO, PD (U)SIM2 card clock
USIM2_VDD 1.8/3.0 V
46
USIM2_RST DO, PD (U)SIM2 card reset
USIM2_VDD 1.8/3.0 V
40
USIM2_DET DI, PD (U)SIM2 card hot-plug detect 1.8 V
4.1.2. (U)SIM Hot-Plug
The module supports (U)SIM card hot-plug via the (U)SIM card hot-plug detect
pins (USIM1_DET and USIM2_DET), which is disabled by default. (U)SIM card is
detected by USIM_DET interrupt. (U)SIM card insertion is detected by high/low
level.
The following command enables or disables (U)SIM card hot-plug function. The level of (U)SIM card detection pin should also be set when the (U)SIM card is inserted.
AT+QSIMDET (U)SIM Card Detection
Test Command AT+QSIMDET=?
Response +QSIMDET: (list of supported
Read Command AT+QSIMDET?
OK Response +QSIMDET:
Write Command AT+QSIMDET=
OK Response OK
Maximum Response Time Characteristics
If there is any error: ERROR
300 ms
The command takes effect after the module is restarted. The configuration will
be saved automatically.
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Parameter
5G Module Series
Integer type. Enable or disable (U)SIM card detection. 0 Disable 1 Enable
Integer type. The level of (U)SIM detection pin when a (U)SIM card is
inserted. 0 Low level 1 High level
NOTE
1. Hot-plug function is invalid if the configured value of
2. The underlined value is the default. 3. USIM1_DET and USIM2_DET are pulled
LOW by default, and will be internally pulled up to 1.8 V by
software configuration only when (U)SIM hot-plug is enabled by AT+QSIMDET.
4.1.3. Normally Closed (U)SIM Card Connector
With a normally closed (U)SIM card connector, USIM_DET pin is shorted to
ground when there is no (U)SIM card inserted. (U)SIM card detection by high
level is applicable to this type of connector. Once (U)SIM hot-plug is enabled
by executing AT+QSIMDET=1,1, a (U)SIM card insertion will drive USIM_DET from
low to high level, and the removal of it will drive USIM_DET from high to low
level.
When the (U)SIM is absent, CD is shorted to ground and USIM_DET is at low
level. When the (U)SIM is present, CD is open from ground and USIM_DET is at
high level.
The following figure shows a reference design for (U)SIM interface with a
normally closed (U)SIM card connector.
Module
USIM_VDD
USIM_VDD
22
USIM_RST
22
USIM_CLK
USIM_DET USIM_DATA 22
GND
10k-20k 10pF 10 pF 10 pF
100 nF TVS array
(U)SIM Card Connector
VCC RST CLK CD IO GND
VPP
NOTE: All these resistors, capacitors and TVS should be close to (U)SIM card connector in PCB layout.
Figure 15: Reference Circuit for Normally Closed (U)SIM Card Connector
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5G Module Series
4.1.4. Normally Open (U)SIM Card Connector
With a normally open (U)SIM card connector, CD1 and CD2 of the connector are
disconnected when there is no (U)SIM card inserted. (U)SIM card detection by
low level is applicable to this type of connector. Once (U)SIM hot-plug is
enabled by executing AT+QSIMDET=1,0, a (U)SIM card insertion will drive
USIM_DET from high to low level, and the removal of it will drive USIM_DET
from low to high level.
When the (U)SIM is absent, CD1 is open from CD2 and USIM_DET is at high level.
When the (U)SIM is present, CD1 is pull down to ground and USIM_DET is at low
level.
The following figure shows a reference design for (U)SIM interface with a normally open (NO) (U)SIM card connector.
Module
USIM_VDD
USIM_VDD USIM_RST 22
22
USIM_CLK
USIM_DET USIM_DATA 22
GND
10-20k 10 pF 10pF 10pF
100 nF
(U)SIM Card Connector
TVS array
VCC RST CLK CD1 IO GND
VPP
CD2
4.7k
NOTE: All these resistors, capacitors and TVS should be close to (U)SIM card
connector in PCB layout.
Figure 16: Reference Circuit for Normally Open (U)SIM Card Connector
4.1.5. (U)SIM Card Connector Without Hot-Plug
If (U)SIM card hot-plug is not needed, please keep USIM_DET unconnected. A
reference circuit for (U)SIM card interface with a 6-pin (U)SIM card connector
is illustrated by the following figure.
Module
USIM_VDD
USIM_VDD
22
USIM_RST
22
USIM_CLK
USIM_DET
22
USIM_DATA
GND
10-20k 10 pF 10 pF 10 pF
(U)SIM Card
100 nF
Connector
VCC RST CLK
VPP
TVS array
IO GND
NOTE: All these resistors, capacitors and TVS should be close to (U)SIM card connector in PCB layout.
Figure 17: Reference Circuit for a 6-Pin (U)SIM Card Connector
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5G Module Series
4.1.6. (U)SIM2 Card Compatible Design
It should be noted that when the (U)SIM2 interface is used for an external
(U)SIM card, the circuits are the same as those of (U)SIM1 interface. When the
(U)SIM2 interface is used for the optional internal eSIM card, pins 40, 42,
44, 46 and 48 of the modules must be kept open.
A recommended compatible design for the (U)SIM2 interface is shown below.
Module
USIM2_VDD
(U)SIM Card
USIM2_VDD 48 0
10-20K
100 nF
Connector
VCC
VPP
USIM2_RST 46 0 22
RST
USIM2_CLK 44 0 22
CLK
USIM2_DET 40 0
CD
USIM2_DATA 42 0 22
IO
eSIM
GND
10pF 10pF 10pF
TVS array GND
NOTE:
The five 0 resistors must be placed close to the module, and all other
components should be placed close to (U)SIM card connector in PCB layout.
Figure 18: Recommended Compatible Design for (U)SIM2 Interface
4.1.7. (U)SIM Design Notices
To enhance the reliability and availability of the (U)SIM card in
applications, please follow the criteria below in (U)SIM circuit design.
Place the (U)SIM card connector as close to the module as possible, (U)SIM
card related resistance and capacitance and ESD protection devices should be
placed close to the card connector. Keep the trace length less than 200 mm.
Keep (U)SIM card signals away from RF and VCC traces. Ensure the ground
between the module and the (U)SIM card connector is short and wide. Keep the
trace width of ground and USIM_VDD no less than 0.5 mm to maintain the same
electric potential. To avoid cross-talk between USIM_DATA and USIM_CLK, keep
them away from each other and
shield them with surrounded ground. To offer better ESD protection, add a TVS
array of which the parasitic capacitance should be not
higher than 10 pF. Add 22 resistors in series between the module and the
(U)SIM card connector to suppress EMI spurious transmission. The 10 pF
capacitors are used to filter out RF interference. For USIM_DATA, a 1020 k
pull-up resistor must be added near the (U)SIM card connector.
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5G Module Series
4.2. USB Interface
The module provides one integrated Universal Serial Bus (USB) interface which
complies with the USB 3.1 Gen2 and USB 2.0 specifications and supports
SuperSpeed (10 Gbps) on USB 3.1 and high-speed (480 Mbps) and full-speed (12
Mbps) modes on USB 2.0. The USB interface is used for AT command
communication, data transmission, GNSS NMEA sentence output, software
debugging, firmware upgrade (USB 2.0 only) and voice over USB*.
Please note that only USB 2.0 can be used for firmware upgrade currently.
Table 15: Pin Definition of USB Interface
Pin No. Pin Name
I/O
7
USB_DP
AIO
9
USB_DM
AIO
29
USB_SS_TX_M AO
31
USB_SS_TX_P AO
35
USB_SS_RX_M AI
37
USB_SS_RX_P AI
Description
Comment
USB differential data (+)
USB differential data (-)
USB 3.1 super-speed transmit (-) USB 3.1 super-speed transmit (+)
Require differential impedance of 90
USB 3.1 super-speed receive (-)
USB 3.1 super-speed receive (+)
For more details about the USB 3.1 Gen2 and 2.0 specifications, please visit
http://www.usb.org/home.
The USB 2.0 interface is recommended to be reserved for firmware upgrade in
designs. The following figure shows a reference circuit of USB interface.
Host
USB_SS_TX_P USB_SS_TX_M USB_SS_RX_P USB_SS_RX_M
USB_DM USB_DP
C3 220 nF C4 220 nF
USB_SS_RX_P 37 USB_SS_RX_M 35 USB_SS_TX_P 31 USB_SS_TX_M 29 R1 0 USB_DM 9 R2 0 USB_DP 7
Module
C1 220 nF C2 220 nF BB
Test Points
R3 NM-0 R4 NM-0
ESD Minimize these stubs in PCB layout.
Figure 19: Reference Circuit of USB 3.1 & 2.0 Interfaces
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5G Module Series
AC coupling capacitors C3 and C4 must be placed close to the host and close to
each other. C1 and C2 have been integrated inside the module, so do not place
these two capacitors on your schematic and PCB. To ensure the signal integrity
of USB 2.0 data traces, R1, R2, R3 and R4 must be placed close to the module,
and the stubs must be minimized in PCB layout.
You should follow the principles below when designing for the USB interface to
meet USB specifications.
Route the USB signal traces as differential pairs with ground surrounded. The
impedance of differential trace of USB 2.0 and USB 3.1 are 90 .
For USB 2.0 signal traces, the trace length should be less than 225 mm and the
intra-pair length matching (P/M) should be less than 2 mm. For USB 3.1, the
intra-pair length matching (P/M) should be less than 0.7 mm, while the inter-
pair length matching (Tx/Rx) should be less than 10 mm.
Do not route signal traces under crystals, oscillators, magnetic devices, PCIe
and RF signal traces. Route the USB differential traces in inner-layer of the
PCB, and surround the traces with ground on the same layer and with ground
planes above and below.
Junction capacitance of the ESD protection device might cause influences on
USB data traces, so you should pay attention to the selection of the device.
Typically, the stray capacitance should be less than 1.0 pF for USB 2.0, and
less than 0.15 pF for USB 3.1.
Keep the ESD protection devices as close to the USB connector as possible. If
possible, reserve 0 resistors on USB_DP and USB_DM traces respectively.
Table 16: USB Trace Length Inside the Module
Signal USB_DP USB_DM USB_SS_RX_P USB_SS_RX_M USB_SS_TX_P USB_SS_TX_M
Pin No. 7 9 37 35 31 29
Length (mm) 19.44 19.42 11.97 11.83 8.33 8.05
Length Difference (mm) 0.02 0.14 0.28
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5G Module Series
4.3. PCIe Interface
The module provides one integrated PCIe (Peripheral Component Interconnect
Express) interface. PCI Express Base Specification Revision 4.0 compliant Data
rate up to 16 Gbps
4.3.1. PCIe Operating Mode
The module supports endpoint (EP) mode and root complex (RC) mode, and EP mode
is the default. In EP mode, the module operates as a PCIe EP device, while in
RC mode, as a PCIe root complex device.
AT+QCFG=”pcie/mode” is used to set PCIe RC/EP mode.
AT+QCFG=”pcie/mode” Set PCIe RC/EP Mode
Write Command AT+QCFG=”pcie/mode”[,
Response If the optional parameter is omitted, query the current setting:
+QCFG: “pcie/mode”,
OK
If the optional parameter is specified, set PCIe RC/EP mode: OK
Maximum Response Time Characteristics
If there is any error: ERROR
300 ms
The command takes effect after the module is restarted. The configuration will
be saved automatically.
Parameter
Integer type. Set PCIe RC or EP mode. 0 PCIe EP mode. 1 PCIe RC mode.
NOTE
1. The underlined value is the default. 2. For more details about the
command, see document [4].
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5G Module Series
4.3.2. Pin Definition of PCIe
The following table shows the pin definition of PCIe interface.
Table 17: Pin Definition of PCIe Interface
Pin No. Pin Name
I/O
55
PCIE_REFCLK_P AIO
53
PCIE_REFCLK_M AIO
49
PCIE_RX_P
AI
47
PCIE_RX_M
AI
43
PCIE_TX_P
AO
41
PCIE_TX_M
AO
50
PCIE_RST_N
DI 11
52
PCIE_CLKREQ_N OD 11
54
PCIE_WAKE_N
OD 11
Description
PCIe reference clock (+)
PCIe reference clock (-)
PCIe receive (+)
PCIe receive (-)
PCIe transmit (+)
PCIe transmit (-) PCIe reset Active LOW PCIe clock request Active LOW PCIe
wake up Active LOW
Comment 100 MHz. Require differential impedance of 85
Require differential impedance of 85
Require differential impedance of 85
1.8/3.3 V
1.8/3.3 V
1.8/3.3 V
11 PCIE_RST_N behaves as DI in PCIe EP mode, and as OD in PCIe RC mode. PCIE_CLKREQ_N and PCIE_WAKE_N behave as OD in PCIe EP mode, and as DI in PCIe RC mode. PCIe EP mode is the default.
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5G Module Series
4.3.3. Reference Design for PCIe
The following figure shows a reference circuit for the PCIe interface.
Host
PCIE_REFCLK_P R4 PCIE_REFCLK_M R5
PCIE_TX_P PCIE_TX_M PCIE_RX_P PCIE_RX_M
0 0 C3 220 nF C4 220 nF
VCC_IO_HOST
PCIE_REFCLK_P 55
PCIE_REFCLK_M 53
PCIE_RX_P
49
PCIE_RX_M
47
PCIE_TX_P
43
PCIE_TX_M
41
Module
C1 C2
BB
PCIE_WAKE_N PCIE_CLKREQ_N PCIE_RST_N
R1
R2
R3
10k
10k
4.7k
PCIE_WAKE_N
54
PCIE_CLKREQ_N 52
PCIE_RST_N
50
R6 NM_10k
NOTE: The voltage level VCC_IO_HOST of these three signals depend on the host
side due to open drain.
Figure 20: PCIe Interface Reference Circuit
To ensure the signal integrity of PCIe interface, AC coupling capacitors C3
and C4 should be placed close to the host on PCB. C1 and C2 have been
integrated inside the module, so do not place these two capacitors on your
schematic and PCB.
The following principles of PCIe interface design should be complied with to
meet PCIe specification.
Keep the PCIe data and control signals away from sensitive circuits and
signals, such as RF, audio, crystal, and oscillator signals.
Add a capacitor in series on Tx/Rx traces to prevent any DC bias. Keep the
maximum trace length less than 200 mm. Keep the intra-pair length matching of
each differential data pair (P/M) less than 0.7 mm. Keep the differential
impedance of PCIe data trace as 85 ±10 %. You must not route PCIe data traces
under components or cross them with other traces. It is recommended to use a
push-pull GPIO to output a low level that approaches 0 V rather than a
pull-down resistor to get a low level. Otherwise, voltage division may be
formed with the pull-up resistor inside the module, resulting in an uncertain
0 V voltage that could further lead to unpredictable problems.
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Table 18: PCIe Trace Length Inside the Module
Signal PCIE_REFCLK_P PCIE_REFCLK_M PCIE_TX_P PCIE_TX_M PCIE_RX_P PCIE_RX_M
Pin No. 55 53 43 41 49 47
Length (mm) 12.06 12.03 5.10 4.95 12.02 11.98
5G Module Series
Length Difference (mm) 0.03 0.15 0.04
4.4. Control and Indication Interfaces
The following table shows the pin definition of control and indication pins.
Table 19: Pin Definition of Control and Indication Interfaces
Pin No. Pin Name
I/O
Description
DC Characteristics Comment
Airplane mode control
8
W_DISABLE1# DI, PU
1.8/3.3 V
Active LOW
GNSS control
26
W_DISABLE2#* DI, PU
Active LOW
1.8/3.3 V
RF status LED indicator
10
LED_WWAN# OD
VCC
Active LOW
WAKEON
Wake up the host
23
OD
WAN#
Active LOW
1.8/3.3 V
25
DPR*
Dynamic power DI, PU
reduction
1.8 V
Internally pulled up to 1.8 V with a 100 k resistor.
4.4.1. W_DISABLE1#
The module provides a W_DISABLE1# pin to disable or enable airplane mode
through hardware operation. W_DISABLE1# is pulled up by default. Driving it
LOW will set the module to airplane mode. In airplane mode, the RF function
will be disabled.
The RF function can also be enabled or disabled through AT commands. The
following table shows the
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AT command and corresponding RF function status of the module.
5G Module Series
Table 20: RF Function Status
W_DISABLE1# Logic Level
AT Command AT+CFUN=1
HIGH
AT+CFUN=0
LOW
AT+CFUN=4
AT+CFUN=0 AT+CFUN=1 AT+CFUN=4
RF Function Status Enabled Disabled
Operating Mode Full functionality mode Minimum functionality mode Airplane mode
Disabled
Airplane mode
4.4.2. W_DISABLE2#*
The module provides a W_DISABLE2# pin to disable or enable the GNSS function.
The W_DISABLE2# pin is pulled up by default. Driving it LOW will disable the
GNSS function. The combination of W_DISABLE2# pin and AT commands can control
the GNSS function. For details about the AT commands, see document [5]
Table 21: GNSS Function Status
W_DISABLE2# Logic Level HIGH HIGH LOW LOW
AT Commands AT+QGPS=1 AT+QGPSEND AT+QGPS=1 AT+QGPSEND
GNSS Function Status Enabled Disabled
Disabled
A simple voltage level shifter based on diodes is used on W_DISABLE1# pin and W_DISABLE2# which are pulled up to a 1.8 V voltage in the module, as shown in the following figure. Therefore, the control signals (GPIO) of the host device could be at 1.8 V or 3.3 V voltage level. W_DISABLE1# and W_DISABLE2# are active LOW signals, and a reference circuit is shown as below.
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Host
VCC_IO_HOST
GPIO GPIO
R3 R4 10k 10k
5G Module Series
Module
VDD 1.8V
W_DISABLE2# 26 W_DISABLE1# 8
R1 R2 100k 100k
BB
NOTE: The voltage level of VCC_IO_HOST could be 1.8 V or 3.3 V typically.
Figure 21: W_DISABLE1# and W_DISABLE2# Reference Circuit
4.4.3. LED_WWAN#
LED_WWAN# is used to indicate the RF status of the module, and its sink
current is up to 10 mA.
To reduce current consumption of the LED, a current-limited resistor must be
placed in series with the LED, as illustrated in the figure below. The LED is
ON when the LED_WWAN# signal is at low level.
VCC (Typ. 3.7V)
R1 330
Module
VCC
2, 4 70,72,74
LED1
LED_WWAN # 10
PMU
Figure 22: LED_WWAN# Reference Circuit
Table 22: Network Status Indications of LED_WWAN#
LED_WWAN# Logic Level LOW (LED on)
HIGH (LED off)
Description
RF function is turned on
RF function is turned off if any of the following occurs: The (U)SIM card is
not powered. W_DISABLE1# is at low level (airplane mode enabled). AT+CFUN=4
(RF function disabled).
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5G Module Series
4.4.4. WAKE_ON_WAN#
The WAKE_ON_WAN# is an open drain pin, which requires a pull-up resistor on
the host. When a URC returns, a one-second low level pulse signal will be
outputted to wake up the host.
Table 23: State of the WAKE_ON_WAN# WAKE_ON_WAN# State Outputs a one-second pulse signal at low level Always at high level
Module Operation Status Call/SMS/data is incoming (to wake up the host) Idle/sleep
Host
Module
VCC_IO_HOST
R1 10k
GPIO
WAKE_ON_WAN# 23
BB
H
1 s
L
Wake up the host
NOTE: The voltage level on VCC_IO_HOST depends on the host side due to the open drain in pin 23.
Figure 23: WAKE_ON_WAN# Signal Reference Circuit
4.4.5. DPR*
The module provides the DPR (Dynamic Power Reduction) pin for body SAR
(Specific Absorption Rate) detection. The signal is sent from the proximity
sensor of the host system to the module to provide an input trigger, which
will reduce the output power in radio transmission.
Table 24: Function of the DPR Signal
DPR Level HIGH/Floating LOW
Function NO maximum transmitting power backoff Maximum transmitting power backoff by AT+QSAR
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NOTE See document [4] for more details about AT+QSAR.
5G Module Series
4.5. Cellular/WLAN COEX Interface*
The module provides the cellular/WLAN COEX interface, the following table
shows the pin definition of this interface.
Table 25: Pin Definition of COEX Interface
Pin No. Pin Name
60
N79_TX_EN
38
WLAN_TX_EN
62
COEX_RXD 12
64
COEX_TXD 12
I/O
Description
DC Characteristics
DO DI DI, PD DO, PD
Notification from SDR to WLAN when n79 transmitting Notification from WLAN to SDR when WLAN transmitting 5G/LTE and WLAN coexistence receive 5G/LTE and WLAN coexistence transmit
1.8 V 1.8 V 1.8 V 1.8 V
4.6. Antenna Tuner Control Interface
RFFE interface are used for antenna tuner control and should be routed to an
appropriate antenna control circuit. More details about the interface will be
added in the future version of this document.
Table 26: Pin Definition of Antenna Tuner Control Interface
Pin No. 56 58
Pin Name RFFE_CLK RFFE_DATA
I/O DO, PD DIO, PD
Description
Used for external MIPI IC control
DC Characteristics 1.8 V 1.8 V
12 Please note that COEX_RXD and COEX_TXD cannot be used as general UART
ports.
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24
VDDIO_1V8
PO
Provide 1.8 V for external circuit
5G Module Series
1.8 V Max. output current: 50 mA
NOTE If RFFE function is required, please contact Quectel for more details.
4.7. Configuration Pins
The module provides four configuration pins, which are defined as below.
Table 27: Configuration Pins List of M.2 Specification
CONFIG_0 (Pin 21)
NC
CONFIG_1 CONFIG_2 (Pin 69) (Pin 75)
GND
NC
CONFIG_3 (Pin 1)
NC
Module Type and Main Host Interface
Quectel defined
Port Configuration
2
Table 28: Configuration Pins of the Module
Pin No.
Pin Name
I/O
21
CONFIG_0
DO
69
CONFIG_1
DO
75
CONFIG_2
DO
1
CONFIG_3
DO
Description Not connected internally Connected to GND internally Not connected internally Not connected internally
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5G Module Series
The following figure shows a reference circuit of these four pins.
Host
VCC_IO_HOST
GPIO GPIO GPIO GPIO
R1 R2 R3 R4 10k 10k 10k 10k
Module
CONFIG_0 21 CONFIG_1 69 CONFIG_2 75 CONFIG_3 1
NM-0 0
NM-0 NM-0
NOTE: The voltage level of VCC_IO_HOST depends on the host side and could be 1.8 V or 3.3 V. Figure 24: Recommended Circuit for Configuration Pins
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5G Module Series
5 RF Characteristics
This chapter mainly describes RF characteristics of the module.
5.1. Antenna Interfaces
5.1.1. Pin Definition
The pin definition of antenna interfaces is shown below.
Table 29: RM520N-GL Pin Definition of Antenna Interfaces
Pin Name I/O Description
ANT0 ANT1 ANT2
Antenna 0 interface: 5G NR: – Refarmed: LB TX0 /PRX & MHB TX0 /PRX &
UHB TX1/DRX AIO
– n41 TX0/PRX – n77/n78/n79 TX1/DRX LTE: LB TX0/PRX & MHB TX0/PRX & UHB
TX1/DRX WCDMA: LMB TRX
Antenna 1 interface: 5G NR: – Refarmed: MHB PRX MIMO & UHB PRX MIMO AIO – n41
PRX MIMO – n77/n78/n79 PRX MIMO LTE: MHB PRX MIMO & UHB PRX MIMO & LAA PRX
GNSS: L5
Antenna 2 interface: 5G NR: AIO – Refarmed: MHB TX1 13/ DRX MIMO & UHB
TX0/PRX – n41 TX1/DRX MIMO
Comment
LB: 617960 MHz MHB: 14522690 MHz UHB: 34003800 MHz n77/n78: 33004200 MHz
n79: 44005000 MHz LAA: 5150-5925 MHz
13 MHB TX1 will be active when supporting Sub 2.6 GHz EN-DC.
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ANT3
– n77/n78/n79 TX0/PRX LTE: MHB TX1 13/DRX MIMO & UHB TX0/PRX
Antenna 3 interface: 5G NR: – Refarmed: LB TX1 / DRX & MHB DRX & UHB DRX
MIMO AIO – n41 DRX
– n77/n78/n79 DRX MIMO LTE: LB TX1/DRX & MHB DRX & UHB DRX MIMO & LAA DRX
WCDMA: LMB DRX GNSS: L1
5G Module Series
5.1.2. Cellular Network
5.1.2.1. Rx Sensitivity
Table 30: RM520N-GL Conducted Receiving Sensitivity (Unit: dBm)
Mode Frequency
WCDMA B1
WCDMA B2
WCDMA B4 WCDMA
WCDMA B5
WCDMA B8
WCDMA B19
LTE-FDD B1 (10 MHz)
LTE-FDD B2 (10 MHz)
LTE
LTE-FDD B3 (10 MHz)
LTE-FDD B4 (10 MHz)
LTE-FDD B5 (10 MHz)
Primary -109.1 -109.5 -110.0 -111.4 -112.0 -112.4 -97.3 -97.8 -97.6 -98.2 -100.3
Diversity SIMO 14 3GPP (SIMO)
-110
-112
-106.7
-109.8 -112.5 -104.7
-109.8 -113
-106.7
-113.4 -114
-104.7
-113.8 -115
-103.7
-113.4 -115.5 -104.7
-97.8
-101.7 -96.3
-97.7
-101.8 -94.3
-97.3
-102.2 -93.3
-97.8
-102.1 -96.3
-101.7 -103.6 -94.3
14 SIMO is a smart antenna technology that uses a single antenna at the transmitter side and two antennas at the receiver side, which improves Rx performance.
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5G Module Series
5G NR
LTE-FDD B7 (10 MHz) LTE-FDD B8 (10 MHz) LTE-FDD B12(B17) (10 MHz) LTE-FDD B13 (10 MHz) LTE-FDD B14 (10 MHz) LTE-FDD B18 (10 MHz) LTE-FDD B19 (10 MHz) LTE- FDD B20 (10 MHz) LTE-FDD B25 (10 MHz) LTE-FDD B26 (10 MHz) LTE-FDD B28 (10 MHz) LTE-FDD B29 (10 MHz) LTE-FDD B30 (10 MHz) LTE-FDD B32 (10 MHz) LTE-TDD B34 (10 MHz) LTE-TDD B38 (10 MHz) LTE-TDD B39 (10 MHz) LTE-TDD B40 (10 MHz) LTE-TDD B41 (10 MHz) LTE-TDD B42 (10 MHz) LTE-TDD B43 (10 MHz) LTE-TDD B46 (10 MHz) LTE-TDD B48 (10 MHz) LTE-FDD B66 (10 MHz) LTE-FDD B71 (10 MHz) 5G NR-FDD n1 (20 MHz) 5G NR-FDD n2 (20 MHz)
-97.1 -99.7 -100.8 -98.7 -99.5 -100.3 -100.3 -100.5 -97.7 -100.3 -99.7 -98.2 -97.3 -97.3 -97.8 -95.7 -98.7 -96.9 -95.7 -96.8 -97.1 -96.2 -96.9 -98.0 -99.9 -94.3 -94.3
-97.2 -101.8 -102.1 -100.8 -99.4 -101.6 -99.7 -102.2 -97.5 -101.8 -99.9 -99.5 -97.4 -98.4 -98.1 -96.6 -98.1 -96.7 -96.5 -97.7 -97.5 -96.5 -97.6 -97.7 -100.7 -95.1 -94.7
-101.1 -102.5 -104.5 -102.4 -102.5 -103.8 -103.3 -104.4 -100.5 -104.1 -102.8 -101.5 -101.2 -100.1 -101.0 -99.6 -100.6 -101.3 -100.3 -101.5 -102.6 -99.3 -101.9 -101.4 -102.0 -97.5 -97.3
-94.3 -93.3 -93.3 -93.3 -93.3 -96.3 -96.3 -93.3 -92.8 -93.8 -94.8 TBD -95.3 -95.3 -96.3 -96.3 -96.3 -96.3 -94.3 -95 -95 TBD -95 -96.5 -94.2 -94.0 -92.0
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5G NR-FDD n3 (20 MHz) 5G NR-FDD n5 (20 MHz) 5G NR-FDD n7 (20 MHz) 5G NR-FDD n8 (20 MHz) 5G NR-FDD n12 (15 MHz) 5G NR-FDD n13 (10MHz) 5G NR-FDD n14 (10 MHz) 5G NR-FDD n18 (15 MHz) 5G NR-FDD n20 (20 MHz) 5G NR-FDD n25 (20 MHz) 5G NR-FDD n26 (20 MHz) 5G NR-FDD n28 (20 MHz) 5G NR-FDD n29 (10 MHz) 5G NR-FDD n30 (10 MHz) 5G NR-TDD n38 (20 MHz) 5G NR-TDD n40 (20 MHz) 5G NR-TDD n41 (100 MHz) 5G NR-FDD n48 (20 MHz) 5G NR-FDD n66 (40 MHz) 5G NR-FDD n70 (20 MHz) 5G NR-FDD n71 (20 MHz) 5G NR-FDD n75 (20 MHz) 5G NR-FDD n76 (5 MHz) 5G NR-TDD n77 (100 MHz) 5G NR-TDD n78 (100 MHz) 5G NR-TDD n79 (100 MHz)
-94.5 -95.5 -94.5 -96.2 -96.7 -97.6 -98.7 -98.0 -96.9 -94.6 -95.0 -96 TBD -95.4 -93.4 -93.8 -85.8 -96.6 -92.3 -94.5 -96.5 TBD TBD -87.4 -87.7 -87.2
5G Module Series
-94.2 -97.6 -94.2 -97.7 -99.4 -99.0 -98.4 -99.0 -98.9 -95.3 -97.7 -95.9 TBD -97.0 -94.0 -94.8 -86.8 -96.6 -93.0 -95.1 -96.0 TBD TBD -88.6 -88.9 -88.1
-97.2 -100.0 -96.2 -99.2 -100.7 -101.0 -101.4 -101.5 -100.6 -99.1 -100.1 -98.3 TBD -98.8 -96.7 -97.3 -91.3 -99.5 -94.3 -97.7 -99.1 TBD TBD -92.0 -92.1 -92.5
-91.0 -91 -92.0 -90.0 -84.0 -93.8 -93.8 -95.0 -90.0 -90.5 -87.6 -91.0 TBD -95.8 -94.0 -94.0 -84.7 -93.0 -90.1 -93.8 -86.0 TBD TBD -85.1 -85.6 -85.6
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5G Module Series
5.1.2.2. Tx Power The following table shows the RF output power of the module.
Table 31: Cellular Output Power
Mode
Frequency
WCDMA WCDMA bands
LTE 5G NR
LTE bands
LTE HPUE bands (B38/B41/B42/B43)
5G NR bands
5G NR HPUE bands (n38/n40/n41/n77/n78/n79)
Max. 24 dBm +1/-3 dB (Class 3) 23 dBm ±2 dB (Class 3) 26 dBm ±2 dB (Class 2) 23 dBm ±2 dB (Class 3) 26 dBm +2/-3 dB (Class 2)
Min. < -50 dBm < -40 dBm < -40 dBm < -40 dBm 15 < -40 dBm 15
5.1.3. GNSS
The module includes a fully integrated global navigation satellite system
solution (GPS, GLONASS, BDS, Galileo and QZSS).
The module supports standard NMEA 0183 protocol, and outputs NMEA sentences at
1 Hz data update rate via USB interface by default.
The GNSS engine is switched off by default. It has to be switched on via AT
command.
5.1.3.1. GNSS Frequency
Table 32: GNSS Frequency
Bands L1
Type GPS/Galileo/QZSS Galileo QZSS
Frequency 1575.42 ±1.023 (L1) 1575.42 ±2.046 (E1) 1575.42 (L1)
Unit MHz MHz MHz
15 For 5G NR TDD bands, the normative reference for this requirement is TS 38.101-1 clause 6.3.1.
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5G Module Series
GLONASS
1597.51605.8
MHz
BDS
1561.098 ±2.046
MHz
L5
GPS/Galileo/QZSS
1176.45 ±10.23 (GPS L5)
MHz
5.1.3.2. GNSS Performance The following table shows GNSS performance of the module.
Table 33: GNSS Performance
Parameter Sensitivity
Description Acquisition Reacquisition Tracking
Cold start @ open sky
TTFF
Warm start @ open sky
Accuracy
Hot start @ open sky
CEP-50
Conditions Autonomous Autonomous Autonomous Autonomous XTRA enabled Autonomous XTRA enabled Autonomous XTRA enabled Autonomous @ open sky
Typ. -147 -160 -160 27.93 19.25 11.55 0.94 1.09 0.79 1.35
Unit dBm dBm dBm s s s s s s m
NOTE
1. Acquisition sensitivity: the minimum GNSS signal power at which the module
can fix position successfully within 3 minutes after executing cold start
command.
2. Reacquisition sensitivity: the minimum GNSS signal power required for the
module to maintain lock within 3 minutes after loss of lock.
3. Tracking sensitivity: the minimum GNSS signal power at which the module
can maintain lock (keep positioning for at least 3 minutes continuously).
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5G Module Series
5.2. Antenna Connectors
5.2.1. Antenna Connector Specifications
The module is mounted with standard 2 mm × 2 mm receptacle antenna connectors
for convenient antenna connection. The antenna connector’s PN is IPEX
20579-001E, and the connector dimensions are illustrated as below:
Figure 25: Dimensions of the Receptacle (Unit: mm)
Table 34: Major Specifications of the RF Connector
Item Nominal Frequency Range Nominal Impedance Temperature Rating
Voltage Standing Wave Ratio (VSWR)
Specification
DC to 6 GHz
50
-40 °C to +85 °C Meet the requirements of: Max 1.3 (DC3 GHz) Max 1.4 (36 GHz)
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5G Module Series
5.2.2. Antenna Connector Location
The module has four antenna connectors: ANT0, ANT1, ANT2, and ANT3, which are
shown below.
ANT0 ANT1 ANT2 ANT3 Figure 26: RM520N-GL Antenna Connectors
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5G Module Series
5.2.3. Antenna Connector Installation
The receptacle RF connector used in conjunction with the module will accept
two types of mating plugs that will meet a maximum height of 1.2 mm using a Ø
0.81 mm coaxial cable or a maximum height of 1.45 mm utilizing a Ø 1.13 mm
coaxial cable.
The following figure shows the specifications of mating plugs using Ø 0.81 mm
coaxial cables.
Figure 27: Dimensions of Mated Plugs (Ø0.81/Ø1.13 mm Coaxial Cables) (Unit:
mm)
The following figure illustrates the connection between the receptacle RF
connector on the module and the mating plug using a Ø 0.81 mm coaxial cable.
Figure 28: Space Factor of Mated Connectors (Ø 0.81 mm Coaxial Cables) (Unit: mm)
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5G Module Series The following figure illustrates the connection between the
receptacle RF connector on the module and the mating plug using a Ø 1.13 mm
coaxial cable.
Figure 29: Space Factor of Mated Connectors (Ø 1.13 mm Coaxial Cables) (Unit:
mm)
5.2.4. Recommended RF Connector Installation
5.2.4.1. Assemble Coaxial Cable Plug Manually The illustration for plugging in
a coaxial cable plug is shown below, = 90° is acceptable, while 90° is not.
Figure 30: Plug in a Coaxial Cable Plug RM520N-GL_Hardware_Design
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5G Module Series The illustration of pulling out the coaxial cable plug is
shown below, = 90° is acceptable, while 90° is not.
Figure 31: Pull out a Coaxial Cable Plug 5.2.4.2. Assemble Coaxial Cable Plug
with Jig The pictures of installing the coaxial cable plug with a jig is shown
below, = 90° is acceptable, while 90° is not.
Figure 32: Install the Coaxial Cable Plug with Jig RM520N-GL_Hardware_Design
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5G Module Series
5.2.5. Recommended Manufacturers of RF Connector and Cable
RF connectors and cables by I-PEX are recommended. For more details, visit
https://www.i-pex.com.
5.3. Antenna Requirements
The following table shows the requirements on WCDMA, LTE, 5G NR antenna and
GNSS antennas.
Table 35: Antenna Requirements
Type WCDMA/LTE/5G NR GNSS
Requirements
VSWR: 3 Efficiency: > 30 % Input Impedance: 50 Cable insertion loss:
– < 1 dB: LB (<1 GHz) – < 1.5 dB: MB (12.3 GHz) – < 2 dB: HB (> 2.3 GHz)
Frequency range: L1: 15591609 MHz L5: 11661187 MHz Polarization: RHCP or
linear VSWR: < 2 (Typ.) Passive antenna gain: > 0 dBi
NOTE
It is recommended to use a passive GNSS antenna when LTE B13 or B14 is
supported, as the use of active antenna may generate harmonics which will
affect the GNSS performance.
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5G Module Series
6 Electrical Characteristics and
Reliability
6.1. Power Supply Requirements
The typical input voltage of the module is 3.7 V, the following table shows
the power supply requirements of the module.
Table 36: Power Supply Requirements
Parameter
Description
VCC
Power Supply
Voltage Ripple
Min. 3.135 –
Typ. 3.7 30
Max.
Unit
4.4
V
100
mV
6.2. Power Consumption
Table 37: Averaged Current Consumption
Mode
Condition
Band/Combination
Typ.
Unit
Power-off
Power off
–
195
A
RF Disabled Sleep State
AT+CFUN=0 (USB 3.1 suspend) –
AT+CFUN=4 (USB 3.1 suspend) SA FDD PF = 64 (USB 3.1
suspend) SA TDD PF = 64 (USB 3.1
suspend)
4.6
mA
4.7
mA
9.7
mA
9.4
mA
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Idle State
LTE
LTE CA
5G SA (1 Tx) 5G SA (2 Tx)
LTE + 5G EN-DC
SA PF = 64 (USB 2.0 active) SA PF = 64 (USB 3.1 active) LTE LB @ 24 dBm LTE MB @ 24 dBm LTE HB @ 24 dBm DL 3CA, 256QAM UL 1CA, 256QAM Tx power @ 24 dBm 5G NR LB @ 23 dBm 5G NR MB @ 23 dBm 5G NR HB @ 23 dBm 5G NR UHB @ 26 dBm 5G NR UL 2 × 2 MIMO @ 26 dBm LTE DL, 256QAM LTE UL QPSK NR DL, 256QAM NR UL QPSK LTE Tx Power @ 23 dBm NR Tx Power @ 23 dBm
B5 B1 B7
CA_1A-3A-7A
n5 n1 n7 n78 n78
DC_3A_n78A
5G Module Series
51.0
mA
69.4
mA
520
mA
1080
mA
970
mA
1512
mA
460
mA
970
mA
740
mA
480
mA
490
mA
1168
mA
NOTE
1. The power consumption test is performed with EVB at room temperature
without any thermal dissipation measure.
2. The power consumption above is for reference only, please contact Quectel
Technical Support for a detailed power consumption test report of the module.
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6.3. Digital I/O Characteristic
5G Module Series
Table 38: Logic Levels of 1.8 V Digital I/O
Parameter VDDIO_1V8 VIH VIL VOH VOL
Description
Min.
Max.
Unit
Supply voltage Input high voltage Input low voltage
1.7
1.94
V
0.65 × VDDIO_1V8 VDDIO_1V8 + 0.3
V
-0.3
0.35 × VDDIO_1V8 V
Output high voltage VDDIO_1V8 – 0.45
–
V
Output low voltage
–
0.45
V
Table 39: Logic Levels of 3.3 V Digital I/O
Parameter 3.3 V VIH VIL
Description Supply voltage Input high voltage Input low voltage
Min. 3.135 2.0 -0.5
Max.
Unit
3.465
V
3.6
V
0.8
V
Table 40: (U)SIM 1.8 V I/O Requirements
Parameter USIM_VDD VIH VIL VOH VOL
Description Power supply Input high voltage Input low voltage Output high voltage Output low voltage
Min.
Max.
Unit
1.65
1.95
V
0.7 × USIM_VDD USIM_VDD + 0.3
V
-0.3
0.2 × USIM_VDD
V
0.8 × USIM_VDD –
V
–
0.4
V
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5G Module Series
Table 41: (U)SIM 3.0 V I/O Requirements
Parameter USIM_VDD VIH VIL VOH VOL
Description Power supply Input high voltage Input low voltage Output high voltage Output low voltage
Min.
Max.
Unit
2.7
3.05
V
0.7 × USIM_VDD USIM_VDD + 0.3
V
-0.3
0.2 × USIM_VDD
V
0.8 × USIM_VDD –
V
–
0.4
V
6.4. ESD Protection
Static electricity occurs naturally and it may damage the module. Therefore,
applying proper ESD countermeasures and handling methods is imperative. For
example, wear anti-static gloves during the development, production, assembly
and testing of the module; add ESD protection components to the ESD sensitive
interfaces and points in the product design.
Table 42: Electrostatic Discharge Characteristics (Temperature: 25 ºC, Humidity: 40 %)
Tested Interfaces VCC, GND Antenna Interfaces Other Interfaces
Contact Discharge
Air Discharge
Unit
±5
±10
kV
±4
±8
kV
±0.5
±1
kV
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6.5. Thermal Dissipation
5G Module Series
Figure 33: Thermal Dissipation Area Inside and on Bottom Side of the Module
The module offers the best performance when all internal IC chips are working
within their operating temperatures. When the IC chip reaches or exceeds the
maximum junction temperature, the module may still work but the performance
and function (such as RF output power, data rate, etc.) will be affected to a
certain extent. Therefore, the thermal design should be maximally optimized to
ensure all internal IC chips always work within the recommended operating
temperature range.
The following principles for thermal consideration are provided for reference:
Keep the module away from heat sources on your PCB, especially high-power
components such as processor, power amplifier, and power supply.
Maintain the integrity of the PCB copper layer and drill as many thermal vias
as possible. Expose the copper in the PCB area where module is mounted. Apply
a soft thermal pad with appropriate thickness and high thermal conductivity
between the
module and the PCB to conduct heat. Follow the principles below when the
heatsink is necessary:
– Do not place large size components in the area where the module is mounted
on your PCB to reserve enough place for heatsink installation.
– Attach the heatsink to the shielding cover of the module; In general, the
base plate area of the heatsink should be larger than the module area to cover
the module completely;
– Choose the heatsink with adequate fins to dissipate heat;
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5G Module Series
– Choose a TIM (Thermal Interface Material) with high thermal conductivity,
good softness and good wettability and place it between the heatsink and the
module;
– Fasten the heatsink with four screws to ensure that it is in close contact
with the module to prevent the heatsink from falling off during the drop,
vibration test, or transportation.
Heatsink PCB TIM Thermal pad Module
Screw Heatsink TIM Module
PCB
Thermal pad
Figure 34: Placement and Fixing of the Heatsink
6.6. Absolute Maximum Ratings
Absolute maximum ratings for power supply and voltage on digital and analog
pins of the module are listed in the following table.
Table 43: Absolute Maximum Ratings
Parameter VCC Voltage at Digital Pins
Min. -0.3 -0.3
Typ.
Max.
Unit
–
4.7
V
–
2.3
V
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6.7. Operating and Storage Temperatures
Table 44: Operating and Storage Temperatures
Parameter Operating Temperature Range 16 Extended Temperature Range 17
Min. -30 -40
Storage temperature Range
-40
Typ. +25 –
5G Module Series
Max.
Unit
+75
ºC
+85
ºC
+90
ºC
6.8. Notification
Please follow the principles below in module application.
6.8.1. Coating
If a conformal coating is necessary for the module, do NOT use any coating
material that may chemically react with the PCB or shielding cover, and
prevent the coating material from flowing into the module
6.8.2. Cleaning
Avoid using ultrasonic technology for module cleaning since it can damage
crystals inside the module.
16 To meet this operating temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module meets 3GPP specifications. 17 To meet this extended temperature range, you need to ensure effective thermal dissipation, for example, by adding passive or active heatsinks, heat pipes, vapor chambers, etc. Within this range, the module remains the ability to establish and maintain functions such as voice, SMS, emergency call, etc., without any unrecoverable malfunction. Radio spectrum and radio network are not influenced, while one or more specifications, such as Pout, may undergo a reduction in value, exceeding the specified tolerances of 3GPP. When the temperature returns to the normal operating temperature level, the module will meet 3GPP specifications again.
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5G Module Series
7 Mechanical Dimensions and
Packaging
This chapter mainly describes mechanical dimensions and packaging
specifications of RM520N-GL. All dimensions are measured in mm, and the
dimensional tolerances are ±0.15 mm unless otherwise specified.
7.1. Mechanical Dimensions
Figure 35: Mechanical Dimensions of the Module (Unit: mm)
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7.2. Top and Bottom Views
5G Module Series
Top View
Bottom View
Figure 36: RM520N-GL Top and Bottom Views
NOTE
Images above are for illustration purpose only and may differ from the actual
module. For authentic appearance and label, please refer to the module
received from Quectel.
7.3. M.2 Connector
The module adopts a standard PCI Express M.2 connector which compiles with the
directives and standards listed in the PCI Express M.2 specification.
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5G Module Series
7.4. Packaging
This chapter describes only the key parameters and process of packaging. All
figures below are for reference only. The appearance and structure of the
packaging materials are subject to the actual delivery The module adopts
blister tray packaging and details are as follow:
7.4.1. Blister Tray
Dimension details are as follow:
Figure 37: Blister Tray Dimension Drawing RM520N-GL_Hardware_Design
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7.4.2. Packaging Process
5G Module Series
Pack 10 modules in each blister tray. Stack 10 blister Pack 11 blister trays together and then put these
trays with modules together, and put 1 empty blister blister trays into a conductive bag, seal and pack
tray on the top.
the conductive bag.
Put seal-packed blister trays into a mini box. One Put 4 mini boxes into 1 carton and then seal it.
mini box contains 100 modules.
One carton can pack 400 modules.
Figure 38: Packaging Process
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5G Module Series
8 Appendix A References
Table 45: Related Documents
Document Name [1] Quectel_RM520N-GL_Reference_Design [2] Quectel_RM520N-GL_CA
&EN-DC_Features [3] Quectel_5G-M2_EVB_User_Guide [4]
Quectel_RG520N&RG525F&RG5x0F&RM5x0N_Series_AT_Commands_Manual [5]
Quectel_RG520N&RG525F&RG5x0F&RM5x0N_Series_GNSS_Application_Note
Table 46: Terms and Abbreviations
Abbreviation APT BIOS bps BW CHAP COEX CPE CSQ DC-DC DFOTA DC-HSDPA
Description Average Power Tracking Basic Input Output System Bit Per Second Bandwidth Challenge-Handshake Authentication Protocol Coexistence Customer Premise Equipment Cellular Signal Quality Direct Current to Direct Current Delta Firmware Upgrade Over-The-Air Dual-carrier High Speed Downlink Packet Access
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DL DPR DRX EN-DC EP ESD ET E-UTRA FDD FOTA GLONASS GNSS GPS GSM HB HPUE HSDPA HSPA HSUPA IC IPQ kbps LAA LED LTE MB
Downlink Dynamic Power Reduction Discontinuous Reception (Chapter 3.1.1) Diversity Reception (Chapter 5) E-UTRA New Radio Dual Connectivity End Point Electrostatic Discharge Envelope Tracking Evolved Universal Terrestrial Radio Access Frequency Division Duplexing Firmware Over-The-Air Global Navigation Satellite System (Russia) Global Navigation Satellite System Global Positioning System Global System for Mobile Communications High Band High Power User Equipment High Speed Downlink Packet Access High Speed Packet Access High Speed Uplink Packet Access Integrated Circuit Qualcomm Internet Processor Kilo Bits Per Second License Assisted Access Light Emitting Diode Long Term Evolution Middle Band
5G Module Series
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Mbps ME MIMO MLCC MO MSB MT NR PAP PCB PCIe PDU PPP PRX QAM QPSK QZSS RC RF RHCP RFFE Rx SAR SCS SIMO SMS TBD
Mega Bits Per Second Mobile Equipment Multiple-Input Multiple-Output Multilayer Ceramic Chip Capacitor Mobile Originated Most Significant Bit Mobile Terminated New Radio Password Authentication Protocol Printed Circuit Board Peripheral Component Interconnect Express Protocol Data Unit Point-to- Point Protocol Primary Receive Quadrature Amplitude Modulation Quadrature Phase Shift Keying Quasi-Zenith Satellite System Root Complex Radio Frequency Right Hand Circularly Polarized RF Front-End Receive Specific Absorption Rate Sub-Carrier Spacing Single Input Multiple Output Short Message Service To Be Determined
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TCP TDD TTFF Tx UART UDP UHB UL URC USB (U)SIM VIH VIL VOH VOL VSWR WCDMA WLAN WWAN
5G Module Series
Transmission Control Protocol Time Division Duplexing Time to First Fix
Transmit Universal Asynchronous Receiver & Transmitter User Datagram Protocol
Ultra High Band Uplink Unsolicited Result Code Universal Serial Bus
(Universal) Subscriber Identity Module Input High Voltage Level Input Low
Voltage Level Output High Voltage Level Output Low Voltage Level Voltage
Standing Wave Ratio Wideband Code Division Multiple Access Wireless Local Area
Network Wireless Wide Area Network
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5G Module Series
9 Appendix B Operating Frequency
Table 47: Operating Frequencies (5G)
5G
Duplex Mode Uplink Operating Band
n1
FDD
19201980
n2
FDD
18501910
n3
FDD
17101785
n5
FDD
824849
n7
FDD
25002570
n8
FDD
880915
n12
FDD
699716
n13
FDD
777787
n14
FDD
788798
n18
FDD
815830
n20
FDD
832862
n24
FDD
1626.51660.5
n25
FDD
18501915
n26
FDD
814849
n28
FDD
703748
n29
SDL
–
n30
FDD
23052315
n34
TDD
20102025
n38
TDD
25702620
n39
TDD
18801920
n40
TDD
23002400
Downlink Operating Band 21102170 19301990 18051880 869894 26202690 925960 729746 746756 758768 860875 791821 15251559 19301995 859894 758803 717728 23502360 20102025 25702620 18801920 23002400
Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz
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5G Module Series
5G
Duplex Mode Uplink Operating Band Downlink Operating Band
Unit
n41
TDD
24962690
24962690
MHz
n46
TDD
51505925
51505925
MHz
n47
TDD
58555925
58555925
MHz
n48
TDD
35503700
35503700
MHz
n50
TDD
14321517
14321517
MHz
n51
TDD
14271432
14271432
MHz
n53
TDD
2483.52495
2483.52495
MHz
n65
FDD
19202010
21102200
MHz
n66
FDD
17101780
21102200
MHz
n67
SDL
–
738758
MHz
n70
FDD
16951710
19952020
MHz
n71
FDD
663698
617652
MHz
n74
FDD
14271470
14751518
MHz
n75
SDL
–
14321517
MHz
n76
SDL
–
14271432
MHz
n77
TDD
33004200
33004200
MHz
n78
TDD
33003800
33003800
MHz
n79
TDD
44005000
44005000
MHz
n80
SUL
17101785
–
MHz
n81
SUL
880915
–
MHz
n82
SUL
832862
–
MHz
n83
SUL
703748
–
MHz
n84
SUL
19201980
–
MHz
n85
FDD
698716
728746
MHz
n86
SUL
17101780
–
MHz
n89
SUL
824849
–
MHz
n90
TDD
24962690
24962690
MHz
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5G Module Series
5G
Duplex Mode Uplink Operating Band Downlink Operating Band
Unit
n91
FDD
832862
14271432
MHz
n92
FDD
832862
14321517
MHz
n93
FDD
880915
14271432
MHz
n94
FDD
880915
14321517
MHz
n95
SUL
20102025
–
MHz
n96
TDD
59257125
59257125
MHz
n97
SUL
23002400
–
MHz
n98
SUL
18801920
–
MHz
n99
SUL
1626.51660.5
–
MHz
Table 48: Operating Frequencies (2G + 3G + 4G)
2G PCS1900 DCS1800 GSM850 EGSM900 –
3G B1 B2/BC1 B3 B4 B5/BC0 B6 B7 B8 B9 B10 B11 B12 B13 B14 –
4G Duplex Mode Uplink
Downlink
B1 FDD
19201980
21102170
B2 FDD
18501910
19301990
B3 FDD
17101785
18051880
B4 FDD
17101755
21102155
B5 FDD
824849
869894
–
FDD
830840
875885
B7 FDD
25002570
26202690
B8 FDD
880915
925960
B9 FDD
1749.91784.9 1844.91879.9
B10 FDD
17101770
21102170
B11 FDD
1427.91447.9 1475.91495.9
B12 FDD
699716
729746
B13 FDD
777787
746756
B14 FDD
788798
758768
B17 FDD
704716
734746
Unit MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz MHz
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5G Module Series
2G
3G
4G Duplex Mode Uplink
Downlink
Unit
–
–
B18 FDD
815830
860875
MHz
–
B19
B19 FDD
830845
875890
MHz
–
B20
B20 FDD
832862
791821
MHz
–
B21
B21 FDD
1447.91462.9 1495.91510.9 MHz
–
B22
B22 FDD
34103490
35103590
MHz
–
–
B24 FDD
1626.51660.5 15251559
MHz
–
B25
B25 FDD
18501915
19301995
MHz
–
B26
B26 FDD
814849
859894
MHz
–
–
B27 FDD
807824
852869
MHz
–
–
B28 FDD
703748
758803
MHz
–
–
B29 FDD 18
–
717728
MHz
–
–
B30 FDD
23052315
23502360
MHz
–
–
B31 FDD
452.5457.5 462.5467.5
MHz
–
–
B32 FDD 18
–
14521496
MHz
–
B33
B33 TDD
19001920
19001920
MHz
–
B34
B34 TDD
20102025
20102025
MHz
–
B35
B35 TDD
18501910
18501910
MHz
–
B36
B36 TDD
19301990
19301990
MHz
B37
B37 TDD
19101930
19101930
MHz
–
B38
B38 TDD
25702620
25702620
MHz
–
B39
B39 TDD
18801920
18801920
MHz
–
B40
B40 TDD
23002400
23002400
MHz
–
–
B41 TDD
24962690
24962690
MHz
–
–
B42 TDD
34003600
34003600
MHz
–
–
B43 TDD
36003800
36003800
MHz
18 Restricted to E-UTRA operation when carrier aggregation is configured. The downlink operating band is paired with the uplink operating band (external) of the carrier aggregation configuration that is supporting the configured Pcell.
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5G Module Series
2G
3G
4G Duplex Mode Uplink
Downlink
Unit
–
–
B44 TDD
703803
703803
MHz
–
–
B45 TDD
14471467
14471467
MHz
–
–
B46 TDD
51505925
51505925
MHz
–
–
B47 TDD
58555925
58555925
MHz
–
–
B48 TDD
35503700
35503700
MHz
–
–
B50 TDD
14321517
14321517
MHz
–
–
B51 TDD
14271432
14271432
MHz
–
–
B52 TDD
33003400
33003400
MHz
–
–
B65 FDD
19202010
21102200
MHz
–
–
B66 FDD
17101780
21102200 19
MHz
–
–
B67 FDD 18
–
738758
MHz
–
–
B68 FDD
698728
753783
MHz
–
–
B69 FDD 18
–
25702620
MHz
–
–
B70 FDD 20
16951710
19952020
MHz
–
–
B71 FDD
663698
617652
MHz
–
–
B72 FDD
451456
461466
MHz
–
–
B73 FDD
450455
460465
MHz
–
–
B74 FDD
14271470
14751518
MHz
–
–
B75 FDD 18
–
14321517
MHz
–
–
B76 FDD 18
–
14271432
MHz
–
–
B85 FDD
698716
728746
MHz
–
–
B87 FDD
410415
420425
MHz
–
–
B88 FDD
412417
422427
MHz
19 The range 21802200 MHz of the DL operating band is restricted to E-UTRA operation when carrier aggregation is configured. 20 The range 20102020 MHz of the DL operating band is restricted to E-UTRA operation when carrier aggregation is configured and TX-RX separation is 300 MHz. The range 20052020 MHz of the DL operating band is restricted to E-UTRA operation when carrier aggregation is configured and TX-RX separation is 295 MHz.
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