Sipeed Lichee Zero Specifications v1.0 User Manual

June 8, 2024
Sipeed

Sipeed Lichee Zero Specifications v1.0 User Manual

Sipeed Lichee Zero

Development board features:

  • CPU: Allwinner V3S
    ARM Cortex-A7
    Up to 1.2GHz

  • Memory: Integrated 64MB DDR2

  • Storage: Reserved SOP8 SPI Flash pad, Onboard half slot TF card holder

  • Interface: SDIO, UART, SPI, I2C, OTG USB, MIPI CSI, etc.

  • Display: Universal 40P RGB LCD FPC Socket
    Support 272×480, 480×800, 1024×600 resolution

Functional Overview

Functional Overview

Software function

Support linux 3.4 bsp kernel, linux 4.16 mainline kernel

Support Qt, python and other common linux applications

Lichee Zero core board pin diagram

Lichee Zero core board pin diagram

Development board module and interface

Development board

Development board cont.

Communicate communities and resources

communities and resources

Size and weight

Size and weight

Precautions

Precautions

Target application scenario:

  • IoT applications using more complex communication interfaces and protocols
  • Machine vision, camera related applications
  • The application of human-computer interaction interface that needs more beautiful and complex logic
  • Application scenarios that require more operations (as opposed to common MCUs)
  • Need to use open source software under Linux for rapid development scenarios
  • High-end geek players balance in size, performance and ease of use.
  • Entry level player, software engineer, hardware diy using familiar language

Disclaimer and copyright notice

The information in this document, including the URL address for reference, is subject to change without notice. The documentation is provided by Sipeed™ without warranty of any kind, including any warranties of merchantability, and any proposal, specification or sample referred to elsewhere. This document is not intended to be a liability, including the use of information in this document to infringe any patent rights.

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