Sipeed Lichee Tang Specifications v1.0 User Manual
- June 8, 2024
- Sipeed
Table of Contents
- Sipeed Lichee Tang Specifications v1.0
- Read User Manual Online (PDF format)
- Download This Manual (PDF format)
Sipeed Lichee Tang Specifications v1.0
- EG4S20
- 20K logic unit
- About 130KB SRAM
- Built-in 32bit width 64MBit SDRAM
- Many LVDS pins
- Built-in 12-bit 1MSPS ADC
Functional Overview
Software function
Integrate, download, debug features with TD IDE
IDE has a rich IP core
Support hummingbird risc-v soft core https://github.com/Lichee-
Pi/Tang_E203_Mini
Lichee Tang development board pin diagram
Lichee Tang Development Board Resource Map
Communicate communities and resources
Github https://github.com/Lichee-Pi
BBS http://bbs.lichee.pro/t/lichee
Wiki tang.lichee.pro
E-mail support@sipeed.com
Size and weight
Development board size 25.4×56.0mm
Development board weight 6.2±0.1g
Precautions
RV debugging
When using the RV debugger, if you need to use USB power, try to use a shorter USB cable.
Micro-USB
The USB interface can be used for power supply, and the interface is fragile. Please pay attention to the use.
Download and debug
On-board FPGA JTAG download debugger, debugging hummingbird core requires other debuggers, such as RV, JLink
Operating temperature
-20~85℃
Power consumption and current
No-load current is about 50mA
Target application scenario
- High-speed communication interface interconnection
- Learning, debugging, research of soft cores such as RISC-V
- Machine vision processing
- Parallel computing acceleration
Disclaimer and copyright notice
The information in this document, including the URL address for reference, is
subject to change without notice.
The documentation is provided by Sipeed™ without warranty of any kind,
including any warranties of merchantability,and any proposal, specification or
sample referred to elsewhere. This document is not intended to be a liability,
including the use of information in this document to infringe any patent
rights.
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