Microsemi DG0852 PolarFire FPGA Temperature and Voltage Sensor User Guide

Microsemi DG0852 PolarFire FPGA Temperature and Voltage Sensor

Product Information: DG0852 Demo Guide PolarFire FPGA

Temperature and Voltage Sensor

The DG0852 Demo Guide PolarFire FPGA Temperature and Voltage Sensor is a product designed to measure temperature and voltage. The product is manufactured by Microsemi, headquartered in Aliso Viejo, California, USA.

Design Requirements

For the product to function adequately, the design requirements include the use of the PolarFire FPGA Temperature and Voltage Sensor, which is a low-power consuming and cost-effective FPGA.

Prerequisites

To use the DG0852 Demo Guide PolarFire FPGA Temperature and Voltage Sensor, you need to have a system that supports the Libero Design Flow software, which is responsible for the design implementation and simulation flow.

Demo Design

The demo design involves implementing a temperature and voltage measurement system using the PolarFire FPGA Temperature and Voltage Sensor.

Design Implementation

The implementation process involves the following steps:

• Synthesize – this step involves converting the design requirements into an HDL format that the FPGA can understand.
• Place and Route – this step involves placing the synthesized circuits onto the chip and routing interconnections.
• Verify Timing – this step checks if the timing constraints of the design are met.
• Generate FPGA Array Data – this step generates the data that will be loaded onto the FPGA.
• Generate Bitstream – this step generates the bitstream that will be downloaded to the target FPGA device.
• Run PROGRAM Action – this step programs the device with the bitstream.

Simulation Flow

The simulation flow involves simulating the design to ensure that it meets the design requirements.

• Simulating the Design – this step involves simulating the design using the Libero Design Flow software to ensure that it meets the design requirements.

Product Usage Instructions

To use the DG0852 Demo Guide PolarFire FPGA Temperature and
Voltage Sensor, follow these steps:

1. Ensure that your system supports the Libero Design Flow software.
2. Download and install the Libero Design Flow software from Microsemi’s website.
3. Follow the design implementation steps outlined in the user manual to implement your temperature and voltage measurement system.
4. Simulate the design using the Libero Design Flow software to ensure that it meets the design requirements.
5. Program the device with the bitstream using the Run PROGRAM Action step outlined in the user manual.
6. Connect your temperature and voltage sensors to the PolarFire
   FPGA Temperature and Voltage Sensor to start measuring temperature and voltage.

For further product support or inquiries, contact Microsemi’s sales or customer support teams via phone or email, as provided in the user manual.

Microsemi Headquarters
One Enterprise, Aliso Viejo,
CA 92656 USA
Within the USA: +1 800-713-4113
Outside the USA : +1 949-380-6100 Sales: +1 949-380-6136
Fax: +1 949-215-4996
Email: [email protected] www.microsemi.com
©2021 Microsemi, a wholly owned subsidiary of Microchip Technology Inc. All rights reserved. Microsemi and the Microsemi logo are registered trademarks of Microsemi Corporation. All other trademarks and service marks are the property of their respective owners.
Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction with mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyer’s responsibility to independently determine suitability of any products and to test and verify the same. The information provided by Microsemi hereunder is provided “as is, where is” and with all faults, and the entire risk associated with such information is entirely with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice.

About Microsemi
Microsemi, a wholly owned subsidiary of Microchip Technology Inc. (Nasdaq: MCHP), offers a comprehensive portfolio of semiconductor and system solutions for aerospace & defense, communications, data center and industrial markets. Products include high-performance and radiation-hardened analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization devices and precise time solutions, setting the world’s standard for time; voice processing devices; RF solutions; discrete components; enterprise storage and communication solutions, security technologies and scalable anti-tamper products; Ethernet solutions; Power- over-Ethernet ICs and midspans; as well as custom design capabilities and services. Learn more at www.microsemi.com.

Revision History

The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication.

Revision 3.0
The following is a summary of the changes made in this revision.

• Added Appendix 2: Running the TCL Script, page 15.
• Updated Figure 2, page 4.
• Updated Figure 3, page 5.

Revision 2.0
The following is a summary of the changes made in this revision.

• Updated the document for Libero SoC v12.2.
• Removed the references to Libero version numbers.

Revision 1.0
The first publication of this document.

PolarFire FPGA Temperature and Voltage Sensor

Each PolarFire device is equipped with a Temperature and Voltage Sensor (TVS). TVS reports die temperature and voltage of device supply rails in digital form to the FPGA fabric.
TVS is implemented using a 4-channel ADC and the channel information is given as follows:

• Channel 0 – 1 V voltage supply
• Channel 1 – 1.8 V voltage supply
• Channel 2 – 2.5 V voltage supply
• Channel 3 – Die temperature

The TVS outputs a 16-bit encoded value that represents voltage or temperature, and corresponding channel number. The temperature and voltage information is translated into standard temperature and voltage values. For more information, see UG0753: PolarFire FPGA Security User Guide.
This demo highlights the TVS feature of the PolarFire using an UART-based application (GUI). The demo design continuously pumps the data from TVS channels to UART, which is displayed on the GUI. This demo design also shows how to simulate the TVS feature of the PolarFire device.
The demo design can be programmed using any of the following options:

• Using the job file: To program the device using the job file provided along with the design files, see Appendix 1: Programming the Device Using FlashPro Express, page 12.
• Using Libero SoC: To program the device using Libero SoC, see Libero Design Flow, page 8. Use this option when the demo design is modified.

Design Requirements
The following table lists the hardware and software requirements for this demo design.

Note: Libero SmartDesign and configuration screen shots shown in this guide are for illustration purpose only. Open the Libero design to see the latest updates.

Prerequisites
Before you begin:

1. For demo design files download link:
   http://soc.microsemi.com/download/rsc/?f=mpf_dg0852_df

2. Download and install Libero SoC (as indicated in the website for this design) on the host PC from the following location:
   https://www.microsemi.com/product-directory/design-resources/1750-libero-soc
   The latest versions of ModelSim, Synplify Pro, and FTDI drivers are included in the Libero SoC installation package.

Demo Design
The top-level block diagram of the TVS design is shown in the following figure. All four channels of TVS are enabled in the design to monitor the die temperature and voltage rails. The Fabric logic captures the TVS channels output and sends to UART IF through CoreUART IP.

The GUI receives channel wise TVS values and decodes as described to display them:
Die Temperature:
The temperature channels 16-bit output value is represented in Kelvin and can be decoded as listed in the following table. For example, the temperature channel’s output value of 0x133B implies 307.56 Kelvin.

Voltage:
The data present on the VALUE and CHANNEL outputs is valid only when the VALID output is asserted. When a channel is disabled by deasserting the corresponding channel enable input, then the channel data present on the outputs is not valid even if the VALID output is asserted. The voltage channels 16-bit output value is represented in millivolts (mV) and can be decoded as listed in the following table. For example, the voltage channels output value of 0x385E implies 1803.75 mV.

Design Implementation
The following figure shows the Libero SoC software design implementation of the TVS demo design.
Figure 2 • TVS Demo Design

The top-level design includes the following components:

• TVS_IP_0 Macro
• Core_UART_0
• TVS_to_UART_0 logic
• clock_gen_0
• INIT_MONITOR_0 and PF_RESET_0

TVS_IP_0 Macro
The following figure shows the TVS interface configurator.The GUI displays the die temperature in degree Celsius by converting Kelvin values. Celsius value = Kelvin value – 273.15

TVS_to_UART_0
The TVS to UART logic captures the Temperature and Voltage values from the TVS macro and sends the data to Core_UART_0.

clock_gen_0
CCC is configured to generate the 100 MHz clock.

Simulation Flow
The TVS simulation model updates the outputs of the TVS macro based on reading instructions given in the .mem file or .txt file. The file name must be passed to the simulation model for the TVS outputs to toggle. The parameter used to store the .mem file name is called “TVS_MEMFILE”. Add the following vsim command to pass the file name. -gTVS_MEMFILE=”PATH_TO_FILE_RELATIVE_TO_SIMULATION_FOLDER”

MEM File Format
The following format of the file is in hex:
<simulation time (τ) in hexadecimal>
<value of channel 0 at time τ>
<value of channel 1 at time τ>
<value of channel 2 at time τ>
<value of channel 3 at time τ>

The .mem file contains the simulation time followed by the digital values (16-bit) of the four ADC channels at that time instance. A value is required for the channel even if it is not used. The value can be 0. The simulation starts with all channel outputs being 0. The pattern can be repeated several times in the .mem file to reflect several values of the channel outputs. The content of the mem file is limited to 256 lines.

Simulating the Design
The Libero project includes a testbench to simulate the TVS block. The testbench captures all the four TVS channel values using CoreUART IP. The digital values for the four channels is passed through the .mem file.

Simulation Settings
To pass the mem file for simulation, perform the following steps:

1. Open the Libero SoC project settings (Project > Project Settings).
2. Select Vsim commands under the Simulation options. Enter- gTVS_MEMFILE=”tvs_values.mem” in the Additional options field and then click Save.

A sample tvs_values.mem is provided in the simulation folder. The .mem file must be available in simulation folder of the Libero project. The tvs_values.mem file captures the 16-bit digital output of the TVS block at different time instances.

To simulate the design, perform the following steps:

1. In the Design Flow tab, right-click Simulate under Verify Pre-Synthesis Design and then select Open Interactively.
   Figure 5 • Design Flow—Simulate When simulation is completed, the Wave window appears as shown in the following figure. Since all the four channels are enabled, TVS circuit outputs value of the four channels at a given point in time on the VALUE output along with channel number on the CHANNEL output. The data present on the VALUE and CHANNEL outputs are valid only when the VALID output is asserted. Observe the following from the simulation results:

   • After the channel is enabled for conversion, the TVS block takes 390 microseconds to complete the conversion.
   • Each channel has a conversion delay of 410 microseconds.
   • The conversion rate is equal to 1920 microseconds, which is same as the conversion rate set in the TVS configurator.
   • TVS block generate the output values based on the values given in the tvs_values.mem file.
     

2. Close ModelSim Pro ME and the Libero project.

Libero Design Flow

This chapter describes the Libero design flow of the demo design. The Libero design flow involves the following steps:

• Synthesize
• Place and route
• Verify Timing
• Generate Bitstream
• Run PROGRAM Action
  The following figure shows these options in the Design Flow tab.

Figure 7 • Libero Design Flow Options Synthesize
To synthesize the design, perform the following steps:

1. From the Design Flow window, double-click Synthesize.
   When the synthesis is successful, a green tick mark appears as shown in Figure 7, page 8.

2. Right-click Synthesize and select View Report to view the synthesis report and log files in the Reports tab.

Place and Route

1. From the Design Flow window, double-click Place and Route.
   When place and route is successful, a green tick mark appears as shown in Figure 7, page 8.

2. Right-click Place and Route and select View Report to view the place and route report and log files in the Reports tab.

Resource Utilization
The following table lists the resource utilization of the design after place and route. These values may vary slightly for different Libero runs, settings, and seed values.

Verify Timing
To verify timing, perform the following steps:

1. From the Design Flow window, double-click Verify Timing.
2. When the design successfully meets the timing requirements, a green tick mark appears as shown in Figure 7, page 8.
3. Right-click Verify Timing and select View Report to view the verify timing report and log files in the Reports tab.

Generate FPGA Array Data
To generate FPGA array data, double-click Generate FPGA Array Data from the Design Flow window.
A green tick mark is displayed after the successful generation of the FPGA array data as shown in Figure 7, page 8.

Generate Bitstream
To generate the bitstream, perform the following steps:

1. Double-click Generate Bitstream from the Design Flow tab.
   When the bitstream is successfully generated, a green tick mark appears as shown in Figure 7, page 8.

2. Right-click Generate Bitstream and select View Report to view the corresponding log file in the Reports tab.

Run PROGRAM Action
After generating the bitstream, the PolarFire device must be programmed. To program the PolarFire device, perform the following steps:

1. Ensure that the following Jumper Settings are set on the board.
2. Connect the power supply cable to the J9 connector on the board.
3. Connect the USB cable from the Host PC to J5 (FTDI port) on the board.
4.  Power on the board using the SW3 slide switch.
5. Double-click Run PROGRAM Action from the Libero > Design Flow tab.
   When the device is programmed successfully, a green tick mark appears as shown Figure 7, page 8.

Running the Demo

This chapter describes how to install and use the Graphic User Interface (GUI) to run the TVS demo. The PolarFire TVS demo application is a simple GUI that runs on the host PC to communicate with the PolarFire Device.
To install the GUI, perform the following steps:

1. Extract the contents of the mpf_dg0852_df.rar file. From the mpf_dg0852_df\GUI\TVS_Monitor_GUI_Installer folder, double-click the setup.exe file.
2. Follow the instructions displayed on the installation wizard.
   After successful installation, TVS_Monitor_GUI appears on the Start menu of the host PC desktop.

To run the TVS demo, perform the following steps:

1. From the Start menu, click TVS_Monitor_GUI to launch the application. Ensure that the board is connected and appropriate Log Folder is selected.

2. Click Connect. On successful connection, the GUI shows the temperature and voltage values. Log file is created with time stamp in the file name at the Log Folder location.
   By default, Log Folder points to the ‘SupportFiles’ folder in the installation directory. User can modify the Log Folder location before connecting to the board.
   Note: Ensure that the Log Folder is not a system restricted location. In this case, user is required to launch the GUI with admin privileges (right- click and run as admin).

3. Upper Limit, Lower Limit, and the minimum variation to log for each of the channels are configurable in the setup.ini file. Channel values are logged in the log file if there is a variation exceeding the specified ‘min var’ values in the setup.ini file.
   The following figure shows the standard temperature and voltage values of channel 0 (1.05 V). The plot corresponds to the values of Channel 0. Similarly, select the other channels and view their corresponding values and plots.
   Figure 8 • Selecting COM Port and Connecting—Channel 0 Note : The GUI updates the TVS channel values with the delay entered in the Delay (ms) field.

Appendix 1: Programming the Device Using FlashPro Express

This section describes how to program the PolarFire device with the .job programming file using FlashPro Express. The .job file is available at the following design files folder location:
mpf_dg0852_df\Programming_Job
To program the device, perform the following steps:

1. Ensure that the jumper settings on the board are the same as listed in Table 5, page 10.
   Note: The power supply switch must be switched off while making the jumper connections.  v

2. Connect the power supply cable to the J9 connector on the board.

3. Connect the USB cable from the Host PC to the J5 (FTDI port) on the board.

4. Power on the board using the SW3 slide switch.

5. On the host PC, launch the FlashPro Express software.

6. Click New or select New Job Project from FlashPro Express Job from Project menu to create a new job project, as shown in the following figure.

7. Enter the following in the New Job Project from FlashPro Express Job dialog box:

   • Programming job file: Click Browse, navigate to the location where the .job file is located, and select the file. The default location is: \mpf_dg0852_df\Programming_Job.
   • FlashPro Express job project location: Click Browse and navigate to the location where you want to save the project.
     Figure 10 • New Job Project from FlashPro Express Job

8. Click OK. The required programming file is selected and ready to be programmed in the device.

9. The FlashPro Express window appears as shown in the following figure. Confirm that a programmer number appears in the Programmer field. If it does not, confirm the board connections and click Refresh/Rescan Programmers.
   Figure 11 • Programming the Device

10. Click RUN to program the device. When the device is programmed successfully, a RUN PASSED status is displayed as shown in the following figure. See Running the Demo, page 11 to run the TVS demo.

11. Close FlashPro Express or in the Project tab, click Exit.

Appendix 2: Running the TCL Script

TCL scripts are provided in the design files folder under directory TCL_Scripts. If required, the design flow can be reproduced from Design Implementation till generation of job file.
To run the TCL, follow the steps below:

1. Launch the Libero software
2. Select Project > Execute Script….
3. Click Browse and select script.tcl from the downloaded TCL_Scripts directory.
4. Click Run.
   After successful execution of TCL script, Libero project is created within TCL_Scripts directory.
   For more information about TCL scripts, refer to mpf_dg0852_df/TCL_Scripts/readme.txt.
   Refer to Libero® SoC TCL Command Reference Guide for more details on TCL commands. Contact Technical Support for any queries encountered when running the TCL script

References

• FPGA Documentation | Microchip Technology
• Microsemi | Semiconductor & System Solutions | Power Matters
• Empowering Innovation | Microchip Technology
• microsemi.com/document-portal/doc_download/1245481-libero-soc-v12-6-tcl-commands-reference-guide-for-smartfusion2-igloo2-and-rtg4
• Libero® SoC Design Suite Versions 2023.2 to 12.0 | Microchip Technology

Read User Manual Online (PDF format)

Download This Manual (PDF format)

Download this manual  >>