MICROCHIP MIC2774 Dual Micropower Low Voltage Supervisor User Guide
- June 9, 2024
- MICROCHIP
Table of Contents
- Features
- Applications
- General Description
- Package Types
- ELECTRICAL CHARACTERISTICS
- ELECTRICAL CHARACTERISTICS
- ELECTRICAL CHARACTERISTICS (CONTINUED)
- PIN DESCRIPTIONS
- FUNCTIONAL DESCRIPTION
- APPLICATION INFORMATION
- PACKAGING INFORMATION
- 5-Lead SOT-23 Package Outline and Recommended Land Pattern
- PRODUCT IDENTIFICATION SYSTEM
- Worldwide Sales and Service
- Read User Manual Online (PDF format)
- Download This Manual (PDF format)
MICROCHIP MIC2774 Dual Micropower Low Voltage Supervisor
Features
- Monitors Two Independent Power Supplies for Undervoltage Conditions
- One Fixed and One User-Adjustable Input
- Choice of Ten Factory-Programmed Thresholds
- Adjustable Input can Monitor Supplies as Low as 0.3V
- Generates 140 ms (min.) Power-On Reset Pulse
- Manual Reset Input
- Choice of Active-High, Active-Low, or Open-Drain Active-Low Reset Outputs
- Inputs May be Pulled Above VDD (7V abs. max.)
- /RST Output Valid Down to 1.2V
- Ultra-Low Supply Current, 3.5 µA Typical
- Rejects Brief Input Transients
- Itty-bitty 5-pin SOT-23 Package
- Pin-Compatible upgrade for MAX6306/09/12
Applications
- Monitoring Processor ASIC or FPGA Core and I/O Voltages
- PDAs, Handheld PCs
- Embedded Controllers
- Telecommunications Systems
- Power Supplies
- Wireless/Cellular Systems
- Networking Hardware
General Description
The MIC2774 is a dual power supply supervisor that provides undervoltage
monitoring, manual reset capability, and power-on reset generation in a
compact 5-pin SOT-23 package. Features include two undervoltage detectors, one
fixed and one adjustable, and a choice of reset outputs. One undervoltage
detector compares VDD against a fixed threshold. Ten factory-programmed
thresholds are available. The second, user-adjustable input is compared
against a 300 mV reference. This low reference voltage allows for the
monitoring of voltages lower than those supported by previous supervisor ICs.
The reset outputs are asserted at power-on and at any time either voltage
drops below the programmed threshold voltage and remains asserted for 140 ms
(min.) after they subsequently rise back above the threshold boundaries.
Manual reset functionality can be provided by a switch connected between
ground and the /MR input. A wide choice of voltage thresholds provides for a
variety of supply voltages and tolerances. Hysteresis is included to prevent
chattering due to noise. Typical supply current is a low 3.5 µA.
Package Types
MIC2774 5-Lead SOT-23 (M5) (H Version)
MIC2774 5-Lead SOT-23 (M5) (L and N Versions)
Typical Application Circuit
Functional Block Diagram
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Supply Voltage (VDD) ….. –0.3V to +7.0V
Input Voltages (VIN, V/MR)…. –0.3V to +7.0V
Output Voltages (V/RST, VRST)… –0.3V to +7.0V
RST, (/RST) Current……20 mA
ESD Rating (Note 1) ….. 1.5 kV
Operating Ratings
Supply Voltage (VDD) ….. +1.5V to +5.5V
Input Voltages (VIN, V/MR)…. –0.3V to +6.0V
Output Voltage (V/RST, N Version) … –0.3V to +6.0V
Output Voltage (V/RST, VRST, H & L Versions) ….–0.3V to VDD + 0.3V
Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability
Notice: The device is not guaranteed to function outside its operating
ratings.
Nozte 1: Devices are ESD sensitive. Handling precautions are recommended.
Human body model, 1.5 kΩ in series
with 100 pF.
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: TA = +25°C, bold values valid for –40°C ≤ TA ≤ +85°C, unless noted. Note 1, Note 2
Parameter| Sym.| Min.| Typ.| Max.| Units|
Conditions
---|---|---|---|---|---|---
Supply Current| IDD| —| 3.5| —| µA| VDD = VIN = VTH + 1.6%;
Note 2; /MR, RST, /RST open
V DD Voltage Threshold
Undervoltage Threshold on VDD| VUV_THR| V TH – 1.5%| VTH| V
TH + 1.5%| V| See Table 5-1
Hysteresis Voltage| VHYST| —| 1| —| %| —
IN, Undervoltage Detector Input
Undervoltage Threshold| VREF| 295| 300| 305| mV| Note 2
Hysteresis Voltage| VHYST| —| 3| —| mV| —
Input Current| IIN| —| 5| —| pA| —
—| —| 10| nA| TMIN ≤ TA ≤ TMAX
RST, /RST Outputs
Propagation Delay| tPROP| —| 20| —| µs| VIN = (VREF(MAX) + 100 mV) to VIN =
(VREF(MIN) – 100 mV), /MR = open
Reset Pulse Width| tRST| 140| —| 280| ms| TMIN ≤ TA ≤ TMAX
RST or /RST Output Voltage Low| VOL| —| —| 0.3| V| ISINK = 1.6 mA; VDD ≥
1.6V
—| —| 0.3| ISINK = 100 µA; VDD ≥ 1.2V; Note 3
Note
- Specification for packaged product only.
- VDD equals nominal “Typical Application (VDD)” as shown in Table 5-1.
- VDD operating range is 1.5V to 5.5V. Output is guaranteed to be asserted down to VDD = 1.2V.
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: TA = +25°C, bold values valid for –40°C ≤ TA ≤ +85°C, unless noted. Note 1, Note 2
Parameter| Sym.| Min.| Typ.| Max.| Units|
Conditions
---|---|---|---|---|---|---
RST or /RST Output Voltage High (H and L versions)| VOH| 0.8 × V DD|
—| —| V| ISOURCE = 500 µA; VDD ≥ 1.5V
0.8 × V DD| —| —| ISOURCE = 10 µA; VDD ≥ 1.2V; Note 3
/MR Inputs
Input High Voltage| VIH| 0.7 × V DD| —| —| V| Note 2
Input Low Voltage| VIL| —| —| 0.3 × V DD| V| Note 2
Propagation Delay| tPROP| —| 5| —| µs| V/MR < (VIL – 100 mV) Note 2
Minimum Input Pulse Width| tMIN| —| 33| —| ns| Reset occurs, V/MR < VIL
Internal Pull-Up Current| IPU| —| 100| 250| nA| —
Input Current, /MR| IIN| —| 100| 250| nA| V/MR < VIL
Note
- Specification for packaged product only.
- VDD equals nominal “Typical Application (VDD)” as shown in Table 5-1.
- VDD operating range is 1.5V to 5.5V. Output is guaranteed to be asserted down to VDD = 1.2V
TEMPERATURE SPECIFICATIONS
Parameters| Sym.| Min.| Typ.| Max.| Units|
Conditions
---|---|---|---|---|---|---
Temperature Ranges
Operating Ambient Temperature Range| TA| –40| —| +85| °C| Note 1
Storage Temperature Range| TS| –65| —| +150| °C| —
Package Thermal Resistance
Thermal Resistance, SOT-23 5-Ld| θJA| —| 256| —| °C/W| —
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +85°C rating. Sustained junction temperatures above +85°C can impact the device reliability.
Note
- Propagation delays not shown for clarity.
- The MIC2774 ignores very brief transients. See the Application Information section for details.
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
Pin Number MIC2774H| Pin Number MIC2774L MIC2774N| Pin Name|
Description
---|---|---|---
1| —| RST| Digital (Output): Asserted high whenever VIN or VDD falls below the
threshold voltage. It will remain asserted for no fewer than 140 ms after VIN
and VDD return above the threshold limits.
—| 1| /RST| Digital (Output): Asserted low whenever VIN or VDD falls below the
threshold voltage. It will remain asserted for no fewer than 140 ms after VIN
and VDD return above the threshold limits. (Open-drain for “N” version,
requires an external pull-up resistor).
2| 2| GND| Ground.
3| 3| /MR| Digital (Input): Driving this pin low initiates immediate and
uncondi- tional reset. Assuming VIN and VDD are above the thresholds when /MR
is released (returns high), the reset output will be de-asserted no fewer than
140 ms later. /MR may be driven by a logic signal or a mechanical switch. /MR
has an internal pull-up to VDD and may be left open if unused.
4| 4| IN| Analog (Input): The voltage on this pin is compared to the internal
300 mV reference. An undervoltage condition will trigger a reset sequence.
5| 5| VDD| Analog (Input): Power supply input for internal circuitry and input
to the fixed voltage monitor. The voltage on this pin is compared against the
internal reference. An undervoltage condition will trigger a reset sequence.
FUNCTIONAL DESCRIPTION
IN, Undervoltage Detector Input
The voltage present at the IN pin is compared to the internal 300 mV reference voltage. A reset is triggered if and when VIN falls below VREF. Typically, a resistor divider is used to scale the input voltage to be monitored such that VIN will fall below VREF as the voltage being monitored falls below the desired trip-point. Hysteresis is employed to prevent chattering due to noise. The comparator on the IN pin is relatively immune to very brief negative-going transients.
VDD Input
The VDD pin is both the power supply terminal and a monitored input voltage. The voltage at this pin is continually compared against the internal reference. The trip-point at which a reset occurs is factory-programmed. A reset is triggered if and when VDD falls below the trip-point. Hysteresis is employed to prevent chattering due to noise. The comparator on the VDD input is relatively immune to very brief negative-going transients.
RST, /RST Reset Output
Typically, the MIC2774 is used to monitor the power supplies of intelligent
circuits such as microcontrollers and microprocessors. By connecting the
appropriate reset output of an MIC2774 to the reset input of a µC or µP, the
processor will be properly reset at power-on, power-down, and during brown-out
conditions. In addition, asserting /MR, the manual reset input, will activate
the reset function.
The reset output is asserted any time /MR is asserted, or if VIN or VDD drops
below the corresponding threshold voltage. The reset output remains asserted
for tRST(min) after VIN and/or VDD subsequently return above the threshold
boundaries and/or /MR is released. A reset pulse is also generated at power-
on. Hysteresis is included in the comparators to prevent chattering of the
output due to noise.
MR, Manual Reset Input
The ability to initiate a reset via external logic or a manual switch is provided in addition to the MIC2774’s automatic supervisory functions. Driving the /MR input to a logic low causes an immediate and unconditional reset to occur. Assuming VIN and VDD are within tolerance when /MR is released (returns high), the reset output will be de-asserted no less than tRST later. /MR may be driven by a logic signal or mechanical switch. Typically, a momentary push- button switch is connected such that /MR is shorted to ground when the switch contacts close. Switch de-bouncing is performed internally; the switch may be connected directly between /MR and GND. /MR is internally pulled up to VDD and may be left open if unused.
APPLICATION INFORMATION
Programming the Voltage Threshold
Referring to the Typical Application Circuit, the voltage threshold on the IN pin is calculated as follows:
EQUATION 4-1:
In order to provide the additional criteria needed to solve for the resistor values, the resistors can be selected such that the two resistors have a given total value; that is, R1 + R2 = RTOTAL. Imposing this condition on the resistor values provides two equations that can be solved for the two unknown resistor values. A value such as 1 MΩ for RTOTAL is a reasonable choice because it keeps quiescent current to a generally acceptable level while not causing any measurable errors due to input bias currents. The larger the resistors, the larger the potential errors due to input bias current (IIN). The maximum recommended value of RTOTAL is 3 MΩ.
Applying this criteria and rearranging the VIH expression to solve for the resistor values gives:
EQUATION 4-2:
Application Example
Figure 4-1 illustrates a hypothetical MIC2774L-23 application in which the
MIC2774L-23 is used to monitor the core and I/O supplies of ahigh-performance
CPU or DSP. The core supply, VCORE, in the example is 1.0V ±5%. The main power
rail and I/O voltage, VI/O, is 2.5V ±5%. As shown in
Figure 4-1, the MIC2774 is powered by VI/O. The minimum value of VI/O is 2.5V
– 5% = 2.375V; the maximum is 2.5V + 5% = 2.625V. This is well within the
device’s supply range of 1.5V to 5.5V.
Resistors R1 and R2 must be selected to correspond to the VCORE supply of
1.0V. The goal is to ensure that the core supply voltage is adequate to ensure
proper operation; i.e., VCORE ≥ (1.0V – 5%) = 0.950V. Because there is always
a small degree of uncertainty due to the accuracy of the resistors, variations
in the device’s voltage reference, etc., the threshold will be set slightly
below this value. The potential variation in the MIC2774’s voltage reference
(VREF) is specified as ±1.5%. The resistors chosen will have their own
tolerance specifications. This example assumes the use of 1% accurate
resistors. The potential worst-case error contribution due to input bias
current can be calculated once the resistor values are chosen. If the
guidelines above regarding the maximum total value of R1 + R2 are followed,
this error contribution will be very small thanks to the MIC2774’s very low
input bias current.
To summarize, the various potential error sources are:
- Variation in VREF: specified at ±1.5%
- Resistor tolerance: chosen by designer (typically ≤±1%)
- Input bias current, IIN: calculated once resistor values are known, typically very small
Taking the various potential error sources into account, the threshold voltage
will be set slight below the minimum VCORE specification of 0.950V so that
when the actual threshold voltage is at its maximum, it will not intrude into
the normal operating range of VCORE. The target threshold voltage will be set
as follows:
Given that the total tolerance on VTH for the IN pin is [VREF tolerance] +
[resistor tolerance]
= ±1.5% + ±1% = ±2.5%, and VTH(max) = VCORE(min), then VCORE(min) = VTH + 2.5% VTH = 1.025 VTH, therefore, solving for VTH results in
EQUATION 4-3:
Solving for R1 and R2 using this value for VTH and the equations above yields: R1 = 676.3 kΩ ≈ 673 kΩ R2 = 323.7 kΩ ≈ 324 kΩ The resulting circuit is shown in Figure 4-1.
Input Bias Current Effects
Now that the resistor values are known, it is possible to calculate the maximum potential error due to input bias current, IIN. As shown in the Electrical Characteristics table, the maximum value of IIN is 10 nA. Note that the typical value is a much smaller 5 pA. The magnitude of the offset caused by IIN is given by.
EQUATION 4-4:
VERROR = IIN(max) × (R1||R2)
VERROR = ±1×10-8A × 2.189×105Ω
VERROR = ±2.189×10-3V
VERROR = ±2.189 mV
The typical error is about three orders of magnitude lower than this—close to one microvolt. Generally, the error due to input bias can be discounted. If it is to be taken into account, simply adjust the target threshold voltage downward by this amount and recalculate R1 and R2. The resulting value will be very close to optimum. If accuracy is more important than the quiescent current in the resistors, simply reduce the value of RTOTAL to minimize offset errors.
Transient Response
The MIC2774 is inherently immune to very short negative-going glitches. Very
brief transients may exceed the voltage thresholds without tripping the
output.
In general, as shown in Figure 4-3 and Figure 4-4, the narrower the transient,
the deeper the threshold overdrive that the MIC2774 will ignore. The graphs
represent the typical allowable transient duration for a given amount of
threshold overdrive that will not generate a reset.
Response.
Ensuring Proper Operation at Low Supply
At VDD levels below 1.2V, the MIC2774’s reset output cannot turn on
sufficiently to produce a valid logic-low on /RST. In this situation, circuits
driven by /RST could be allowed to float, causing undesired operation. In most
cases, however, it is expected that the circuits driven by the MIC2774L will
be similarly inoperative at VDD ≤ 1.2V.
If a given application requires that /RST be valid below VDD = 1.2V, this can
be accomplished by adding a pull-down resistor to the /RST output. A value of
100 kΩ is recommended because this is usually an acceptable compromise of
quiescent current and pull-down current. The resistor’s value is not critical,
however. See Figure 4-5.
These statements also apply to the MIC2774H’s RST output. That is, to ensure
valid RST signal levels at VDD < 1.2V, a pull-up resistor (as opposed to a
pull-down) should be added to the RST output. A value of 100 kΩ is typical for
this application, as well. See Figure 4-6.
PACKAGING INFORMATION
Package Marking Information
Legend: XX…X Product code or customer-specific information Y
Year code (last digit of calendar year)
YY : Year code (last 2 digits of calendar year) WW Week code (week of January
1 is week ‘01’)
NNN Alphanumeric traceability code
e3 Pb-free JEDEC® designator for Matte Tin (Sn)
***** This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be
found on the outer packaging for this package.
, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo.
Underbar (_) and/or Overbar (‾) symbol may not be to scale.
STANDARD VOLTAGE OPTIONS
Voltage Code| Typical Application (V DD )| Nominal
Threshold Voltage (V TH )
---|---|---
46| 5.0V ±5%| 4.68V
44| 5.0V ±10%| 4.43V
31| 3.3V ±5%| 3.09V
29| 3.3V ±10%| 2.93V
28| 3.0V ±5%| 2.81V
26| 2.85V ±5%| 2.67V
25| 2.7V ±5%| 2.53V
23| 2.5V ±5%| 2.34V
22| 2.4V ±5%| 2.25V
17| 1.8V ±5%| 1.69V
5-Lead SOT-23 Package Outline and Recommended Land Pattern
TITLE 5 LEAD SOT23 PACKAGE OUTLINE & RECOMMENDED LAND PATTERN
DRAWING I
UNIT
NOTE:
- 1. PACKAGE OUTUNE EXCLUSIVE OF MOLD FLASH & BURR.
- PACKAGE OUTLINE INCLUSIVE OF SOLER PLATING.
- DIMENSION AND TOLERANCE PER ANSI Y14.5M. 1982.
- . FOOT LENGTH MEASUREMENT BASED ON GAUGE PLANE METHOD.
- DIE FACES UP FOR MOLD. AND FACES DOWN FOR TRIM/FORM
- ALL DIMENSIONS ARE IN MILUMETERS.
Note: For !he most current package drawings, please see the Microchip Packaging Speclllcation located at hltp://www.microch1p .comlpackagi ng.
APPENDIX A: REVISION HISTORY
Revision A (May 2022)
- Converted Micrel document MIC2774 to Microchip data sheet template DS20006527A.
- Minor grammatical text changes throughout.
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