RENESAS RZ/G2UL Evaluation Board Kit User Guide
- June 9, 2024
- RENESAS
Table of Contents
RENESAS RZ/G2UL Evaluation Board Kit
Information
This guide describes the points to note for designing PCBs with RZ/G2UL Type-1
or RZ/A3UL or RZ/Five which have compatibility pin arraignment.
Target Device
- RZ/G2UL Type-1
- RZ/A3UL
- RZ/Five 13mmsq
Introduction
RZ/G2UL Type-11, RZ/A3UL and RZ/Five2 are offered same package with 361-pin
BGA, 13-mm square, 0.5-mm pitch.
PCBs can be designed to be compatible with these devices.
This document shows the differences of these devices in ball assignments,
especially those that need attention in PCB design.
Please refer to their Hardware Manual and other documents as well.
- Note 1. RZ/G2UL has 2-packages, Type-1 and Type-2. Tyep-1 is compatible with RZ/Five 13-mm square. Tyep-2 is compatible with RZ/G2LC.
- Note 2. RZ/Five has 2-packages, 13-mm square and 11-mm square.
Differences of Their Pin Arraignment
The following table shows the differences of the pin arraignment of the three
devices. In this table, pin addresses are shown with curly brackets.
Then, the following three figures show BGA package ball views of the three
devices.
Table 2.1 Differences of their pin arraignment
RZ/G2UL Type-1 Ball View
RZ/A3UL Ball View
RZ/Five 13mmsq Ball View
Considerations for WDT on RZ/Five
The RZ/Five has no dedicated pins for a Watch Dog Timer (WDT) function, while
the RZ/G2UL and the RZ/A3UL
have the one. Therefore, there are some considerations if you’d like to use
the WDT on the RZ/Five.
Table 3.1 shows the summary of considerations for the WDT on the RZ/Five. The
A6 and the F3 pins have other functions besides the WDT. The A2 has no other
functions for the RZ/G2UL and the RZ/Five, while another function for the
RZ/A3UL. We recommend to use the A2 as the WDT when designing compatible PCBs
for RZ/G2UL and RZ/Five. In other case such as all three products compatible
PCBs, perfect compatibility might not be realized. On the A6, the WDT function
cannot be used if the QSPI write protect (WP) is needed. If you don’t use the
WP, both the WDT
and the QSPI interface can be used simultaneously. On the F3, the WDT and the
SD0_DATA7 used for eMMC are exclusive.
Note that the A6 is used as WDT in the design of Evaluation board Kit for
these products. You should modify the design when reuse the EVK design.
Table 3.1 Considerations for WDT on RZ/Five
General Precautions in the Handling of Microprocessing Unit and
Microcontroller Unit Products
The following usage notes are applicable to all Microprocessing unit and
Microcontroller unit products from Renesas. For detailed usage notes on the
products covered by this document, refer to the relevant sections of the
document as well as any technical updates that have been issued for the
products.
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Precaution against Electrostatic Discharge (ESD)
A strong electrical field, when exposed to a CMOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop the generation of static electricity as much as possible, and quickly dissipate it when it occurs. Environmental control must be adequate. When it is dry, a humidifier should be used. This is recommended to avoid using insulators that can easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors must be grounded. The operator must also be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions must be taken for printed circuit boards with mounted semiconductor devices. -
Processing at power-on
The state of the product is undefined at the time when power is supplied. The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the time when power is supplied. In a finished product where the reset signal is applied to the external reset pin, the states of pins are not guaranteed from the time when power is supplied until the reset process is completed. In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function are not guaranteed from the time when power is supplied until the power reaches the level at which resetting is specified. -
Input of signal during power-off state
Do not input signals or an I/O pull-up power supply while the device is powered off. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Follow the guideline for input signal during power-off state as described in your product documentation. -
Handling of unused pins
Handle unused pins in accordance with the directions given under handling of unused pins in the manual. The input pins of CMOS products are generally in the high-impedance state. In operation with an unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of the LSI, an associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal become possible. -
Clock signals
After applying a reset, only release the reset line after the operating clock signal becomes stable. When switching the clock signal during program execution, wait until the target clock signal is stabilized. When the clock signal is generated with an external resonator or from an external oscillator during a reset, ensure that the reset line is only released after full stabilization of the clock signal. Additionally, when switching to a clock signal produced with an external resonator or by an external oscillator while program execution is in progress, wait until the target clock signal is stable. -
Voltage application waveform at input pin
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL
(Max.) and VIH (Min.) due to noise, for example, the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (Max.) and VIH (Min.). -
Prohibition of access to reserved addresses
Access to reserved addresses is prohibited. The reserved addresses are provided for possible future expansion of functions. Do not access these addresses as the correct operation of the LSI is not guaranteed. -
Differences between products
Before changing from one product to another, for example to a product with a different part number, confirm that the change will not lead to problems. The characteristics of a microprocessing unit or microcontroller unit products in the same group but having a different part number might differ in terms of internal memory capacity, layout pattern, and other factors, which can affect the ranges of electrical characteristics, such as characteristic values, operating margins, immunity to noise, and amount of radiated noise. When changing to a product with a different part number, implement a system- evaluation test for the given product.
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