RENESAS RTKA788152DE0000BU 5V Half-Duplex RS-485 Transceivers Evaluation Board Instruction Manual

June 4, 2024
RENESAS

RENESAS RTKA788152DE0000BU 5V Half-Duplex RS-485 Transceivers Evaluation

Board Instruction Manual

Board Design.jpg

RTKA788152DE0000BU, the RS-485 evaluation board, allows you to evaluate the half-duplex transceivers of the RAA78815x family of RS-485 transceivers.

Specifications

  • 4.5V to 5.5V Supply Voltage
  • 115kbps Half-Duplex Transceiver RAA788152

Features

  • Single 115kbps Half-Duplex Transceiver
  • RAA788152 (115kbps version currently installed) can be unsoldered and replaced by RAA788155 (1Mbps version) or RAA788158 (20Mbps version)
  • Place holders for fail-safe biasing resistors
  • Configuration jumpers to operate the transceiver as transmitter or receiver, or as a transmitter with loopback

FIG 1 Block Diagram.JPG

Figure 1. Block Diagram

1. Functional Description

FIG 2 Typical Operating Circuits of Half-Duplex and Full-Duplex
Transceivers.JPG

Figure 2. Typical Operating Circuits of Half-Duplex and Full-Duplex Transceivers

1.1 Operational Characteristics
1.1.1 Driver Operation
A logic high at the driver enable pin (DE) activates the driver and causes the differential driver outputs (Y and Z) to follow the logic states at the data input (DI). A logic high at DI causes Y to turn high and Z to turn low. In this case, the differential output voltage, defined as VOD = VY – VZ, is positive. A logic low at DI reverses the output states reverse, turning Y low and Z high, therefore, making VOD negative. A logic low at DE disables the driver, making Y and Z high-impedance. In this condition, the logic state at DI is irrelevant. To ensure the driver remains disabled after device power-up, Renesas recommends connecting DE through a 1kΩ to 10kΩ pull-down resistor to ground.

Table 1. Driver Truth Table

FIG 3 Driver Truth Table.JPG

1.1.2 Receiver Operation
A logic low at the receiver enable pin (RE) activates the receiver and causes its output (RO) to follow the bus voltage at the differential receiver inputs (A and B); the bus voltage is defined as VAB = VA – VB. For VAB ≥ -0.05V, RO turns high, and for VAB ≤ -0.2V, RO turns low. For input voltages between -50mV and -200mV, the state of RO is undetermined, and therefore can be high or low. A logic high at RE disables the receiver, making RO highimpedance. In this condition, the polarity and magnitude of the input voltage is irrelevant. To ensure the receiver
output remains high when the receiver is disabled, Renesas recommends connecting RO, using a 1kΩ to 10kΩ pull-up resistor to VCC. To enable the receiver to immediately monitor the bus traffic after device power- up, connect RE through a 1kΩ to 10kΩ pull-down resistor to ground.

Table 2. Receiver Truth Table

FIG 4 Receiver Truth Table.JPG

1.2 Bus and Receiver Output Voltages
1.2.1 Set Up
Before connecting measurement equipment, set up the evaluation board and make sure to remove the JP1 socket, which is a jumper connection between two output channels A/Y and B/Z. Removal of JP1 socket allows for measurement of output voltage across driver outputs. Follow the schematic diagram to enable driver by placing sockets to connect DE_J positions 1 and 2. Enable the receiver by placing the socket to connect RE#_J positions 7 and 8. Placing a socket between positions 1 and 2 connects the Driver Enable function to VCC and activates the
driver. Otherwise, placing a socket between positions 7 and 8 connects the Receiver Enable function to ground, and because this function is inverted, the receiver is activated. To ensure there is voltage across the bus, attach the load resistor of 60Ω over the A/Y and B/Z channels. Without this resistive load, the bus is an open circuit. Therefore, no voltage reading would be across the bus.

Attach VCC to the power supply and set the voltage to 5VDC. Attach the Oscilloscope channel 1 and channel 2 probes to the A/Y and B/Z channels accordingly for bus voltage reading. For channel 3, attach to RO for receiver output voltage reading. Connect the pulse generator to driver input (DI) and set it up for square wave function.

FIG 5 Bus and Receiver Output Voltages.JPG

Figure 3. Setup for Bus and Receiver Output Voltage Measurement with Oscilloscope, Power Supply, and Function Generator

1.2.2 Measurement Graphs

FIG 6 Measurement Graphs.JPG

Figure 4. Driver Input Voltage vs Time

FIG 7 A Y Channel Output Voltage vs Time.JPG

Figure 5. A/Y Channel Output Voltage vs Time

FIG 8 B Z Channel Output Voltage vs Time.JPG

Figure 6. B/Z Channel Output Voltage vs Time

FIG 9 Bus Output Voltages vs Time.JPG

Figure 7. Bus Output Voltages vs Time

FIG 10 Receiver Output Voltage vs Time.JPG

Figure 8. Receiver Output Voltage vs Time

FIG 11 Driver Input Voltage vs Receiver Output
Voltage.JPG

Figure 9. Driver Input Voltage vs Receiver Output Voltage

FIG 12 Bus Output Voltage vs Receiver Output
Voltage.JPG

Figure 10. Bus Output Voltage vs Receiver Output Voltage

2. Board Design

FIG 13 Board Design.jpg

Figure 11. RTKA788152DE0000BU Evaluation Board (Top)

2.1 Schematic Diagrams

FIG 13 RTKA788152DE0000BU Schematic.JPG

Figure 12. RTKA788152DE0000BU Schematic

2.2 Bill of Materials

FIG 15 Bill of Materials.JPG

FIG 16 Bill of Materials.JPG

2.3 Board Layout

FIG 17 Board Layout.JPG

FIG 18 Top Silkscreen.JPG

Figure 15. Top Silkscreen

3. Ordering Information

FIG 19 Ordering Information.JPG

4. Revision History

FIG 20 Revision History.JPG

IMPORTANT NOTICE AND DISCLAIMER

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These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for
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