onsemi NVBLS1D1N08H Power Single N-Channel MOSFET Owner’s Manual

August 15, 2024
onsemi

onsemi NVBLS1D1N08H Power Single N-Channel MOSFET

Specifications

  • Model: NVBLS1D1N08H
  • Power: 80 V, 1.05 mW
  • Current: 351 A

Product Information

This MOSFET is a single N-channel power transistor with a TOLL case designed for high-power applications. It features a drain-to-source voltage of 80V and a continuous drain current of 351A, suitable for demanding electrical circuits.

Features

  • Drain-to-Source Voltage: 80V
  • Continuous Drain Current: 351A
  • Power Dissipation: 1.05 mW

Product Usage Instructions

Installation

  1. Ensure proper heat sinking for efficient heat dissipation.
  2. Connect the drain, gate, and source pins as per the circuit diagram.

Operation

  1. Apply the appropriate gate-to-source voltage to control the switching of the MOSFET.
  2. Avoid exceeding the maximum ratings to prevent damage to the device.

Maintenance

  1. Regularly inspect for any signs of overheating or damage.
  2. Keep the MOSFET clean and free from dust or debris that may affect its performance.

FAQs
Q: What are the typical applications of this MOSFET
A: The MOSFET is commonly used in high-power circuits, motor control systems, inverters, and other applications where high current handling and voltage requirements are necessary.

MOSFET – Power, Single
N-Channel, TOLL
80 V, 1.05 m, 351 A

NVBLS1D1N08H

Features

  • Low RDS(on) to Minimize Conduction Losses
  • Low QG and Capacitance to Minimize Driver Losses
  • AEC−Q101 Qualified and PPAP Capable
  • Lowers Switching Noise/EMI
  • These Devices are Pb−Free and are RoHS Compliant Typical Applications
  • Power Tools, Battery Operated Vacuums
  • UAV/Drones, Material Handling
  • BMS/Storage, Home Automation

MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)

Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 80 V
Gate−to−Source Voltage VGS ±20 V
Continuous Drain Current R8JC (Notes 1, 3)

Steady State

| TC = 25°C| ID| 351| A
TC = 100°C| 248
Power Dissipation R8JC (Note 1)| TC = 25°C| PD| 311| W
TC = 100°C| 156
Continuous Drain Current R8JA (Notes 1, 2, 3)|

Steady State

| TA = 25°C| ID| 41| A
TA = 100°C| 29
Power Dissipation R8JA (Notes 1, 2)| TA = 25°C| PD| 4.2| W
TA = 100°C| 2.1
Pulsed Drain Current| TA = 25°C, tp = 10 µs| IDM| 900| A
Operating Junction and Storage Temperature Range| TJ, Tstg| − 55 to

+175

| °C
Source Current (Body Diode)| IS| 259| A
Single Pulse Drain−to−Source Avalanche Energy (IL(pk) = 31.9 A)| EAS| 1580| mJ
Lead Temperature for Soldering Purposes (1/8² from case for 10 s)| TL| 260| °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit
Junction−to−Case − Steady State R8JC 0.48 °C/W
Junction−to−Ambient − Steady State (Note 2) R8JA 35.8
  1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted.
  2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
  3. Maximum current for pulses as long as 1 second is higher but is dependent on pulse duration and duty cycle.

www.onsemi.com

V (BR)DSS R DS(ON) MAX I D MAX
80 V 1.05 mQ @ 10 V 351 A

ORDERING INFORMATION
See detailed ordering, marking and shipping information in the package dimensions section on page 5 of this data sheet.

NVBLS1D1N08H
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)

Parameter| Symbol| Test Condition| Min| Typ| Max| Unit
---|---|---|---|---|---|---

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 µA 80 V
Drain−to−Source Breakdown Voltage Temperature Coefficient V(br)dss/ Tj
57 mV/°C
Zero Gate Voltage Drain Current IDSS VGS = 0 V, VDS = 80 V TJ = 25 °C
10 ****

µA

TJ = 125°C| | | 250
Gate−to−Source Leakage Current| IGSS| VDS = 0 V, VGS = 20 V| | | 100| nA

ON CHARACTERISTICS (Note 4)

Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 650 µA 2.0 2.9 4.0 V
Threshold Temperature Coefficient VGS(TH)/TJ −7.7 mV/°C
Drain−to−Source On Resistance RDS(on) VGS = 10 V ID = 50 A 0.92 1.05

mQ
Forward Transconductance| gFS| VDS =5 V, ID = 50 A| | 213| | S

CHARGES, CAPACITANCES & GATE RESISTANCE

Input Capacitance| CISS| VGS = 0 V, f = 1 MHz, VDS = 40 V| | 11200| | ****

pF

---|---|---|---|---|---|---
Output Capacitance| COSS| | 1600|
Reverse Transfer Capacitance| CRSS| | 49|
Total Gate Charge| QG(TOT)| VGS = 10 V, VDS = 64 V; ID = 50 A| | 166| | ****


nC

Threshold Gate Charge| QG(TH)| | 29|
Gate−to−Source Charge| QGS| | 44|
Gate−to−Drain Charge| QGD| | 35|
Plateau Voltage| VGP| | 4| | V

SWITCHING CHARACTERISTICS (Note 5)

Turn−On Delay Time| td(ON)| VGS = 10 V, VDS = 64 V, ID = 50 A, RG = 6 Q| | 45| |

ns

---|---|---|---|---|---|---
Rise Time| tr| | 43|
Turn−Off Delay Time| td(OFF)| | 141|
Fall Time| tf| | 43|

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage| VSD| VGS = 0 V, IS = 50 A| TJ = 25°C| | 0.76| 1.2|


V

---|---|---|---|---|---|---|---
TJ = 125°C| | 0.6|
Reverse Recovery Time| tRR| VGS = 0 V, dIS/dt = 100 A/µs, IS = 50 A| | 92| | ns
Reverse Recovery Charge| QRR| | 234| | nC

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

  • Pulse Test: pulse width  300 s, duty cycle  2%.
  • Switching characteristics are independent of operating junction temperatures.

NVBLS1D1N08H

TYPICAL CHARACTERISTICS

DEVICE ORDERING INFORMATION

Device Marking Package Shipping
NVBLS1D1N08H NVBLS 1D1N08H M0−299A

(Pb−Free)

| 2000 / Tape & Reel

For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

LAND PATTERN RECOMMENDATION
*FOR ADDITIONAL INFORMATION ON OUR PB-FREE STRATEGY AND SOLDERING DETAILS, PLEASE DOWNLOAD THE ON SEMICONDUCTOR SOLDERING AND MOUNTING TECHNIQUES REFERENCE MANUAL, SOLDERRM/D.

  • A = Assembly Location
  • Y = Year
  • WW = Work Week
  • ZZ = Assembly Lot Code
  • XXXX = Specific Device Code

*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “”, may or may not be present. Some products may not follow the Generic Marking.

  1. PACKAGE STANDARD REFERENCE: JEDEC MO-299, ISSUE A.
  2. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 2009.
  3. CONTROLLING DIMENSION: MILLIMETERS.
  4. COPLANARITY APPLIES TO THE EXPOSED WELL AS THE TERMINALS.
  5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.
  6. SEATING PLANE IS DEFINED BY THE TERMINALS. “A1” IS DEFINED AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT ON THE PACKAGE BODY.

DOCUMENT NUMBER:| 98AON13813G| Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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DESCRIPTION:| H PSOF8L 11.68×9.80| PAGE 1 OF 1

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