WALLYS DR6018-S WiFi 6 Multi-function IPQ 6018 Embedded Board Owner’s Manual
- June 12, 2024
- WALLYS
Table of Contents
WALLYS DR6018-S WiFi 6 Multi-function IPQ 6018 Embedded Board
Product Information
The DR6018-S is an embedded board with dual-band dual-concurrent capabilities. It features a quad-core ARM 64-bit A53 processor running at 1.8GHz, 1GB of DDR3L system memory, and 8MB NOR Flash and 256MB NAND Flash storage. The board supports Dynamic Frequency Selection (DFS) and has a 2×2 on-board 2.4GHz radio with a physical data rate of up to 573Mbps, as well as a 2×2 on-board 5GHz radio with a physical data rate of up to 1201Mbps.
This product is designed for various applications such as 802.11ax MU-MIMO
OFDMA access points, mesh routers supporting EasyMesh, hotel wireless
applications, smart AP TWT, and more. It is based on the IPQ6010 chipset and
is specifically designed to
provide high-bandwidth video streaming, voice, and data transmission in
challenging RF environments like offices, factories, and warehouses.
The product has a dimension of 120mm x 105mm x 20mm and comes with various
hardware specifications. It features a Qualcomm-Atheros IPQ6010 CPU, 1GB
system memory, Ethernet ports with POE support, NGFF and SD card slots, USB
3.0 port, LED header,
serial port, wireless capabilities with MMCX connectors, and optional GPS
support.
Product Usage Instructions
- Connect the DR6018-S board to a power supply with a voltage rating between 24V and 48V using the DC Jack.
- Ensure that the operating temperature remains within the range of -40°C to +70°C and the storage temperature within the range of -45°C to +105°C.
- Maintain the operating humidity between 5% and 95% (non-condensing) and the storage humidity between 0% and 90% (non-condensing).
- Make sure to properly install any optional components such as SD cards or USB devices into their respective slots/ports.
- If using the POE feature, connect the appropriate Ethernet cables to the designated ports.
- For wireless functionality, ensure that the MMCX connectors are securely connected to the appropriate antennas.
- Refer to the provided documentation for further instructions on configuring and utilizing the various features of the DR6018-S board.
For more information and support, visit the official website at http://www.wallystech.com
Features
- Quad-core ARM 64bit A53@1.8GHzProcessor
- 1GB DDRL3L System Memory
- 8MB NOR Flash, 256MB NAND Flash
- Supports Dynamic Frequency Selection (DFS
- 2x2On-board2.4GHzradio,upto 573Mbps physical Data Rate
- 2x2On-board5GHzradio, upto 1201Mbps physical Data Rate
Applications
- 802. 1 1ax MU-MIMO OFDMA Access Point
- MeshroutersupportingEasyMeshHotelWireless application
- Smart AP TWT
Product Description
DR60 1 8 – S based on IPQ60 1 0 chipset is an enterprise wireless module
integrated with 2 x2 5G high power Radio module and 2×2 2.4G high power Radio
module designed specifically to provide users with mobile access to high-
bandwidth video streaming,voice, and data transmission for office and
challenging RF environment in factories, warehouse establishment.
Absolute Maximum Rating
Parameter | Rating | Unit |
---|---|---|
Supply Voltage | 24V~48V(DC Jack) | V |
Operating Temperature Range | -40 to +70 | ºC |
Storage Temperature Range | -45 to +105 | ºC |
Operating Humidity Range | 5 to +95 (non-condensing) | % |
Storage Humidity Range | 0 to +90 (non-condensing) | % |
Hardware Specifications
Symbol | Parameter |
---|
CPU
| Qualcomm- Atheros IPQ6010
CPU Frequency| Quad-core ARM 64 bit A53 @ 1.8 GHz processor
System Memory
| 1GB (2x 512MB) DDR3L 16-bit interface with 32-bit memory bus design
Ethernet Port| 1 x 1Gbps Ethernet Ports & POE 1 x 1Gbps Ethernet Ports
NGFF Slot| M.2 (NGFF) “E Key” Socket with MiniPCIe 3.0(For WiFi Module)
SD Card Slot| 1x SD Card Slot(Option)
USB / header| 1x USB 3.0 Port(Option)
POE| 24V~48V passive POE/Active POE(Suport 802.3bt)
DC Jack| 24V~48V power supply
LED header| 2.0 pitch pin header
Serial Port| 1x Serial Port 4 Pin Connector
Wireless
| On-board2x22.4GHz MU-MIMO OFDMA802. 11b/g/n/ax,max 23dBm per chain
On-board2x25GHz MU-MIMOOFDMA 802. 11a/n/ac/ax,max 20dBm per chain
4 x MMCX Connectors
Nor Flash| 8MB
Nand Flash| 256MB
DDR| 256MB~512MB
Dimension| 120mm x 105mm x 20mm
GPS| Support( Option)
| MCS11| 13dBm| 16dbm| ±2dB
---|---|---|---|---
Radio TX Specifications(5180MHz-5825MHz)
Operating
Mode
| Data Rate| Power| Tolerance
---|---|---|---
1 Chain| 2 Chains
2.4Ghz 802. 1 1ax HE20
| MCS0| 23dbm| 26dbm| ±2dB
MCS1| 23dBm| 26dBm| ±2dB
MCS2| 23dBm| 26dBm| ±2dB
MCS3| 23dBm| 26dBm| ±2dB
MCS4| 23dBm| 26dBm| ±2dB
MCS5| 23dBm| 26dBm| ±2dB
MCS6| 23dBm| 26dBm| ±2dB
MCS7| 22dBm| 25dBm| ±2dB
MCS8| 21dBm| 24dBm| ±2dB
MCS9| 21dBm| 24dBm| ±2dB
MCS10| 18dBm| 21dBm| ±2dB
MCS11| 17dbm| 20dbm| ±2dB
2.4Ghz 802. 1 1ax HE40
| MCS0| 23dbm| 26dbm| ±2dB
MCS1| 23dBm| 26dBm| ±2dB
MCS2| 23dBm| 26dBm| ±2dB
MCS3| 23dBm| 26dBm| ±2dB
MCS4| 23dBm| 26dBm| ±2dB
MCS5| 23dBm| 26dBm| ±2dB
MCS6| 23dBm| 26dBm| ±2dB
MCS7| 22dBm| 25dBm| ±2dB
MCS8| 21dBm| 24dBm| ±2dB
MCS9| 21dBm| 24dBm| ±2dB
MCS10| 21dBm| 24dBm| ±2dB
MCS11| 19dbm| 22dbm| ±2dB
Interface MAP
Block diagram
GPIO Pin Mapping
GPIO Pin Mapping
Pin Signal Pin Signal
GPIO0| AUDIO MUTE_ BUT| GPIO1| QPIC BUSY _ N
GPIO2| MIC VOL_ M| GPIO3| QPIC WE_ N
GPIO4| QPIC RE_ N| GPIO5| QPIC DAT4
GPIO6| QPIC DAT5| GPIO7| QPIC DAT6
GPIO8| QPIC DAT7| GPIO_9| WPS
GPIO10| QPIC CLE_ N| GPIO1 1| QPIC NAND CE N
GPIO12| QPIC DAT1| GPIO13| QPIC DAT2
GPIO14| QPIC DAT3| GPIO15| QPIC DAT0
GPIO16| MIC KPD PWR N| GPIO17| QPIC ALE
GPIO18| KYPD HOME_N| GPIO_19| GND
GPIO20| Boot Config( PULL_ DOWN)| GPIO21| MUTE ON
GPIO22| ADC RST| GPIO23| WSA SWR_ CLK
GPIO24| WSA SWR_ DATA| GPIO25| PWM LED_ RST
GPIO26| Boot Config( PULL_ DOWN)| GPIO_27| WSAEN R
GPIO_28| WSAEN L| GPIO29| PDM CLK0
GPIO30| PDM DATA0| GPIO31| PDM CLK1
GPIO32| PDM DATA1| GPIO33| EXT MCLK2 _ ADC
GPIO34| MIC VOL_ P| GPIO_35| LED_5G
GPIO36| PCIE0 WAKE| GPIO37| LED 2GS
GPIO38| SPI0 CLK| GPIO39| SPI0 CS_NI
---|---|---|---
GPIO40| SPI0 MISO| GPIO41| SPI0 MOSI
GPIO42| BLSP2 SCL| GPIO43| BLSP2 SDA
GPIO44| BLSP2 UART_RX| GPIO45| BLSP2 UART_TX
GPIO46| BLSP5 SCL| GPIO47| BLSP5 SDA
GPIO_48| NC| GPIO49| Boot Config( PULL_ DOWN)
GPIO50| LED USB0| GPIO51| BT PRIORITY _PTA11
GPIO_52| WLA_ACTI_PTA12| GPIO53| BT ACT_PTA10
GPIO54| Boot Config( PULL_ DOWN)| GPIO_55| NC
GPIO_56| NC| GPIO_57| NC
GPIO_58|
NC
| GPIO59| PCIE0 CLK_ REQ
---|---|---|---
GPIO_60| PCIE0 RSTn| GPIO_61| NC
GPIO62| SD DET| GPIO63| SD WP
GPIO_64| MDC| GPIO_65| MDIO
GPIO66| SD LDO_ EN| GPIO_67| NC
GPIO_68| NC| GPIO_69| SPI CLK UART RTSn
GPIO_70| SPI CS UART CTSn| GPIO71| SPI MISO_ UART_RX
GPIO72| SPI MOSI_ UART_TX| GPIO73| USB OTG
GPIO_74| NC| GPIO_75| Malibu RESET
GPIO76| NAPA INT0| GPIO77| NAPA RESET
GPIO78| QTZ INT| GPIO79| QTZ RESET
Boot Config Switch
S7A
| | ****
Boot_ Config S7B
| Boot_Config Switch1(S7)
Boot up Interface Select
S7C
---|---|---|---
0| 0| 0| SPI NOR. (Default)
0| 0| 1| eMMC
0| 1| 0| QPIC, Parallel NAND
0| 1| 1| USB3.0
1
| | ****
0
| ****
0
| ****
SPI-NOR-GPT
| | S7D| | Boot up Interface Select
| | 0| | Boot from code ram (Default)
| | ****
1
| | ****
Boot from ROM
| | ****
Boot_ Config
| | Boot_Config Switch2( S9)
Boot up Interface Select
| | 0| | No auth.(Default)
1| Auth is required
References
Read User Manual Online (PDF format)
Read User Manual Online (PDF format) >>