NXP UM11664 SC18IM704-EVB Evaluation Board User Manual

June 4, 2024
NXP

NXP UM11664 SC18IM704-EVB Evaluation Board [

NXP UM11664 SC18IM704-EVB
Evaluation Board PRODUCT](https://manuals.plus/wp- content/uploads/2022/09/NXP-UM11664-SC18IM704-EVB-Evaluation-Board- PRODUCT.png)

Important notice

NXP provides the enclosed product(s) under the following conditions:
This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals. This evaluation board may be used with any development system or other source of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf cables. This evaluation board is not a Reference Design and is not intended to represent a final design recommendation for any particular application. The final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality.

The goods provided may not be complete in terms of the required design, marketing, and or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. For any safety concerns, contact NXP sales and technical support services.

Introduction

SC18IM704 is designed to serve as an interface between the standard UART port of a microcontroller or microprocessor and the serial I2C-bus; this allows the microcontroller or microprocessor to communicate directly with other I2C-bus devices. SC18IM704 can operate as an I2C-bus controller. SC18IM704 controls all the I2C-bus specific sequences, protocol, arbitration and timing. The host communicates with SC18IM704 with ASCII messages protocol; this makes the control sequences from the host to SC18IM704 become very simple.

This document is intended to help the users to quickly setup, configure and operate the SC18IM704-EVB evaluation board in the users’ hardware platform.

Finding kit resources and information on the NXP web site

NXP Semiconductors provides online resources for this evaluation board and its supported device(s) on http://www.nxp.com.
The information page for the SC18IM704-EVB evaluation board is at http://www.nxp.com/SC18IM704-EVB. The information page provides overview information, documentation, parametric, ordering information and a Getting Started tab. The Getting Started tab provides quick-reference information applicable to using the SC18IM704-EVB evaluation board, including the downloadable assets referenced in this document.

Collaborate in the NXP community

The NXP community is for sharing ideas and tips, ask and answer technical questions, and receive input on just about any embedded design topic.
The NXP community is at http://community.nxp.com.

Getting ready

Working with the SC18IM704-EVB evaluation board requires the kit contents.

Kit contents

  • Assembled and tested evaluation board in an anti-static bag
  • Quick Start Guide

Getting to know the hardware

The SC18IM704-EVB evaluation board is designed to be connected to an external UART via a 9-pin RS-232 connector (J1). The SC18IM704-EVB evaluation board has an on-board I2C target serial EEPROM and an I2C target LED blinker, which can be directly accessed by the external host UART via SC18IM704. The external host UART can write, read, and program the serial EEPROM/LED blinker without requiring an I2C target to be connected to the board.

The SC18IM704-EVB evaluation board also has a I2C interface header (JP2) to allow other I2C target devices to be connected to the evaluation board. These I2C target devices can be accessed directly by the external host UART via the SC18IM704 UART to I2C bridge.

The power for the SC18IM704-EVB evaluation board is provided via the micro-B USB (J2), or via the I2C interface header (JP2).
The SC18IM704-EVB evaluation board 9-pin RS-232 port (J1) is intended to be the main UART interface to the host’s UART, but UART TX and RX CMOS level signals are available on JP5. When JP5 is used to interface to the host’s UART then the jumper on JP4 should be removed to remove power from the RS-232 line driver.

Headers and jumpers

Please refer to Figure 1 to find the location of connectors and jumpers on the SC18IM704-EVB evaluation board.NXP UM11664 SC18IM704-EVB Evaluation
Board FIG 1

Jumper settings

Table 1. Jumper settings

Header Jumper on/off Comment
JP3 ON Pull out and insert current meter if SC18IM704 current is to be

measured
JP4| ON| Pull out if UART interface is on JP5

Table 2. JP5 – UART header

JP5 – UART Header Function
1 UART_RX
2 UART_TX
3 GROUND

Table 3. JP2 – I2C header

JP2 – I 2C Header Function
1 SCL
2 GROUND
3 VCC
4 SDA

Table 4. JP1 – GPIO

JP1 – GPIO Function
1 GPIO0
2 GPIO1
3 GPIO2
4 GPIO3
5 GROUND
6 GPIO4
7 GPIO5
8 GPIO6
9 GPIO7
10 GROUND

Schematic, board layout and bill of materials

The schematic, board layout and bill of materials for the SC18IM704-EVB evaluation board are available at http://www.nxp.com/SC18IM704-EVB.

Sample control sequences from the UART host

Register readNXP UM11664 SC18IM704-EVB Evaluation Board FIG
2

Register writeNXP UM11664 SC18IM704-EVB Evaluation Board FIG
3

GPIO as inputNXP UM11664 SC18IM704-EVB Evaluation Board FIG
4

GPIO as outputNXP UM11664 SC18IM704-EVB Evaluation Board FIG
5NXP UM11664
SC18IM704-EVB Evaluation Board FIG 6I2C clock configurationNXP
UM11664 SC18IM704-EVB Evaluation Board FIG 7

On-Board EEPROM write and readNXP UM11664 SC18IM704-EVB Evaluation Board
FIG 8 IM704 should return 0x23 0x34 0x45.

Blinking on-board LEDsNXP UM11664 SC18IM704-EVB Evaluation Board FIG
9

Errata list

Table 5. Errata list

Date Errata Description Demo Impact Solution
None None None

Legal information

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Disclaimers

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References

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