NXP Semiconductors TEA2376 Demo Board User Manual

June 1, 2024
NXP Semiconductors

TEA2376 Demo Board

“`html

Product Information

Specifications:

  • Product Name: TEA2376DB1602v2 300 W interleaved PFC demo
    board

  • Manufacturer: NXP Semiconductors

  • Key Features: Interleaved PFC, Active bridge rectifier,
    Programmable settings, I2C communication

  • Components: TEA2376, TEA2209T, TEA2016DB1514

Product Usage Instructions:

Safety Warning:

The application board is AC-mains voltage powered. Avoid
touching the board while it is connected to the mains voltage and
when it is in operation. An isolated housing is obligatory when
used in uncontrolled, nonlaboratory environments. Galvanic
isolation from the mains phase using a fixed or variable
transformer is always recommended.

Introduction:

Warning: Lethal voltage and fire ignition
hazard. The non-insulated high voltages present when operating this
product constitute a risk of electric shock, personal injury,
death, and/or ignition of fire. This product is intended for
evaluation purposes only and should be operated in a designated
test area by qualified personnel according to local requirements
and labor laws.

The TEA2376 provides high efficiency at all power levels. When
combined with a TEA2209T active bridge rectifier controller, a
TEA2376AT LLC controller, and a TEA19161 SR controller, a
high-performance cost-effective resonant power supply can be
designed to meet modern efficiency regulations.

TEA2376 Pinning Diagrams:

FAQ (Frequently Asked Questions):

Q: Is this product suitable for use in residential

environments?

A: No, this product is recommended for engineering development
or evaluation purposes only and should be used in controlled test
environments.

Q: Can the TEA2376DB1602v2 board be operated unattended?

A: No, the product should never be operated unattended due to
the risks associated with non-insulated high voltages.

“`

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board
Rev. 1 — 6 February 2024

User manual

Document information

Information

Content

Keywords

TEA2376, TEA2376DB1602, 300 W, PFC, interleaved, controller, converter, burst mode, shedding, efficiency, power supply, demo board, TEA2209T, active bridge rectifier, programmable settings, I2C, TEA2016DB1514, RDK01DB1563, TEA2376DB1011

Abstract

The TEA2376 is a digital configurable two-phase interleaved PFC controller for high efficiency power supplies. The PFC operates in discontinuous conduction mode (DCM) or critical conduction mode (CCM) with valley switching to optimize efficiency. The TEA2376 allows you to build an interleaved power factor converter, which is easy to design with a low number of external components. The digital architecture is based on a configurable hardware state machine ensuring reliable real-time performance. During power supply development, many PFC controller operation and protection settings can be customized by loading new settings into the device using I2C to meet specific application requirements. Input current shaping is used for a high power factor and a low THD. For a low-load operation with good efficiency, phase shedding and burst mode operation are included. In the burst mode, the power consumption of the IC is reduced. The TEA2376 contains many protections, such as internal and external overtemperature protection (OTP), overcurrent protection (OCP), double overvoltage protections (OVP), inrush current protection (ICP), pin open protection, pin short protection, and phase fail protection. The protections can be configured independently via programmable parameters. The TEA2376DB1602v2 demo board shows an interleaved PFC converter (TEA2376) with an active bridge rectifier (TEA2209T) without heat sinks. The converter can provide 300 W output power in laboratory conditions without forced cooling.

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

1 Important notice
IMPORTANT NOTICE
For engineering development or evaluation purposes only
NXP provides the product under the following conditions: This evaluation kit or reference design is for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals. This evaluation kit or reference design may be used with any development system or other source of I/O signals by connecting it to the host MCU or computer board via off-the-shelf cables. Final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality. The product provided may not be complete in terms of required design, marketing, and or manufacturing related protective considerations, including product safety measures typically found in the end device incorporating the product. Due to the open construction of the product, it is the responsibility of the user to take all appropriate precautions for electric discharge. To minimize risks associated with the customers’ applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. For any safety concerns, contact NXP sales and technical support services.

CAUTION

This product has not undergone formal EMC assessment. It is the responsibility of the user to ensure that any finished assembly complies with applicable regulations on EMC interference. EMC testing, and other testing requirements for CE is the responsibility of the user.

FCC NOTICE: This kit is designed to allow:
1. Product developers to evaluate electronic components, circuitry, or software associated with the kit to determine whether to incorporate such items in a finished product and
2. Software developers to write software applications for use with the end product.
This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
2 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

2 Safety warning
The application board is AC-mains voltage powered. Avoid touching the board while it is connected to the mains voltage and when it is in operation. An isolated housing is obligatory when used in uncontrolled, nonlaboratory environments. Galvanic isolation from the mains phase using a fixed or variable transformer is always recommended.
Figure 1 shows the symbols on how to recognize these devices.

a. Isolated

019aab173

Figure 1.Isolation symbols

b. Not isolated

019aab174

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
3 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

3 Introduction
WARNING
Lethal voltage and fire ignition hazard
The non-insulated high voltages that are present when operating this product, constitute a risk of electric shock, personal injury, death and/or ignition of fire. This product is intended for evaluation purposes only. It shall be operated in a designated test area by personnel qualified according to local requirements and labor laws to work with non-insulated mains voltages and high-voltage circuits. This product shall never be operated unattended.
3.1 TEA2376
The TEA2376 provides high efficiency at all power levels. Together with a TEA2209T active bridge rectifier controller, a TEA2376AT LLC controller, and a TEA19161 SR controller, a high-performance cost-effective resonant power supply can be designed, which meets modern power supply efficiency regulations.
An extensive number of parameter settings can define the operation modes and protections. These settings can be stored/programmed in an internal memory. This feature provides flexibility and ease of design to optimize controller properties to application-specific requirements or even optimize/correct performance during power supply production. At start-up, the IC loads the parameter values for operation. For easy design work during product development, the most extended version, TEA2095, can be used to change settings on the fly.

AUX1 1

10 SNSSRC

GATE1 (SDA) 2

9 GND

VCC 3

IC

8 SNSBOOST

GATE2 (SCL) 4

7 SNSCUR

AUX2 5
a. TEA2376AT (SO10) Figure 2.Pinning diagrams

6 SNSMAINS aaa-047428

AUX1 1

14 SNSSRC

GATE1 2

13 GND

VCC 3

12 SNSBOOST

GATE2 4

IC

11 SNSCUR

AUX2 5

10 SNSMAINS

BURST 6

9 POWERGOOD

SDA 7

8 SCL

a aa- 0 474 3 0

b. TEA2095 (SO14)

3.2 TEA2209T
The TEA2209T is an active bridge rectifier controller replacing the traditional diode bridge. Using the TEA2209T with low-ohmic high-voltage external MOSFETs significantly improves the efficiency of the power converter. The reason is that the typical rectifier diode-forward conduction losses are eliminated. In addition, the TEA2209T includes an X-capacitor discharge function. To reduce power consumption at a standby condition, an external signal via the COMP pin can disable the TEA2209T.

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
4 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

L1 VCCHL 2 GATEHL 3
HVS 4 GATELL 5
VCC 6 GND 7 COMP_POL 8
Figure 3.TEA2209T pinning diagram

16 VR
15 HVS
14 GATEHR
13 VCCHR IC
12 R
11 HVS
10 GATELR
9 COMP aaa-038079

3.3 Demo board
The TEA2376DB1602v2 demo board can operate on a mains input voltage between 90 V (RMS) and 264 V (RMS), universal mains voltage.
The TEA2376DB1602v2 demo board incorporates two subcircuits:
· Active bridge rectifier · Interleaved PFC converter
The purpose of the demo board is to demonstrate and evaluate the operation of the TEA2376DT and TEA2209T in a single output power supply, including the modes of operation in a typical design. The performance supports common standards, including current low-load and standby requirements. It can be used as a starting point for developing power supplies using the TEA2376 and TEA2209 controller ICs.

Figure 4.TEA2376DB1602v2 demo board

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
5 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

To show the benefits of an interleaved PFC with an active bridge rectifier, the TEA2376DB1602V2 board design was made on a single-sided copper PCB with standard MOSFET types and without heat sinks. At an output power of 300 W, the temperature of the components remains acceptable at nominal mains voltage values in lab conditions. Higher output power levels are possible, but they require fan cooling.
3.4 TEA2376 Ringo software and USB-I2C interface
On the TEA2376DB1602v2 board, the TEA2376DT (SO14) version is used. This version includes two dedicated pins for I2C communication that supports access to parameter modifications, which is useful for product development. During the power supply operation, settings can be modified and status information of the operation can be monitored.
3.4.1 TEA2376DT: Dedicated SDA and SCL pins

AUX1 1

14 SNSSRC

GATE1 2

13 GND

VCC 3

12 SNSBOOST

GATE2 4

IC

11 SNSCUR

AUX2 5

10 SNSMAINS

BURST 6

9 POWERGOOD

SDA 7

8 SCL

aaa-053575
Figure 5.TEA2376DT: I2C connections on pin 7 and pin 8

3.4.2 TEA2376AT and TEA2376BT: SDA and SCL on combined pins
In the basic TEA2376 versions, the I2C interface is available on combined GATE1 (SDA) and GATE2 (SCL) pins (pin 2 and pin 4). To program the IC, the IC must be disabled at start-up with 0 V on SNSMAINS.

AUX1 1

10 SNSSRC

GATE1 (SDA) 2

9 GND

VCC 3

IC

8 SNSBOOST

GATE2 (SCL) 4

7 SNSCUR

AUX2 5
Figure 6.TEA2376AT: I2C connections on pin 2 and pin 4

6 SNSMAINS aaa-053576

3.4.3 Ringo software with graphical user interface (GUI) and USB-I2C interface
During power supply development, the communication with the IC can be done using the Ringo software on a Windows OS PC with a USB-I2C interface (TEA2016DB1514 available as part of the RDK01DB1563 kit). The TEA2376 Ringo software with GUI provides the correct protocol and offers several options and tools to work with the IC settings and the readout status information.

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
6 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

The Ringo user manual (Ref. 6) and USB-I2C interface user manuals and the TEA2016DB1514 USB to I2C hardware interface user manuals show how to work with it.

a. On the fly
b. Standalone Figure 7.Two TEA2376 programming setups

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
7 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

4 Finding kit resources and information on the NXP website
NXP Semiconductors provides information for the devices on the TEA2376DB1602 demo board at www.nxp.com.

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
8 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

5 Getting ready
5.1 Box contents
The box contains the TEA2376DB1602v2 demo board. Figure 8 shows the top side and bottom side of the evaluation board.

a. Top side

b. Bottom side Figure 8.TEA2376DB1602 demo board photographs

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
9 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

6 Getting to know the hardware

6.1 Specifications

Table 1.Specifications

Symbol

Description

Vi

input voltage

Fi Pi(no load)_mains

input frequency no-load input power

Pi(no load)_VCC

no-load input power

Vo

output voltage

Vo(min,max)

output voltage variations

Io

output current

Io

output current

tstart

start time

PF

power factor

efficiency

efficiency

Conditions AC at 230 V/50 Hz at VCC = 16 V (DC) normal mode load-step response
continuous peak at nominal Vo 115 V/60 Hz, Io = 0.76 A Io = 0.76 A 115 V/60 Hz, Io = 0.76 A 230 V/50 Hz, Io = 0.76 A

Values 90 to 264 47 to 63 < 35 < 15 395 < 10
0 to 0.76 > 1 100
0.99 > 96

98

Unit V (RMS) Hz mW mW V %
A A ms
%
%

6.2 TEA2376 features

6.2.1 Distinctive features
· Interleaved PFC controller in an SO10 package (TEA2376AT) or an SO14 package (TEA2376BT and TEA2376DT)
· Programmable phase shedding and burst mode operation · Dual output over voltage protection · Inrush current protection · High power factor (PF) and low total harmonic distortion (THD), also at high input voltages · Many parameters can be configured during evaluation with the use of a user-friendly graphical user interface
(GUI) · Good phase control over the full input voltage range · Low audible noise · TEA2376DT: Power good output and a burst mode input pin · TEA2376DT: Live monitoring of (internal) IC status values over time with the help of the user-friendly GUI
similar to oscilloscope reading · TEA2376DT: I2C communication while in operation

6.2.2 Green features
· Valley/zero voltage switching for minimum switching losses · High efficiency from high load to medium load and low load by phase shedding and burst mode operation

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
10 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

6.2.3 Protection features
· Protections can independently be set to latched, safe restart, or latched after several attempts to restart · Dual output overvoltage protection (OVP) · Supply undervoltage protection (UVP) and overvoltage protection (OVP) · Internal and external overtemperature protection (OTP) · Overcurrent protection (OCP) · Inrush current protection (ICP) · Brownin/brownout protection · Open and short pin protection · Coil short protection · Output diode short protection · Open control loop protection · Phase fail protection

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
11 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

7 Performance measurements
7.1 Test facilities
· Oscilloscope: Yokogawa DLM4038 · AC power source: Agilent 6812B · Electronic load: Keithley 2380-500-30 · Digital power meter: Yokogawa WT210
7.2 Start-up and switch-off behavior
7.2.1 Output voltage rise time The rise time of the output voltage is approximately 100 ms.

a. 115 V Figure 9.Start-up behavior

b. 230 V

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
12 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

7.2.2 Mains switch-off and X-capacitor discharge At low-load conditions, the TEA2209T X-capacitor discharge function is activated.

a. start-up: 230 V/750 mA Figure 10.Mains switch-off behavior

b. Switch-off: 230 V/0 mA

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
13 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

7.3 Efficiency

7.3.1 Efficiency characteristics

Table 2.Efficiency results

Condition

Average (%)

115 V/60 Hz

97.2

230 V/50 Hz

98.2

25 % load 97.5 98.0

50 % load 97.2 98.1

75 % load 97.3 98.3

100 % load 96.9 98.4

100 Efficiency
(%) 99
98
97

Efficiency (incl.VCC) (1) (2)

96

95 0
(1) Vmains = 230 V (AC) (2) Vmains = 115 V (AC)
100 Efficiency
(%) 95

20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 Pout (W) aaa-053585
Efficiency (incl.VCC) (1) (2)

90

85

80

75

0

1

2

3

4

5

6

7

8

(1) Vmains = 230 V (AC) (2) Vmains = 115 V (AC) Figure 11.Efficiency graphs
UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

9

10

Pout (W)

aaa-053586

© 2024 NXP B.V. All rights reserved.
14 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

7.3.2 No-load power consumption

Table 3.Power consumption at no load

Condition

Requirement

VCC = 16 V

15 mW

115 V/60 Hz

35 mW

230 V/50 Hz

35 mW

No-load power consumption 9 mW 25 mW 30 mW

7.3.3 Power factor

1.000 PF 0.950

Power factor

0.900

0.850

0.800 0.750

(1) (2)

0.700

0.650

0.600 0
(1) Vmains = 230 V (AC) (2) Vmains = 115 V (AC)
1.000 PF

20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 Pout (W) aaa-053587
Power factor (2)

0.995

(1)

0.990

0.985

0.980 0

20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 Pout (W) aaa-053588

(1) Vmains = 230 V (AC) (2) Vmains = 115 V (AC)

Figure 12.Power factor graphs

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
15 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

7.3.4 Harmonic distortion
25 THD (%)
20

iTHD (%)

15 (1)
10
(2) 5

0 0 20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 Pout (W) aaa-053589
(1) Vmains = 230 V (AC) (2) Vmains = 115 V (AC)
Figure 13.Harmonic distortion (iTHD) graph

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
16 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

7.4 Operation mode transitions
There are three modes of operation: · Normal mode · Phase shedding · Burst mode (BM) The transition level can be modified using programmable MTP settings.
7.4.1 Mode transitions at Vmains = 230 V

Load sweep: Slowly varying the output current to observe mode transitions.
Figure 14.Vmains = 230 V; operating mode transitions BM – phase shedding – normal operation
· BM to phase shedding: Pout = 39 W · Phase shedding to normal mode: Pout = 86 W · Normal mode to phase shedding: Pout = 50 W · Phase shedding to BM: Pout = 23 W

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
17 / 39

NXP Semiconductors 7.4.2 Mode transitions at Vmains = 115 V

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Load sweep: Slowly varying the output current to observe mode transitions.
Figure 15.Vmains = 115 V; Operating mode transitions BM – phase shedding – normal operation
· BM to phase shedding: Pout = 39 W · Phase shedding to normal mode: Pout = 99 W · Normal mode to phase shedding: Pout = 59 W · Phase shedding to BM: Pout = 29 W
7.4.3 Load sweep from 0 W to 300 W

Load sweep: Slowly varying the output current to observe behavior and mode transitions. Figure 16.Load sweep from 0 W to 300 W

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
18 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

7.4.4 Burst mode operation
Auto burst mode operation with 105 mV selected SNSBOOST hysteresis resulting in 16 Vpp ripple on the PFC output voltage.

a. Iout = 50 mA

b. Iout = 10 mA

Figure 17.Burst mode operation at Vmains = 230 V

7.4.5 Phase shedding and normal operation

c. Iout = 0 mA

a. Iout = 150 mA – phase shedding mode

b. Iout = 350 mA

Figure 18.Phase shedding and normal operation at Vmains = 115 V

c. Iout = 750 mA

a. Iout = 150 mA – phase shedding mode

b. Iout = 350 mA

Figure 19.Phase shedding and normal operation at Vmains = 230 V

c. Iout = 750 mA

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
19 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

7.5 Dynamic load response
Worse case load steps 0 mA (0 %) to 750 mA (100 %) show output voltage variations: · Vmains = 115 V; output voltage: 364 V to 420 V (-8 %, +6 %) · Vmains = 230 V; output voltage: 364 V to 420 V (-8 %, +6 %)

a. Vmains = 115 V

a. Vmains = 230 V

Figure 20.Load step behavior 0 mA (500 ms) to 750 mA (500 ms)

7.6 Peak output power capability
The maximum peak output power with nominal output voltage (395 V) is limited, depending on the mains voltage.
· Nominal Pout = 300 W (100 %) · Maximum Pout at 115 V mains = 510 W (170 %) · Maximum Pout at 230 V mains > 600 W (200 %)

With a short load step, the maximum output power can be found. The output voltage starts dropping.

a. Vmains = 115 V

a. Vmains = 230 V

Figure 21.Maximum peak output power (at nominal output voltage)

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
20 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

7.7 Thermal information
To show the benefits of an interleaved PFC with an active bridge rectifier circuit, the TEA2376DB1602v2 board design was made on a single-sided copper PCB with standard MOSFET types and without using heat sinks.
At 300 W output power, the temperature of the components remains acceptable at nominal mains voltage values in a lab condition. It mainly concerns the MOSFETs remaining below 100 °C at 25 °C room temperature. Because of the small board size, there is considerable influence of components heating each other.
At 115 V mains and Pout = 300 W, the measured maximum temperature was 82 °C. At 100 V mains and Pout = 300 W, the measured maximum temperature was 100 °C. Higher output power levels are possible, however, to avoid damage by overheating, they require fan cooling.

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
21 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

8 Schematic, bill of materials, layout

8.1 Schematic

TP112 L, n.m.

F101 4 AT/300 VAC

2L 1N

E103 AWG12 L R153
510 V

CN304 691213710002

E104 AWG12 N

TP113 N, n.m.

B82734W2322B030

GDT1 n.m. DSP-201M
L_FUS
2 CX101 470 nF 630 V
1

GDT2 n.m. 2051-20
3 LF102 6.8 mH 4

CX102 470 nF 630 V
R103 10 M

W B110 9 23 3 4 5 – 0 8
E108 AWG18 4

GDT3 n.m. DSP-201M

GDT4 n.m. 2051-20
R101 10 M
n.m.

E107 AWG18

L_FIL

2

VR

1

BD101 n.m. 3 GBU806 C103
1 µF
N_FIL 450 V n.m.

Manual wire bridge

GDT5 n.m. GDT6 n.m. DSP-201M 2051-20

C104 470 nF 450 V

L103 100 µH
5 A

WB109 9 23 3 4 5 – 07

C105 470 nF 450 V
n.m.

C106 1 µF 450 V

R104 10 M

13 7 14
1
PG3 R109 0 n.m.

MIN
R125 0

D105
BAS 416
C115 470 pF 50 V

C114 470 pF 50 V
C111

TP100 SNSMAINS n.m.

R117

U101 1

D110

WB116 923345 -10

1N5408 n.m.

R196 0 , n.m.

9 L104, 250 uH

13 7

THT

14

760806110

12

TP106

1

AUX1

n.m.

C107 100 pF 50 V n.m.

R107 0

PG3
R110 0 n.m.

R195

9

0

L105, 250 uH n.m.

THT

760806110

12

TP107

AUX 2

n.m.

C108 100 pF 50 V n.m.

R108 0

TP114 DRAIN1
n.m.

R105 22 k

R192 0
R106 22 k

D103

TP117

BAS316 GATE1 n.m.

Q101

IPD60R180P7

R113

4.7

R111 4.7

R115 100 k

Q107 n.m. IPD60R045P7

PG3

R197
0 n.m.

D101 MURS360T3G
WB103 923345-10

D102 MURS360T3G

C113 180 µF
450 V

VBOOST

1

2

C123

10 nF

CN102

500 V 691213710002

PG1 PG1 PG1

C109 100 pF 1 kV

R123 750 k
R122 7.5 M
R121 7.5 M

R126 100 k

TP111 GND n.m.

10 nF 50 V

SNSSRC 14 GND 13

1 AUX1 2 GATE1

TP101 I2C_SDA
n.m. GATE1

TP115

PG5 R127

TP110 SNSCUR

SNSBOOST 12

3 VCC

DRAIN2 n.m.

100

n.m.

SNSCUR

TEA 2376

11

4

GATE2

GATE2

R128 0.039

R129 0.05

C116 470 pF
50 V

TP103 DB2

SNSMAINS 10 PWRGOOD 9

5 AUX2 6 BURST

TP104 DB1

TP108 VCC

TP102 I2C_SCL
n.m.
R112

TP118 GATE 2
n.m.

Q102 IPD60R180P7

C110 100 pF

PG5

PG5

n.m. SCL 8
R133

7 SDA

n.m.

n.m. C117

4.7 R114

R191 0

TP116

0

R132

220 nF 50 V

4.7

Q108 n.m. IPD60R045P7
WB105 923345-10

1 kV
WB106 923345-10

SNSBOOST n.m.
CN104 22-11-2032

PG _ PFC

0 R134 R135 22 k, n.m.

D104 R116 BAS316 100 k

R119

VR

3 2 1

0 R136
22 k n.m.
PG5

PG3

R193 0

PG4

PG3

R118 0.01

0.05 n.m. WB121
9 23 3 4 5 – 07

R151

Q103 IPD60R180P7

U102

WB112

Q104

923345-06 IPD60R180P7

R198 0

R152 0

R130 0

R131 0

0 SUPIC

PG1

WB122 PG1 923345 -07

L _FIL
W B115 9 2 33 4 5 – 07
Q105 IPD60R180P7
WB108 9 23 3 4 5 – 0 6

C119 220 nF
50 V R140 0
R142
0

L1

16 VR

VCCHL 2

15 HVS3

GATEHL 3

14 GATEHR

HVS1 4

13 VCCHR

GATELL

TEA2209T

5

12

R

VCC 6

11 HVS2

GND 7

10 GATELR

COMP_POL 8

9 COMP

WB113 9 2 33 4 5 – 0 3

R141 0

C120 220 nF 50 V

R143 0

WB114 92 33 4 5 – 0 5
N_ FI L

PG5

R138 1 M

C124

1 nF, 50 V

C125

R139 1 M

1 nF, 50 V

R137
2.7 D106 BZX384-C24

D107 C118 BAS316 470 nF
50 V

CN105 691213710002
1
2

PG5

CN103 22-11-2032

123

D109

PG5 PG4

PESD5V2S2UT

R194 0 PG5 PG4

PG5

Q106 IPD60R180P7

C112 470 pF 50 V

R120 100 k

PG3

C121 2.2 µF
25 V

R144 0 n.m.
R145 0

R146 0
TP105 COMP
n.m. R148 180 k

R147 0

WB117 923345 -06

C122 2.2 µF 25 V

D108 BAS316

MIN

R149 18 k
R150 18 k n.m.

GATE1 GATE2

a aa – 05 3 612

Figure 22.TEA2376DB1602v2 schematic diagram

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
22 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

8.2 Bill of materials (BOM)

Table 4.Bill of materials

Part

Description and values

Part number

BD101

bridge rectifier; not mounted; 600 V; 8 A

GBU806

C103

capacitor; not mounted; 1 F; 10 %; 450 V; PET; ECQE2W105KH THT

C104

capacitor; 470 nF; 10 %; 400 V; PET

890334025039

C105

capacitor; not mounted; 470 nF; 10 %; 450 V; PET; THT

ECQE2W474KH

C106

capacitor; 1 F; 10 %; 400 V; PET

890283426008CS

C106′

capacitor; not mounted; 2.2 F; 10 %; 450 V; PET; THT

ECQE2W225KH

C107; C108 capacitor; not mounted; 100 pF; 10 %; 50 V; C0G; 0603

C109; C110 capacitor; 100 pF; 10 %; 1 kV; X7R; 1206

C111

capacitor; 10 nF; 10 %; 50 V; X7R; 0603

C112; C114; capacitor; 470 pF; 10 %; 50 V; X7R; 0603

C115; C116;

C118

C117; C119; capacitor; 220 nF; 10 %; 50 V; X7R; 0603

C120

C121; C122 capacitor; 2.2 F; 10 %; 25 V; X7R; 0805

C123

capacitor; 10 nF; 10 %; 500 V; X7R; 1812

C1812C103KCRACTU

C124; C125 capacitor; 1 nF; 5 %; 50 V; C0G; 0603

CN102; CN105; CN304

receptacle; connection terminal block; 1×2-way; 691213710002 5.00 mm

CN103; CN104

Header; Straight; Gold Plated; 1×3-way; 2.54 mm; 22-11-2032

CX101; CX102

capacitor; 470 nF; 20 %; 630 V; MKP; THT; X2 BFC233922474

D101; D102 diode; 600 V; 3 A

MURS360T3G

D103; D104; diode; 100 V; 250 mA D107; D108

BAS316

D105

diode; 85 V; 200 mA

BAS416

D106

diode; Zener; 24 V; 300 mW

BZX384-C24

D109

diode; ESD; double; unidirectional; 5.2 V; maximum 15 A; 30 kV

PESD5V2S2UT

D110

diode; 1 kV; 3 A

1N5408

F101

fuse; slow blow; 300 V (AC); 4 A

SS-5H-4A-APH

GDT1;

gas discharge tube; not mounted; 200 V; 20 %;

GDT3; GDT5 THT

DSP-201M

Manufacturer Diodes Inc Panasonic
Würth Elektronik Panasonic
Würth Elektronik Panasonic



KEMET Würth Elektronik
Molex
Vishay
ON Semiconductor NeXPeria USA Inc.
NeXPeria USA Inc. NeXPeria USA Inc. NeXPeria USA Inc.
Vishay Cooper Bussmann Mitsubishi Semiconductor

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
23 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Table 4.Bill of materials…continued

Part

Description and values

Part number

GDT2;

gas discharge tube; not mounted; 200 V; 25 %;

GDT4; GDT6 SMT

2051-20-SM-RPLF

L103

inductor; 100 H; 5 A

7447070

L104; L105 inductor; PFC; 250 H; 5.7 A

760806110

LF102

inductor; common mode; 6.8 mH; 3.2 A

B82734W2322B030

Q101; Q102; MOSFET-N; 650 V; 11 A Q103; Q104; Q105; Q106

IPD60R180P7

Q107; Q108 MOSFET-N; not mounted; 650 V; 38 A

IPB60R045P7

R101

resistor; not mounted; 10 M; 1 %; 250 mW;

1206

R103; R104 resistor; 10 M; 1 %; 250 mW; 1206

R105; R106 resistor; 51 k; 1 %; 63 mW; 0603

R107; R108; resistor; jumper; 0 ; 63 mW; 0603

R125; R130;

R131; R132;

R133; R140;

R141; R142;

R143; R145;

R146; R147;

R152

R109; R110; resistor; jumper; not mounted; 0 ; 63 mW; 0603 R144

R111; R113; resistor; 4.7 ; 1 %; 63 mW; 0603

R114

R112

resistor; 4.7 ; 1 %; 100 mW; 0603

R115; R116; resistor; 100 k; 1 %; 63 mW; 0603

R120; R135

R117

resistor; 1 ; 1 %; 63 mW; 0603

R118; R129 resistor; 0.01 ; 1 %; 1 W; 2512

RL2512FK-070R01L

R119

resistor; not mounted; 0.05 ; 1 %; 1 W; 2512 RL2512FK-070R05L

R121; R122 resistor; 7.5 M; 1 %; 250 mW; 1206

CRCW12067M50FKEA

R123

resistor; 750 k; 1 %; 250 mW; 1206

R126

resistor; NTC; 100 k; 1 %; 100 mW; 4250 K

NCU18WF104F60RB

R127

resistor; 100 ; 1 %; 63 mW; 0603

R128

resistor; 0.039 ; 1 %; 1 W; 2512

RL2512FK-070R039L

R134; R136 resistor; not mounted; 22 k; 1 %; 63 mW; 0603 –

R137

resistor; 2.7 ; 1 %; 125 mW; 0805

R138; R139 resistor; 1 M; 1 %; 63 mW; 0603

R148

resistor; 180 k; 1 %; 63 mW; 0603

R149

resistor; 18 k; 1 %; 63 mW; 0603

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

Manufacturer Bourns Inc.
Würth Elektronik Würth Elektronik EPCOS Infineon Technologies
Infineon Technologies –




Yageo Yageo Vishay Murata Yageo –
© 2024 NXP B.V. All rights reserved.
24 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Table 4.Bill of materials…continued

Part

Description and values

Part number

R150

resistor; not mounted; 18 k; 1 %; 63 mW; 0603 –

R151; R193; resistor; jumper; 0 ; 250 mW; 1206

R194

R153

resistor; VDR; 510 V; 125 J

MOV-14D511K

R191; R192 resistor; jumper; 0 ; 750 mW; 2010

RC2010JK-070RL

R195; R196; resistor; not mounted; jumper; 0 ; 250 mW; 1206 R197

R198

resistor; jumper; 0 ; 100 mW; 0603

TP101; TP102; TP103; TP104; TP105; TP106; TP107; TP108; TP109; TP110; TP111; TP112; TP113; TP114; TP115; TP116; TP117; TP118

Test point; not mounted; 0805

RCT-0C

U101

interleaved PFC; TEA2376DT (SO14)

TEA2376DT

U102

active bridge rectifier controller

TEA2209T

WB103; WB105; WB106; WB116

wirebridge; 0.8 mm; P = 25.40 mm

923345-10

WB108; WB112; WB117

wirebridge; 0.8 mm; P = 15.24 mm

923345-06

WB109; WB115; WB121; WB122

wirebridge; 0.8 mm; P = 17.18 mm

923345-07

WB113

wirebridge; 0.8 mm; P = 7.62 mm

923345-03

Manufacturer Bourns Inc. Yageo TE Connectivity
NXP Semiconductors NXP Semiconductors 3M
3M 3M
3M

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
25 / 39

NXP Semiconductors 8.3 Board layout

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Figure 23.TEA2376DB1602v2 PCB layout design

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
26 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Figure 24.TEA2376DB1602v2 PCB pictures top side

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
27 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Figure 25.TEA2376DB1602v2 PCB pictures bottom side

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
28 / 39

NXP Semiconductors 8.4 PFC coil specification

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Figure 26.PFC coil

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
29 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

9 Parameter settings

Table 5 provides a list of the parameters in the TEA2376DT MTP, which is in this demo board. It shows the parameter name and the value. Parameter values that differ from the TEA2376DT’s default programming are highlighted in italics.
The Ringo GUI export function can generate a list with the MTP settings of an IC. It provides an overview of the selected values and can be used for comparison, checking, or sharing the information. The settings can also be stored as a .mif file, which can be reloaded in the Ringo GUI software later or shared with others.

Table 5.TEA2376 MTP parameter settings in TEA2376DB1602v2

Ringo parameter name

IC parameter name

1 VCC OVP

mtp_vcc_ovp

2 AUX OVP

mtp_aux_ovp

3 SNSBOOST short

mtp_snsboost_short

4 SNSMAINS OVP

mtp_mains_ovp

5 SNSSRC OCP

mtp_snssrc_ocp

6 SNSCUR OCP

mtp_snscur_ocp

7 SNSCUR short

mtp_snscur_short

8 DIFF PHASE

mtp_diff_phase_fail

9 POSAUX

mtp_posaux_fail

10 NEGAUX

mtp_negaux_fail

11 External OTP

mtp_eotp

12 Internal OTP

mtp_iotp

13 MTP read failure

mtp_read_fail

14 Start up soft start time

mtp_t_start

15 PFC voltage loop gain

mtp_vgain

16 I2C ending delay on GATE

mtp_i2c_mode_to_sel

17 Protection register logging

mtp_prot_reg_mtp_en

18 MTP writing

write_lock

19 MTP reading

read_lock

20 Brownin Level

mtp_brown_in_lvl

21 Brownin/brownout hysteresis

mtp_brown_in_hys

22 Brownout delay

mtp_brown_out_delay

23 PFC valley switching

mtp_valleysw

24 Filter delay compensation

mtp_t_filt_delay

25 Mains sensitivity

mtp_mains_sensitivity

26 Mains sensing resistor value

mtp_rmains

27 Notch filter in regulation loop

mtp_notch_en

28 PFC gamma value

mtp_pfc_gamma

29 Mains peak zero crossing detection mtp_pk_pos_detect

Value
OK OK OK OK OK OK OK OK OK OK OK OK OK 25.6 0.4375 100 disabled enabled enabled 6.3 0.3 50 enabled 277 low 20 enabled 36 enabled

Unit

Binary

value

0

0

0

0

0

0

0

0

0

0

0

0

0

ms

0

9

ms

0

0

0

0

A

8

A

2

ms

0

1

s

0

0

M

1

1

36

1

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
30 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Table 5.TEA2376 MTP parameter settings in TEA2376DB1602v2…continued

Ringo parameter name

IC parameter name

Value

30 Mains sense wait time after NTC mtp_t_snsmains_discharge

31 Disable NTC during startup

mtp_ntc_chk_en

32 SNSMAINS phase factor

mtp_phase_factor

33 SNSBOOST level low gain increase mtp_level_gm_low

34 SNSBOOST low gain increase

mtp_gain_gm_low

35 VCC stop level

mtp_vcc_stop

36 Mains sensing resistors

mtp_nr_resistors

37 VCC start level

mtp_vcc_start

38 AUX sensing filter

mtp_fc_aux

39 AUX blanking time

mtp_t_aux_blank

40 AUX high time for sec stroke

mtp_t_wait_aux_high

41 Time slot for measuring NTC

mtp_t_meas_ntc

42 NTC circuit diode voltage drop

mtp_udiode_dig0

43 Number of phases controller

mtp_phase1_only

44 Startup delay for AC/DC detection mtp_wait_for_acdc

45 Phase when no valley switching

mtp_force_phase_valley_dis

46 Min switch on delay between phases mtp_min_tps_diff_delay

47 Max switch on delay between phases

mtp_max_tps_diff_delay

48 Ipfc_peak for Fmin

mtp_vrsense_fmin

49 Delta Ipfc_peak for Fmax-Fmin

mtp_vrsense_fmax_fmin

50 Min PFC freq phase value

mtp_phi_imin

51 Max-min PFC freq phase value

mtp_phi_imin_imax

52 Minimum switching frequency

mtp_fmin

53 Maximum switching frequency

mtp_fmax

54 Power level for leaving Shedding mtp_pshed_high_perc

55 Hysteresis for entering Shedding mtp_pshed_hys_perc

56 Time delay for entering Shedding mtp_time_shed

57 Value of AUX measurement resistor mtp_raux

58 Duty cycle reduction at OCP

mtp_ocp_red

59 Soft start time BM

mtp_softstart_time

60 Ton steps in soft stop CCM

mtp_softstop_tonstep

61 Initial on time at startup

mtp_scale_duty_init

62 Slope current

mtp_cur_limit_dc

63 Proportional loop gain

mtp_pgain

64 Regulation Vin compensation

mtp_vincomp

500 enabled 0.9375 off 2x 8 1 resistor 11 5 600 750 450 460 2 normal phase 180 204 2
55 110 0.18 0.14 40 130 30 10 140 33 0.75 normal normal normal 0.75 10 enabled

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

Unit
s V V MHz ns ns s mV phase ns s

Binary value 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0

0

0

0

kHz

0

kHz

0

%

3

%

0

ms

0

k

0

0

0

0

0

0

0

1

© 2024 NXP B.V. All rights reserved.
31 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Table 5.TEA2376 MTP parameter settings in TEA2376DB1602v2…continued

Ringo parameter name

IC parameter name

Value

65 Regulation Vin current compensation
66 Regulation Tring compensation 67 QR mode switching 68 CCM allowed 69 AUX min oscillation level 70 AUX scaling oscillation to valley 71 AUX delay compensation 72 AUX valley detection time out 73 AUX valley detection hysteresis 74 AUX demag time out 75 Minimum GATE off time 76 Notch filter for mains frequency 77 PFC current loop gain 78 PFC current scaler 79 Limit the power at start
80 Minimum secondary stroke time 81 Minimum stretch time 82 Minimum Ides clamp level 83 Ides clamp slope K 84 Ipfc clamp function 85 Slope clamp value 86 SNSBOOST high gain increase 87 3ms blanking BI after BO 88 External OTP protection Level 89 External OTP delay time 90 FLR only when protection 91 SNSBOOST low clears all
protections 92 Fast latch reset delay time 93 External OTP level multiplier 94 Safe Restart Time 95 VCC OVP delay 96 AUX OVP level 97 SNSMAINS OVP level 98 SNSBOOST OVP level

mtp_cur_vincomp
mtp_tringcomp mtp_en_qr mtp_sel_ipfc_ok mtp_osc_amin mtp_osc_scale mtp_osc_offset mtp_osc_timeout mtp_osc_hys mtp_wait_mag mtp_toffmin mtp_ton_fir_filt mtp_igain mtp_kdes mtp_pwr_limit_start
mtp_minsecstroke mtp_stretchmin mtp_idesmax_min mtp_k_idesclamp mtp_idesclamp_en mtp_slope_clamp mtp_gain_gm_high mtp_bi_blank mtp_gotp_limit mtp_t_eotp mtp_flr_only_at_prot mtp_snsb_short_clr_prots
mtp_flr_delay mtp_mult_gntc mtp_restart_time mtp_vcc_ovp_delay mtp_aux_ovp_value mtp_snsmains_ovp_value mtp_snsboostovp

enabled
enabled enabled when needed 17 1 93 3 2 3 1 enabled 25 2.013 255; no limit 1 200 13 1 enabled 512 4x enabled 88 4 disabled disabled
50 32x 1 1000 215 420 2.63

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

Unit

Binary

value

1

1

1

0

V

0

0

ns

0

s

0

0

s

0

s

0

1

0

13

0

s

0

ns

0

%

0

2

1

0

0

1

0

s

0

0

0

ms

0

0

s

0

s

0

0

mV

0

V

0

© 2024 NXP B.V. All rights reserved.

32 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Table 5.TEA2376 MTP parameter settings in TEA2376DB1602v2…continued

Ringo parameter name

IC parameter name

Value

99 VCC OVP level

mtp_vcc_ovp_limit

100 Max pos AUX voltage difference

mtp_min_auxpos_value

101 Fast Latch Reset function

mtp_fast_latch_reset

102 PFC shortwinding delay cycles

mtp_max_drain_short_count

103 OCP blanking time

mtp_ocp_blanking_time

104 SNSCUR short detection level

mtp_snscur_short_det_lvl

105 Max SNSCUR cycles to show short mtp_nr_snscur_short_cycles

106 Max AUX voltage difference in phases

mtp_max_vout_diff

107 AUX voltage measurement filter

mtp_aux_v_filt_setting

108 AUX min time for valid stroke

mtp_tmin_pk_hold

109 Max missed AUX primary strokes mtp_max_missed_prim_strokes

110 Max missed AUX secondary strokes mtp_max_missed_sec_strokes

111 SNSCUR current ratio

mtp_snscur_ratio

112 SNSBOOST pulldown at brownout mtp_snsboost_pulldown_brownout

113 SNSMAINS OVP prot follow up

mtp_mains_ovp_mode

114 VCC OVP prot follow up

mtp_vcc_ovp_mode

115 AUX OVP prot follow up

mtp_aux_ovp_mode

116 SNSBOOST short prot follow up

mtp_snsb_short_mode

117 SNSSRC overcurrent prot follow up mtp_snssrc_oc_mode

118 Allow startup with mains DC

mtp_allow_startup_dc_load

119 SNSCUR overcurrent prot follow up mtp_snscur_oc_mode

120 SNSCUR short protect follow up

mtp_snscur_short_mode

121 Internal OTP prot follow up

mtp_iotp_mode

122 External OTP prot follow up

mtp_eotp_mode

123 AUX phase fail prot follow up

mtp_pf_vout_diff_mode

124 AUX pos phase fail prot follow up mtp_pf_pos_aux_mode

125 AUX neg phase fail prot follow up mtp_pf_neg_aux_mode

126 Duration soft start/stop operation mtp_bm_end_soft_start_stop

127 Burst mode SNSBOOST ripple

mtp_bmripple

128 BM soft start

mtp_skip_soft_start

129 BM soft stop

mtp_skip_soft_stop

130 Burst mode delay time

mtp_burstdelay

131 Burst mode level

mtp_bmpth_low

132 Burst on/off level on VCC

mtp_bmvccth

133 Burst mode type

mtp_bm

24 20 disabled 2500 250 30 200 25
4 750 100 100 128 0 disabled safe restart safe restart auto continue safe restart disabled safe restart safe restart safe restart safe restart safe restart safe restart safe restart infinite 105 softstart softstop 0 10.9 10 auto

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

Unit
V (dig) ns cycles (dig)

Binary value 0 0 0 0 0 0 3 3

cycles 0

ns

0

cycles 0

cycles 0

0

ms

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

mV

0

0

0

s

0

%

0

V

0

0

© 2024 NXP B.V. All rights reserved.
33 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Table 5.TEA2376 MTP parameter settings in TEA2376DB1602v2…continued

Ringo parameter name

IC parameter name

Value

134 BM boost recover 135 External BM control pin 136 BM depending on shedding 137 Burst starts with 1 phase 138 BM hysteresis 139 SNSBOOST level to stop PG 140 Power good at mains brownout 141 SNSBOOST level for power good 142 Power Good polarity 143 PG stopped by SNSBOOST 144 Vendor code

mtp_boostrecover mtp_bm_ctrl_sel mtp_bm1phase mtp_single_phase_burst_restart mtp_bmpth_hys mtp_pwrgood_stop_pct mtp_pwrgood_bo_stop mtp_pwrgood_start_lvl mtp_pwrgood_pol mtp_pwrgood_lvl_stop mtp_code

disabled BURST normal 1 phase only disabled 3.1 0.5 enabled 2.3 normal enabled 0x0000

Unit

Binary

value

0

0

1

0

%

0

0

1

V

6

0

1

0

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
34 / 39

NXP Semiconductors

10 Abbreviations

Table 6.Abbreviations

Acronym

Description

CCM

critical conduction mode

DCM

discontinuous conducting mode

GUI

graphical user interface

ICP

inrush current protection

OCP

overcurent protection

OTP

overtemperature protection

OVP

overvoltage protection

PFC

power factory correction

SR

synchronouos rectifier

THD

Total harmonic distortion

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
35 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

11 References

Many documents are included in the GUI of the Ringo software that can be downloaded from www.nxp.com.

[1] TEA2376AT data sheet [2] TEA2376DT data sheet [3] UM11235 user manual [4] AN14200 [5] UM12042

— Digital configurable interleaved PFC controller; 2023, NXP Semiconductors — Digital configurable interleaved PFC controller; 2023, NXP Semiconductors — TEA2016DB1514 USB to I2C hardware interface; 2019, NXP Semiconductors — TEA2376 application note (working title) — TEA2376 Ringo

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
36 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

12 Revision history

Table 7.Revision history Document ID
UM12002 v.1.0

Release date 06 February 2024

Description · Initial version

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
37 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Legal information
Definitions
Draft — A draft status on a document indicates that the content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included in a draft version of a document and shall have no liability for the consequences of use of such information.
Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including – without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety- critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.

Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at https://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.
Suitability for use in non-automotive qualified products — Unless this document expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document, including the legal information in that document, is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
Security — Customer understands that all NXP products may be subject to unidentified vulnerabilities or may support established security standards or specifications with known limitations. Customer is responsible for the design and operation of its applications and products throughout their lifecycles to reduce the effect of these vulnerabilities on customer’s applications and products. Customer’s responsibility also extends to other open and/or proprietary technologies supported by NXP products for use in customer’s applications. NXP accepts no liability for any vulnerability. Customer should regularly check security updates from NXP and follow up appropriately. Customer shall select products with security features that best meet rules, regulations, and standards of the intended application and make the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, and security related requirements concerning its products, regardless of any information or support that may be provided by NXP. NXP has a Product Security Incident Response Team (PSIRT) (reachable at PSIRT@nxp.com) that manages the investigation, reporting, and solution release to security vulnerabilities of NXP products.
NXP B.V. — NXP B.V. is not an operating company and it does not distribute or sell products.
Trademarks
Notice: All referenced brands, product names, service names, and trademarks are the property of their respective owners.
NXP — wordmark and logo are trademarks of NXP B.V.
GreenChip — is a trademark of NXP B.V.

UM12002
User manual

All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 February 2024

© 2024 NXP B.V. All rights reserved.
38 / 39

NXP Semiconductors

UM12002
TEA2376DB1602v2 300 W interleaved PFC demo board

Contents

1 2 3 3.1 3.2 3.3 3.4
3.4.1 3.4.2
3.4.3
4
5 5.1 6 6.1 6.2 6.2.1 6.2.2 6.2.3 7 7.1 7.2 7.2.1 7.2.2 7.3 7.3.1 7.3.2 7.3.3 7.3.4 7.4 7.4.1 7.4.2 7.4.3 7.4.4 7.4.5 7.5 7.6 7.7 8 8.1 8.2 8.3 8.4 9 10 11 12

Important notice ………………………………………..2 Safety warning …………………………………………. 3 Introduction ……………………………………………… 4 TEA2376 …………………………………………………… 4 TEA2209T ………………………………………………….4 Demo board ……………………………………………….5 TEA2376 Ringo software and USB-I2C interface ……………………………………………………. 6 TEA2376DT: Dedicated SDA and SCL pins …….6 TEA2376AT and TEA2376BT: SDA and SCL on combined pins ……………………………….. 6 Ringo software with graphical user interface (GUI) and USB-I2C interface ………………………..6 Finding kit resources and information on the NXP website …………………………………..8 Getting ready …………………………………………… 9 Box contents ………………………………………………9 Getting to know the hardware …………………. 10 Specifications ……………………………………………10 TEA2376 features ……………………………………..10 Distinctive features …………………………………… 10 Green features ………………………………………….10 Protection features …………………………………….11 Performance measurements …………………….12 Test facilities ……………………………………………. 12 Start-up and switch-off behavior …………………. 12 Output voltage rise time ……………………………. 12 Mains switch-off and X-capacitor discharge …..13 Efficiency ………………………………………………….14 Efficiency characteristics …………………………….14 No-load power consumption ………………………. 15 Power factor ……………………………………………. 15 Harmonic distortion ……………………………………16 Operation mode transitions ……………………….. 17 Mode transitions at Vmains = 230 V …………….17 Mode transitions at Vmains = 115 V ……………. 18 Load sweep from 0 W to 300 W ………………….18 Burst mode operation ……………………………….. 19 Phase shedding and normal operation ………… 19 Dynamic load response …………………………….. 20 Peak output power capability ………………………20 Thermal information …………………………………..21 Schematic, bill of materials, layout ………….. 22 Schematic ……………………………………………….. 22 Bill of materials (BOM) ……………………………… 23 Board layout ……………………………………………. 26 PFC coil specification ……………………………….. 29 Parameter settings …………………………………. 30 Abbreviations …………………………………………. 35 References ………………………………………………36 Revision history ………………………………………37 Legal information …………………………………….38

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

© 2024 NXP B.V.
For more information, please visit: https://www.nxp.com

All rights reserved.
Date of release: 6 February 2024 Document identifier: UM12002

Read User Manual Online (PDF format)

Read User Manual Online (PDF format)  >>

Download This Manual (PDF format)

Download this manual  >>

NXP Semiconductors User Manuals

Related Manuals