NXP WPR1500-HV Wireless Charging Receiver User Guide
- October 27, 2023
- NXP
Table of Contents
NXP WPR1500-HV Wireless Charging Receiver
Introduction
This document describes how to use WPR1500-HV receiver reference board designed by NXP. It supports 15W EPP output according to the WPC Qi V1.2.4 specification, and can be extended to support new V1.3.x specification. The power level can also be extended with special TX to up to 30 W. It is a low- cost reference solution that can be easily customized through the FreeMASTER tool.
System Features
The WPR1500 EPP receiver reference board has the following features:
- Compliant with the EPP WPC Qi V1.2.4 specification, can be extended to V1.3.x.
- Input voltage (3.5 V – 20 V AC peak) from the transmitter through the receiver coil.
- Output voltage range can be set from 3.5 V to 20 V.
- Default output power 15W(12V@1.25A), can be extended up to 30W(20V@1.5A).
- Supports FSK communication with EPP transmitter.
- Hardware protection of rectifier voltage, output voltage, and output current.
- FreeMASTER tool to enable customization and calibration.
Abbreviations
The following table provides the abbreviation descriptions in this document.
Table 1. Abbreviations
Abbreviation| Description
WPR| Wireless Power Receiver
DC| Direct Current
JTAG| Joint Test Action Group
SCI| Serial Communications Interface
RX| Receiver
TX| Transmitter
ASK| Amplitude-Shift Keying
FSK| Frequency-Shift Keying
BPP| Baseline Power Profile
EPP| Extended Power Profile
FOD| Foreign Object Detection
MCU| Microcontroller Unit
Package Checklist
Table 2. Package checklist
Name| Count
WPR1500-HV Receiver board| 1
System Block Diagram
The following figure shows the WPR1500 EPP receiver wireless charging system.
Obtain the WPC Qi information from: www.wirelesspowerconsortium.com/developers/.
Hardware Description
Reference Board Block Diagram
Modules explanation
The NXP MWPR1516 chip is the central controller of the WPR1500-HV receiver
board. The chip higher integration receiver controller MCU for wireless power
transfer application. The WPR15xx is a Cortex M0+ core ASSP with NXP’s UHV
technology. It includes the FSK and CNC models that allow easy development for
bi-directional communication architecture between the transmitter and
receiver.
The following modules are used in this application:
- CNC controls the communication and provides AC protection.
- High-voltage input PMC module with three power modes: Run, Wait, Stop.
- Programmable gain amplifier (PGA) with differential input and output.
- FSK demodulation timer (FSKDT).
- WDOG with independent clock source.
Rectifier
The rectifier uses a self-driven sync type. Its characteristics are:
- Input voltage: 3.5 V – 20 V AC peak.
- Output voltage: 3.5 V – 20 V DC.
Communication
- The ASK differential bi-phase signal is modulated by switching the modulation capacitor.
- The FSK signal is demodulated by the CNC and FSKDT module.
Getting Started
System developing environment
WPR1500-HV receiver board supports debugging with IAR and FreeMASTER tools.
The following figure shows the setup of the debug connection. To download an
image onto the WPR1516 chip, connect a debugger (J-LINK or P&E-Multilink FX)
to the JTAG port of the receiver board. J3 (V_REC) and J5 (GND) on the board
need to be connected to 5 – 12 V DC power supply in order to get power. To
monitor the working status of the WPR1500-HV receiver board by FreeMASTER,
remove the external power before putting the WPR1500-HV receiver board on the
transmitter panel. The following figure shows the connection when downloading
an image.
The following figure shows the connections when the user needs to monitor the working status by FreeMASTER.
For details on the J-LINK debugger, visit nxp.com and search for “J-Link”.
Downloading and debugging firmware
Downloading an existing WPR1500 HVOUT project with IAR
To download an existing WPR1500 project using IAR, perform the following steps:
-
Set the IAR Embedded Workbench: The IAR embedded Workbench Tool is required. The IAR version should be 9.10.2 or higher. Because the receiver driver library is already included in the library folder of the wireless charger application project, you can open the application project and build the applications directly whenever the wpr_lib.a is ready.
-
Build a project: Click the “Rebuild All” button.
-
Ensure that the debugger is configured properly in the project options. The flash loader must be selected to support downloading of the binary to the internal flash.
When using the J-Link as the debugger, select J-link/J-Trace. -
Download the project. After the application is built successfully, click the “Download and Debug” button to download the application to the target device.
The following figure shows the programming of a project. -
After the application is downloaded to the target device, the debugger stops executing at the start of the main function:
Debugging with FreeMASTER
Connecting the Debugging cable
The FreeMASTER debug connection uses J-Link, as shown in the following figure.
The J-Link tool can be connected through the connector J1. The FreeMASTER
version should be V3.1 or higher.
FreeMASTER project options setting
- Set the symbol file for your project. Select the symbol file in FreeMASTER Project –> Options –> MAP Files, as shown below.
- Select the communication interface for Freemaster: Select “Plug-in Module” in Freemaster Project –> Options –> Comm as shown below. Then select “FreeMASTER Segger/Jlink Communication Plug-in”.
Debugging with FreeMASTER
NXP provides the FreeMASTER GUI tool for system working status monitor. The
following figure shows the FreeMASTER GUI Tool. Users need to open
WPR1500_HVOUT.pmp with this tool and then click the red Start/Stop button. For
the FreeMASTER tool, visit nxp.com/Freemaster.
Testing
Signals on the Board
The following figure shows the main signals on the WPR1500-HV EPP receiver
board.
The following table lists the testing points on the WPR1500 BUCK board.
Table 3. Test Points list
TP1 : VDD| TP9: CLAMP_EN
TP2 : TEST| J2 & J4: I2C
TP3 & TP4 : ACIN| J3: V_REC
TP5 : IOUT| J6: CTX
TP7 & J7: VOUT| J5 & J8: GND
The following examples show how to measure and debug the board. The following figure shows the input voltage and communication signal from the ping phase to power transfer setup. The loading is 10.5W(12V@0.875A)
- Channel 1: Rectifier voltage VREC
- Channel 2: Output current I_out
- Channel 3: Output voltage V_out
- Channel 4: Communication signal CTX
The following figure shows the load step and load dump from 7.5W(12V@0.625A) to 15W(12V@1.25A).
- Channel 1: Rectifier voltage VREC
- Channel 2: Output current I_out
- Channel 3: Output voltage V_out
References
- NXP wireless charging solution page: nxp.com/products/power-management/wireless-charging-ics
- NXP Freemaster tool page: nxp.com/products/power-management/wireless-charging-ics/freemaster-run-time-debugging-tool:FREEMASTER
- WPC page: www.wirelesspowerconsortium.com
Revision History
Revision number | Date | Substantive changes |
---|---|---|
GA 3.0 | 07/2022 | Initial release. |
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