ON Semiconductor MT9M114 Evaluation Board User Manual

June 16, 2024
ON Semiconductor

ON Semiconductor MT9M114 Evaluation Board

Product Information

  • Product Name: MT9M114EBLSTCZDH-GEVB
  • Product Type: Evaluation Board
  • Manufacturer: ON Semiconductor
  • Publication Order Number: EVBUM2439/D

Features:

  • Selectable Base Address

Product Usage Instructions

Evaluation Board Overview

The MT9M114EBLSTCZDH-GEVB evaluation board is designed to demonstrate the features of ON Semiconductor’s image sensors products. It is intended to plug directly into the Stereo Camera system. The board provides access to the clock, I/Os, and other miscellaneous signals through test points and jumpers.

Block Diagram

Top View

Bottom View

Jumper Pin Locations

The jumpers on headboards start with Pin 1 on the leftmost side of the pin. Grouped jumpers increase in pin size with each jumper added.

Jumper/Header Functions & Default Positions

Jumper/Header No. Jumper/Header Name Default Positions Description
J5 SCLK Pins 1-2 (Default) SCLK set to S1_SCL
P50 SDATA Pins 1-2 (Default) SDATA set to S1_SDAT
P51 EXTCLK Pins 1-2 (Default) EXTCLK set to S1_CLKIN
P52 SADDR Pins 1-2 (Default) SADDR set to S0_CHAIN
P53 DOUTLSB Pins 1-2, 3-4 (Default) DOUTLSB[1:0] are used (sensor in 10-bit

configuration)
P54| CLK_SELECT| Open (Default)| DOUTLSB[1:0] are not used (sensor in 8-bit configuration)
P55| S0_CLK| Pins 1-2 (Default)| S0_CLK connected to EXTCLK

Interfacing to ON Semiconductor Stereo Camera Baseboard

The ON Semiconductor Stereo Camera baseboard has a similar 88-pin connector and 44-pin connector which mate with P1 and P2 of the headboard. The four mounting holes secure the baseboard and the headboard with spacers and screws.

FAQ

Q: What is the purpose of the MT9M114EBLSTCZDH-GEVB evaluation board?

A: The evaluation board is designed to demonstrate the features of ON Semiconductor’s image sensors products.

Q: How do I access the clock, I/Os, and other miscellaneous signals on the evaluation board?

A: The test points and jumpers on the board provide access to the clock, I/Os, and other miscellaneous signals.

Q: What are the default positions of the jumpers on the evaluation board?

A: The default positions of the jumpers are as follows:

  • J5 (SCLK): Pins 1-2
  • P50 (SDATA): Pins 1-2
  • P51 (EXTCLK): Pins 1-2
  • P52 (SADDR): Pins 1-2
  • P53 (DOUTLSB): Pins 1-2, 3-4
  • P54 (CLK_SELECT): Open
  • P55 (S0_CLK): Pins 1-2

Evaluation Board Overview

The evaluation boards are designed to demonstrate the features of ON Semiconductor’s image sensors products. This headboard is intended to plug directly into the Stereo Camera system. Test points and jumpers on the board provide access to the clock, I/Os, and other miscellaneous signals.

Features

  • Clock Input
    Default – 24 MHz Crystal Oscillator

  • Two Wire Serial Interface
    Selectable Base Address

  • Parallel Interface

  • MIPI Interface

  • ROHS Compliant

Block Diagram

ON-Semiconductor-MT9M114-Evaluation-Board-fig-1

Top View

ON-Semiconductor-MT9M114-Evaluation-Board-fig-2

Bottom View

ON-Semiconductor-MT9M114-Evaluation-Board-fig-3

Jumper Pin Locations

The jumpers on headboards start with Pin 1 on the leftmost side of the pin. Grouped jumpers increase in pin size with each jumper added.

ON-Semiconductor-MT9M114-Evaluation-Board-fig-4 Figure 5. Pin Locations for a Single Jumper. Pin 1 is Located at the Leftmost Side and Increases as it Moves to the Right

ON-Semiconductor-MT9M114-Evaluation-Board-fig-5 Figure 6. Pin Locations and Assignments of Grouped Jumpers.
Pin 1 is Located at the Top-Left Corner and Increases in a Zigzag Fashion Shown in the Picture

Jumper/Header Functions & Default Positions

Table 1. JUMPERS AND HEADERS

Jumper/Header No.| Jumper/Header Name| Pins| Description
---|---|---|---
J5| SCLK| 1−2 (Default)| SCLK set to S1_SCL
2−3| SCLK set to S0_SCLK
P50| SDATA| 1−2 (Default)| SDATA set to S1_SDAT
2−3| S0_SDATA set to S0_SDATA
P51| EXTCLK| 1−2 (Default)| EXCLK set to S1_CLKIN
1−2| EXTCLK set to S0_CLK
P52| SADDR| 1−2 (Default)| SADDR set to S0_CHAIN
2−3| SADDR set to +VDDIO
P53| DOUTLSB| 1−2, 3−4 (Default)| DOUTLSB[1:0] are used (sensor in 10-bit configuration)
Open| DOUTLSB[1:0] are not used (sensor in 8-bit configuration)
P54| CLK_SELECT| 1−2 (Default)| 24 MHz oscillator to sensor external clock inputs
2−3| FPGA clock to sensor external clock inputs
P55| S0_CLK| 1−2 (Default)| S0_CLK connected to EXTCLK
Open| External connection to EXTCLK

Interfacing to ON Semiconductor Stereo Camera Baseboard
The ON Semiconductor Stereo Camera baseboard has a similar 88-pin connector and 44-pin connector which mate with P1 and P2 of the headboard. The four mounting holes secure the baseboard and the headboard with spacers and screws.

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PUBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:

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