unicorecomm UT986 GNSS All Constellation Multi Frequency High Precision Timing Module User Manual

unicore-comm UT986 GNSS All Constellation Multi Frequency High Precision

Timing Module

Product Introduction

Overview

• UT986 is a new generation of GNSS high precision timing module supporting all constellations and multiple frequencies. It is based on the RF-baseband integrated GNSS SoC — NebulasIVTM, and is mainly used in power grids and telecom base station timing.
• UT986 has 1408 super channels, supporting BDS (including BDS-3 signals), GPS, GLONASS and Galileo multi-system joint timing and single system standalone timing, which users can flexibly configure. It also supports QZSS and DGPS function.
• UT986 module integrates filters and linear amplifiers, and has optimized radio frequency structure and interference suppression capability. With the built-in JamShield adaptive anti-jamming technology and U-AutoAlign multi-path suppression technology, it can detect interference as well as spoofing, ensuring a good performance even in complex electromagnetic environments.
• UT986 module can provide nanosecond-level PPS accuracy, support fixed-location timing, optimized-location timing, and positioning timing, and remain good timing accuracy even in complex signal environments.
• UT986 features a compact size of 17.0 mm × 22.4 mm × 2.4 mm. It adopts SMT pads, supports standard pick-and-place and fully automated integration of reflow soldering, and is compatible with previous generation of timing products as well as mainstream products on the market.

Features

Table 1-1 Product Features

Model| Grade| Dimensions (mm)| GNSS| Power

(V)

| Interface| Function
---|---|---|---|---|---|---
Industrial Grade| Automotive Grade| GPS/QZSS| BDS| GLONASS| Galileo|

3.0 to 3.6

| UART1| UART2| 1PPS| Built-in Flash| Data Update Rate| DGPS
UT986| ●| | 17.0 ×

22.4 × 2.4

| ●| ●| ●| ●| ●| ●| ●| ●| ●| 1Hz| ●

Block Diagram

Performance

Table 1-2 Key Performance/Specifications

Power|  |  |  |  |
---|---|---|---|---|---
Voltage| 3.0 V to 3.6 V DC|  |  |
Power Consumption| 700 mW|  |  |  |
RF Input|  |  |  |  |
VSWR| ≤ 2.0|  |  |  |
Input Impedance| 50 Ω|  |  |  |
Antenna Gain| 5 dB to 35 dB|  |  |
Physical Characteristics|  |  |  |  |
Dimensions| 17.0 mm × 22.4 mm × 2.4 mm|  |
Weight| 1.9 g|  |  |  |
Environmental Specifications
Operating Temperature| -40 °C to +85 °C|  |  |
Storage Temperature| -40 °C to +95 °C|  |  |
RoHS2.0| Compliant|  |  |  |
Input/output Data Interface
UART x 2| LVTTL, Baud Rate: 9600 bps to 921600 bps|
GNSS Performance|  |  |  |  |

Frequencies

| BDS: B1I, B1C, B2a GPS: L1C/A, L2C, L5 GLONASS: L1

Galileo: E1, E5a, E5b

|  |  |
TTFF1| Cold Start: 30 s Reacquisition: 3 s|  |  |
Positioning Accuracy (CEP)| 1.5 m (Dual-system horizontal, open sky)

3.0 m (Dual-system vertical, open sky)

|
Velocity Accuracy (RMS)| 0.03 m/s (Dual-system horizontal, open sky)|
 |  | GPS| BDS| GLONASS| Galileo
Sensitivity2| Cold

Start

| -147 dBm| -145 dBm| -145 dBm| -145 dBm
 | Tracking| -161 dBm| -160 dBm| -155 dBm| -155 dBm
1PPS Accuracy (RMS)3| 2.5 ns
---|---
Data Update Rate| 1 Hz
Data Format| NMEA 0183, Unicore Protocol, RTCM3.2

Precision Timing and Raw Data Output

• UT986 supports fixed-location timing, optimized-location timing, and positioning timing. Switch or query the above timing modes through CFGTM command. The module can simultaneously track all the four GNSS systems including GPS, BDS, GLONASS and Galileo, and can be switched back and forth between these four systems using CFGGNSS command.
• The default mode of UT986 module is optimized-location timing. It outputs information of the dynamic position and fixed position, which can be queried by TIMPOS command. Refer to UT986_Protocol Specification for more details.

Fixed-location Timing

• Fixed-location timing mode only applies to static scenes. In this mode, users are required to input the exact position of the receiver’s antenna center through the CFGTM command. UT986 uses this position to calculate the distance between the antenna and satellites, and calculate time to provide timing service.

Optimized-location Timing

• Optimized-location timing mode also applies to static scenes. In this mode, the receiver collects a number of positioning points (within observation time) and calculates the exact position of the antenna. After that, the position is locked down, the timing mode is switched to fixed-location timing, and the receiver provides timing based on the locked position.
• The observation time and accuracy are configured through the CFGTM command. The fixed-location timing mode is activated only after both of them are configured. Query the observation status through the TPFINFO command.
• Using the CFGTM command, the calculated position of the antenna can be saved or not. For the former, the position estimation process only needs to be done once after UT986 is installed; and for the latter, the process does again after the restart. After the optimization of the position, the timing mode of the receiver automatically switches to the fixed-location timing mode.
• If the position of the UT986 antenna changes, the command CFGTM must be sent again to switch the timing mode back to the optimized-location timing mode to recalibrate the antenna position. Refer to UT986_ Protocol Specification for more details.

Positioning Timing

• In the positioning timing mode, UT986 calculates the antenna position and time in real time. It is the only mode that supports dynamic timing, and the timing quality depends on the satellite environment, which makes it difficult to guarantee the timing accuracy.

Pulse per Second (1PPS)

• UT986 provides one 1PPS signal output with adjustable pulse width and polarity, which can be configured and queried through the CFGTP command. TIMTP is used to describe the related 1PPS information including the corresponding time and time accuracy indicators.

Serial Port (UART)

• The master serial port of UT986 is UART1, supporting data transmission and firmware upgrade, and the I/O signal type is LVTTL. The default baud rate is 460800 bps, and it can be configured by users. When designing products, please make sure that UART1 is connected to a PC or external processor to support firmware upgrade.
  Serial port 2 only supports data transmission and is unavailable for firmware upgrade, only for backup.

Protocols

Table 1-3 Supported Interface Protocols

Clock

The industrial VCTCXO is built in UT986 to ensure the stability of the clock system and the ability to capture signals quickly in weak signal environments.

Antenna

• The filter and linear amplifier are built in the UT986 module. It is recommended to use an active antenna to provide better performance.
• The antenna should support signal frequencies ranging from 1160 MHz to 1230 MHz and 1555 MHz to 1610 MHz, support right-handed circular polarization, and the output VSWR should be ≤ 2.0, gain range should be within 5 dB to 35 dB, in-band flatness < 1.5, out-of-band suppression >50 dB @2G3G4G5G communication frequencies.

Installation for Test

• This section describes how to use the EVK to test and evaluate the performance of the UT986 module.
• To ensure a successful installation, please prepare the following accessories in advance:
• UT986 EVK (including a power supply)
• Matching antenna
• Antenna cable
• Straight-through cable
• Desktop or laptop computer with serial port and UPrecise.
• Please keep the packing box and antistatic box for storage and handling.

Attention

• Many components on the UT986 module are static sensitive devices (SSD). Therefore, it is necessary to provide ESD protection for IC circuits and other SSD. Please obey all the ESD precautions and procedures.
• Electrostatic discharge (ESD) may cause damage to the device. All operations mentioned in this chapter should be carried out on an antistatic workbench using an antistatic wrist strap and conductive foam pad. If there is no antistatic workbench, wear an antistatic wrist strap and connect the other end of the strap to the metal frame to avoid electrostatic damages.
• Hold the edge of the evaluation board, and do NOT touch the components directly.
• Carefully check the board to make sure that there is no apparent loose or damaged components.
  If you have any questions, please contact Unicore or the local distributors .

Installation

After the above preparation, please follow the steps below to install.

• Step1. Ensure adequate antistatic measures, such as wearing a grounded antistatic wrist strap, using a grounded workbench, etc.
• Step2. Open UT986 EVK and take out the evaluation board.
• Step3. Select the GNSS antenna with appropriate gain (the system frequency supported by the antenna should be consistent with the module), fix it in a nonoccluded area, and use the appropriate cable to connect the antenna with the UT986 evaluation board.
• Step4. Connect PC to COM1 or COM2 of the evaluation board with a straight-through cable.
• Step5. Power on the evaluation board and initialize UT986.
• Step6. Open the UPrecise software.
• Step7. Control the receiver via UPrecise to display constellations view, messages, the receiver’s status, etc.

Electrical Specifications

Absolute Maximum Ratings

Table Absolute Maximum Ratings

(HBM)

|  | 2000| V| All pins

Operational Conditions

Table 3-2 Operational Conditions

IO Threshold Values
Table 3-3 IO Threshold Values

Antenna Characteristics

Table 3-4 Antenna Characteristics

Mechanical Specifications

Table 3-5 Dimensions

K (Outer edge of

the stamp hole)

| 0.70| 0.80| 0.90
M| 0.90| 1.00| 1.10
N (Inner edge of

the stamp hole)

| Φ0.40| Φ0.50| Φ0.60
P| 5.10| 5.20| 5.30
R| 4.40| 4.50| 4.60
X| 0.90| 1.00| 1.10

Pin Definition

Table 3-6 Pin Definition

1

|

TXD2

|

O

|

LVTTL

| COM2 for data transmission. Firmware upgrade is not supported.

Leave this pin floating if idle.

2

|

RXD2

|

I

|

LVTTL

| COM2 for data reception. Firmware upgrade is not supported.

Leave this pin floating if idle.

3| TXD1| O| LVTTL| COM1 for data transmission. Firmware upgrade is supported.
4| RXD1| I| LVTTL| COM1 for data reception. Firmware upgrade is supported.
5| NC|  |  | No connection inside
6| VCC| I| 3.0 V to 3.6 V| Power supply
7| GND| —|  | Ground
8| NC|  |  | No connection inside
9| RSV|  |  | Reserved (recommended to be

floating)

10| nRESET| I| LVTTL| External reset pin, active low
No.| Name| I/O| Electrical Level| Description
---|---|---|---|---
11| V_BCKP5| I| 2.0 V to 3.6 V| When the main power supply VCC is cut off, V_BCKP supplies power to RTC and SRAM. The level requirement is 2.0 V to 3.6 V.

The working current of V_BCKP is about 20 μA at 25 °C when VCC is cut off.

Leave this pin floating when hot start

function is disabled.

12| RSV|  | | Reserved (recommended to be

floating)

13| GND| —|  | Ground
14| GND| —|  | Ground
15| GND| —|  | Ground
16| RF_IN| I|  | GNSS signal input
17| GND| —|  | Ground
18| NC|  |  | No connection inside
19| NC|  |  | No connection inside
20| NC|  |  | No connection inside
21| NC|  |  | No connection inside
22| NC|  |  | No connection inside
23| NC|  |  | No connection inside
24| GND| —|  | Ground
25| RSV|  |  | Reserved (recommended to be

floating)

26| NC|  |  | No connection inside
27| NC|  |  | No connection inside
28| TIME PULSE| O| LVTTL| 1PPS (Leave this pin floating if idle.)

Hardware Design

Hardware Reference Design

UT986 just supports feeding the antenna from the outside of the module rather than from the inside. It is recommended to use devices with high power and that can withstand high voltage. Gas discharge tube, varistor, TVS tube and other high-power protective devices may also be used in the power supply circuit to further protect the module from lightning strike and surge .

Remarks:

• L1: feed inductor, 68 nH RF inductor in 0603 package is recommended. The rated current of the L1 inductor should be larger than the operating current of the selected antenna, and leave enough design margin
• C1 : decoupling capacitor, recommended to connect two capacitors of 100 nF/100 pF in parallel
• C3 : DC blocking capacitor, recommended 100 pF capacitor
• D1 : ESD diode, choose the ESD protection device that supports high frequency signals (above 1000 MHz)
• D2: TVS diode, choose the TVS diode with appropriate clamping specification according to the requirement of feed voltage and antenna voltage
• RF_IN does not feed the antenna. You need to design the antenna feed circuit according to the antenna you choose.

Power Supply VCC

• In order to guarantee the module works normally, the initial voltage level of VCC should be less than 0.4 V when powered on, and it should be monotonic. The undershoot and ringing should be within 5% of VCC. As far as the power-on waveform, the rise time from 10% to 90% should be within 1 ms to 10 ms. And the time interval between the last power-off (after VCC < 0.4 V) to the next power-on should be more than 500 ms.
• It is recommended to use the same power supply for the VCC of UT986 and the IO of Host, so as to avoid abnormal startup caused by the IO leakage between UT986 and Host. The power supply of UT986 VCC ranges from 3.0 V to 3.6 V, and the input decoupling capacitor C2 needs to be more than 10 μF. Other capacitors, such as 1 μF/ 100 nF/ 100 pF, can be connected in parallel.

Serial Port

• The two serial ports of UT986 are LVTTL, which need to be converted through RS232 level if connected to a PC.
• The TXD1 and RXD1 of UT986 are necessary ports which need to be connected to the corresponding UART of Host.
• The TXD2 and RXD2 of UT986 are optional ports which can be connected or unconnected depending on the situation.
• It is recommended to reserve a test point for serial port 2 as the debug port.
• If there is data input at the digital IO (including RXD1, TXD1, RXD2, TXD2, TIME PULSE, and nRESET) when the module is not powered on, it will form a leakage on the VCC. And if the leakage voltage is higher than 0.4 V, it may cause a start failure when the module is powered on. Therefore, in order to prevent the leakage, ensure that the IO ports connected to the module are in high impedance or low level before the module is powered on.

RESET Timing Requirement

• The module’s reset pin nRESET and power supply VCC should meet the following requirement of time sequence when powering up. During its normal operation, pulling down the nRESET pin for more than 2.5 ms can also reset the UT986 module.
• The reset pin nRESET is effective when lower than 0.3 V.

TIME PULSE Output

• The TIME PULSE of UT986 is the output of time signals, which are important functional signals and needs to be connected to the time scale input IO of the Host. The period PULSE output a signal is 1 s, and the default duty cycle is 10%.

Layout Recommendation

• Power supply: Stable and low ripple power is necessary for good performance. Make sure the peak-to-peak ripple voltage does not exceed 50 mV.
• Use LDO to ensure the purity of power supply
• Place LDO as close to the module as possible in layout
• Widen the power circuit wiring or use split copper surface to transmit current
• Keep away from any high power or high inductance devices such as a magnetic coil.
• Antenna link: The antenna link requires 50 Ω impedance matching. The RF routing connecting RF_IN and the antenna should have 50 Ω impedance, as short and smooth as possible, and avoid acute angles.
• Antenna location: To obtain a good signal-to-noise ratio, ensure that the antenna is well isolated from electromagnetic radiation sources, especially electromagnetic radiation in the frequency range of 1100 MHz to 1610 MHz.
• Try to avoid circuits below the UT986 module.
• UT986 is a temperature-sensitive device and rapid temperature changes can result in reduced performance. Keep it away as far as possible from any high-temperature air and high-power heating devices.
• Connect all the GND pins of UT986 to the ground.
• All the RSV pins are reserved and it is recommended to keep them floating.
• The thermal pad of UT986 must be connected to a large area of grounding copper to effectively dissipate heat.

Grounding and Heat Dissipation

There are 35 pads in the middle rectangle area of UT986 module, which are used for grounding and heat dissipation. When designing PCB, connect the pads to a large size of ground to facilitate heat dissipation.

Packaging

Product Label

Packaging Description
UT986 module uses carrier tape and reel (suitable for mainstream surface mount devices), packaged in vacuum-sealed aluminum foil antistatic bags, with a desiccant inside to prevent moisture. When using reflow welding process to weld modules, please strictly comply with IPC standard to conduct humidity control on the modules. As packaging materials such as carrier tape can only withstand the temperature of 55 °C, modules should be removed from the package during baking.

Dimension

Table 5-1 Packaging Description

External diameter: 330 ±2 mm, Internal diameter: 180 ±2mm,

Width of internal diameter: 44.5 ±0.5 mm,

Thickness: 2.0 ±0.2 mm

Carrier Tape| Module spacing (center-to-center distance): 24 mm

• UT986 module is rated at MSL level 3. For more information about packaging and handling precautions related to the Moisture Sensitivity Level, please refer to the
• IPC/JEDEC J-STD-020 standards. Users may access to the website www.jedec.org to find out more details.
• The shelf life of the UT986 module packaged in vacuum-sealed aluminum foil antistatic bags is one year.

Production and Maintenance

Disassembly

When disassembling the module, it is recommended to melt the soldering tin of the pins on both sides of the module with an electric soldering iron and remove the module with a tweezer. Do NOT use other means to remove the module (for example, blow off the module with a hot air gun), which may damage the module.

Clean

Do NOT use alcohol or other organic solvents to clean the module, or it may lead to flux residues entering into the shielding shell, causing mildew and other problems.

Reflow Soldering

• To prevent falling off during soldering of the module, do not solder it on the back of the board during design, and it is not recommended to go through soldering cycle twice.
• The setting of soldering temperature depends on many factors of the factory, such as board type, solder paste type, solder paste thickness, etc. Please also refer to the relevant IPC standards and indicators of solder paste.
• Since the lead soldering temperature is relatively low, if using this method, please give priority to other components on the board.
• The opening of the stencil needs to meet your design requirement and comply to the examine standards. The thickness of the stencil must be larger than 0.15 mm and it is recommended to be larger than 0.18 mm.
• The recommended reflow temperature curve is shown in the figure below.

Temperature Rising Stage

• Rising slope: Max. 3 °C/s
• Rising temperature range : 50 °C to 150°C

Preheating Stage

• Preheating time : 60 s to 120 s
• Preheating temperature range: 150 °C to 180 °C

Reflux Stage

• Over melting temperature (217 °C) time : 40 s to 60 s
• Peak temperature for soldering : No higher than 245 °C

Cooling Stage

• Cooling slope: Max 4 °C/s

Unicore Communications, Inc.

• F3, No.7, Fengxian East Road, Haidian, Beijing, P.R.China,100094
• www.unicorecomm.com
• Phone: 8610 69939800
• Fax: 8610 69939888
• info@unicorecomm.com

Legal Right Notice

• Th is manual provides information and details on the products of Unicore Communication Inc. ((“ Unicore”) referred to herein.
• All rights, title and interest to this document and the information such as data, designs, layouts contained in this manual are fully reserved, including but not limited to the copyrights, patents, trademarks and other proprietary rights as relevant governing laws may grant, a nd such rights may evolve and be approved, registered or granted from the whole information aforesaid or any part(s) of it or any combination of those parts.
• Unicoreholds the trademarks of UNICORECOMM ” and other trade name, trademark, icon, logo, brand name and/or service mark of Unicore products or their product serial referred to in this manual (collectively “ Unicore Trademarks”).
• This manual or any part of it, shall not be deemed as, either expressly, implied, by estoppel or any other form, the granting or transferring of Unicore rights and/or interests (including but not limited to the aforementioned trademark rights), in whole or in part.

Disclaimer

• The information contained in this manual is provided “as is” and is believed to be true and cor rect at the time of its publication or revision. This manual does not represent, and in any case, shall not be construed as a commitments or warranty on the part of
• Unicore with respect to the fitness for a particular purpose/use, the accuracy, reliability and correctness of the information contained herein.
• Information, such as product specifications, descriptions, features and user guide in this manual, are subject to change by Unicore at any time without prior notice, which may not be completely consiste nt with such information of the specific product you purchase.
• Should you purchase our product and encounter any inconsistency, please contact us or our local authorized distributor for the most up to date version of this manual along with any addenda or c orrigenda.

Foreword

• This manual provides information about the product characteristics, installation and use, performance indicators and hardware design of the UT986 module.

Target Readers

• This manual applies to technicians who have a certain knowledge of GNSS modules.

Revision History

• Copyright© 20092022, Unicore Communications,
• Data is subject to change without notice.
• WWW.UNICORECOMM.COM

Documents / Resources

| unicorecomm UT986 GNSS All Constellation Multi Frequency High Precision Timing Module [pdf] User Manual
UT986, UT986 GNSS All Constellation Multi Frequency High Precision Timing Module, GNSS All Constellation Multi Frequency High Precision Timing Module, All Constellation Multi Frequency High Precision Timing Module, Multi Frequency High Precision Timing Module, High Precision Timing Module, Timing Module
---|---

References

• Home | JEDEC
• Home | JEDEC
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