NXP UM11815 Synchronous Rectifier Evaluation Board User Manual

UM11815
TEA2096DB2201 synchronous rectifier evaluation board
Rev. 1 — 19 September 2022
User manual

Document information
Revision history

Important notice

IMPORTANT NOTICE
For engineering development or evaluation purposes only
NXP provides the product under the following conditions:
This evaluation kit is for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY.
It is provided as a sample IC pre-soldered to a printed-circuit board to make it easier to access inputs, outputs and supply terminals. This evaluation board may be used with  any development system or other source of I/O signals by connecting it to the host MCU computer board via off-the-shelf cables. This evaluation board is not a Reference  ****Design and is not intended to represent a final design recommendation for any particular application. Final device in an application heavily depends on proper printed-circuit  board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality.
The product provided may not be complete in terms of required design, marketing, and or manufacturing related protective considerations, including product safety measures  typically found in the end device incorporating the product. Due to the open construction of the product, it is the responsibility of the user to take all appropriate  precautions for electric discharge. In order to minimize risks associated with the customers’ applications, adequate design and operating safeguards must be provided by the  customer to minimize inherent or procedural hazards. For any safety concerns, contact NXP sales and technical support services.

Safety warning

The board application is AC-mains voltage powered. Avoid touching the board while it is connected to the mains voltage and when it is in operation. An isolated housing is obligatory when used in uncontrolled, non-laboratory environments. Galvanic isolation from the mains phase using a fixed or variable transformer is always recommended.
Figure 1 shows the symbols on how to recognize these devices.

Introduction

WARNING
****Lethal voltage and fire ignition hazard The non-insulated high voltages that are present when operating this product, constitute a risk of electric shock, personal injury, death and/ or ignition of fire. This product is intended for evaluation purposes only.
It shall be operated in a designated test area by personnel qualified according to local requirements and labor laws to work with non-insulate d mains voltages and high- voltage circuits. This product shall never be operated unattended.
The TEA2096DB2201 evaluation board is intended for engineers involved in the evaluation and the design of switch-mode power supplies (SMPS).
This user manual contains all the information required to replace the secondary-side rectification of an existing SMPS with a resonant topology with the TEA2096DB2201
evaluation board.

Finding kit resources and information on the NXP website

NXP Semiconductors provides online resources for this user manual and its supported devices at https://www.nxp.com.
This design example user manual can be found at: https://www.nxp.com/TEA2096DB2201.
4.1 Collaborate in the NXP community
In the NXP community you can share ideas and tips, ask and answer technical questions, and receive input on just about any embedded design topic.
The NXP community can be found at https://community.nxp.com.

Getting ready

5.1 Box contents
The box contains the TEA2096DB2201 evaluation board. This evaluation board incorporates the TEA2096T in an SO-8 package and two 150 V MOSFETs in a PGTDSON-8 package with a typical RDSon of 9.3 mΩ.
Figure2 shows the top side and bottom side of the evaluation board. The TEA2096DB2201 evaluation board is a single layer board with one plated-through via for improved  solderability and robustness.

Getting to know the hardware

6.1 Overview
The TEA2096DB2201 evaluation board contains a TEA2096T SR controller in an SO-8 package and two 150 V MOSFETs in PD-TSON-8 package.
The TEA2096T is a dedicated controller IC for synchronous rectification on the secondary side of resonant converters. It incorporates two stages for sensing and driving the  SR MOSFETs, which rectify the outputs of the central tap secondary transformer windings. The TEA2096T has a drain-source voltage rating of 200 V.
These features make the evaluation board suitable for applications with an output voltage of up to 60 V.

6.2 Features

• Dual synchronous rectification for resonant converters
• Easy replacement of secondary-side rectifiers of an existing resonant converter
• Differential inputs for sensing the drain and source voltages of each SR MOSFET independently
• Adaptive gate drive for fast turn-off at the end of conduction and maximum efficiency at any load
• Regulation level of −25 mV for driving low-ohmic MOSFETs
• SR control without minimum on-time
• Supports 1 MHz switching frequency
• Interlock function to prevent simultaneous conduction of the external MOSFETs
• Wide supply voltage range from 4.75 V to 38 V
• Supports 5 V supply operation with logic level SR MOSFETs
• Supply current in energy save operation of 80 μA
• Under voltage lockout (UVLO) protection with active gate pull-down

6.3 Block diagram

6.4 Board description
The board consists of the TEA2096T SR and two SR MOSFETs. The TEA2096T acts as a dual controlled amplifier. For each side, the input is the voltage difference  between drain and source. The corresponding gate driver signal is the output.
To ensure that the layout design for a single-sided board is easy, resistors R4 and R5 are added. Keep the resistor value 0 Ω for the fastest turn-off time. Capacitor C1 is a decoupling capacitor for the VCC pin of the TEA2096T. Connect it close to the IC. In combination with resistor R5, it acts as a simple RC filter.
Provisions are made for snubbers resistor R2/capacitor C2 and resistor R3/capacitor C3.
The components are not mounted. However, if high-voltage spikes are present on the drain-source connections of the MOSFETs, they can be added.

6.5 Operational behavior

6.5.1 Turn-on
When the drain-source voltage drops to below the turn-on threshold (−400 mV), the MOSFETs are turned on. The corresponding gate driver output turns on the external SR MOSFET. The gate of this MOSFET is rapidly charged to a level that exceeds its threshold level. After the turn-on phase, the regulation phase starts. There is no  minimum on-time.
6.5.2 Regulation mode and turn-off
During regulation mode, the IC regulates the voltage difference between the drain and the source sense inputs to an absolute level of 25 mV. The corresponding gate driver output level is adjusted accordingly. In this mode, the gate driver voltage follows the waveform of the current through the external MOSFET. When the current drops to lower values, the corresponding gate driver output is discharged to a value just above the gate threshold voltage of the external MOSFET. When the current reaches zero, the  discharge enables a quick turn-off of the external MOSFET.
Especially at continuous conduction mode (CCM) conditions, choose a MOSFET with a sufficiently low RD Son value. It enables the discharge of the gate driver output to  just above the gate-source threshold level of the external MOSFET. When the current drops to zero, this discharge makes a rapid switch- off possible.
Rapid switch-off is very important for CCM conditions. It minimizes the reverse current and the related voltage overshoot on the drain terminal of the external MOSFET.
When the drain voltage exceeds 150 mV, the driver output voltage is actively pulled low.

6.5.3 Synchronous rectification waveforms

6.5.4 Interlock function
The TEA2096T incorporates an interlock function. The interlock function avoids the turron of both gate driver outputs at the same time.
After one gate driver output is turned off, the IC waits maximum 200 ns (td(interlock)) before turning on the other gate driver output.

Connecting the hardware

Figure 5 shows an example of the TEA2096DB2201 evaluation board used in a typical resonant adapter.![NXP UM11815 Synchronous Rectifier Evaluation Board

• Figure 5](https://manuals.plus/wp-content/uploads/2023/03/NXP-UM11815 -Synchronous-Rectifier-Evaluation-Board-Figure-5.png)

Figure 3 and Figure 6 show the connection of the TEA2096DB2201 evaluation board to the secondary side of an LLC controller board. The evaluation board has four connections.
Connect the pads SECA and SECB to the secondary outputs of the transformer. Connect the GND pad to the power ground of the main board. Use thick wires for the  SECA, SECB, and GND connections, because the currents in these tracks can be high.
For output voltages up to 38 V, the XV connection can be connected to the Vought of  the main board. For output voltages of more than 38 V, a series regulator is required to reduce the supply voltage of the TEA2096T to below 38 V. When a series regulator is used, a trade-off can be made between the dissipation in the regulator and the dissipation in the TEA2096T.

Schematic, board layout and bill of materials

8.1 Schematic

8.2 Bill of materials
Table 1. TEA2096DB2201 bill of materials (BOM)

Reference| Description and values| Part number| Manufacturer
---|---|---|---
C1| capacitor; 100 nF; 50 V; 0805| –| –
C2; C3| capacitor; not mounted; 1 nF; 150 V; 0805| –| –
Q1; Q2| MOSFET; 150 V; 9.3 mΩ; PG- TDSON-8| BSC093N15NS5ATMA1| Infineon
R4; R5| resistor; 0 Ω; 0805| –| –
R2; R3| resistor; not mounted; 10 Ω; 0805| –| –
R1| resistor; 10 Ω; 0805| –| –
U12| IC; TEA2096T| –| NXP Semiconductors

8.3 Board layout

Below are several important guidelines for a good layout:

• Keep the trace from the DSA/B pin to the MOSFET drain pin as short as possible.
• Keep the trace from the SSA/B pin to MOSFET source pin as short as possible.
• Keep the area of the loop DSA/B pin-MOSFET drain-MOSFET source-SSA/B pin as small as possible. Make sure that this loop overlaps the power drain track or  power source track as little as possible. And ensure that the two loops do not cross each other.
• Keep tracks from GATE pins to gate of MOSFETs as short as possible.
• Decouple pins VCC and GND as close to the IC as possible with a small (100 mph) capacitor.
• Use separate clean tracks for the VCC pin and GND.
• Use a GND plane underneath the IC connected to the GND pin. It results in a better heat dispersion.
• Keep the ground and source sense tracks separated. Use separate tracks for each source sense connection and connect the IC ground to the ground plane on the PCB.

Abbreviations

Table 2. Abbreviations

References

[1] TEA2096T data sheet — Dual synchronous rectifier controller; 2022, NXP Semiconductors

Legal information

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Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

© 2022 NXP B.V.
For more information, please visit: http://www.nxp.com
All rights reserved.
Date of release: 19 September 2022
Document identifier: UM11815
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