intel Transceiver Signal Integrity Development Kit Stratix10 Tx Edition User Guide

June 3, 2024
Intel

TRANSCEIVER SIGNAL
INTEGRITY DEVELOPMENT KIT,
INTEL® STRATIX® 10 TX EDITION
Quick start guideintel Transceiver Signal Integrity Development Kit
Stratix10 Tx EditionA Complete Development Platform for Prototyping

Introduction

Intel’s Transceiver Signal IntegrityDevelopment Kit, Intel® Stratix® 10 TX Edition helps you thoroughly evaluate the signal integrity of Intel Stratix 10 TX FPGA transceivers. With this kit, you can:

  • Evaluate transceiver performance up to 58 Gbps PAM4 and 30 Gbps NRZ
  • Generate and check pseudo-random binary sequence (PRBS) patterns via an easy-to-use GUI
  • Dynamically change differential output voltage (VOD), pre-emphasis, and equalization settings to optimize transceiver performance for your channel
  • Perform jitter analysis
  • Verify physical medium attachment (PMA) compliance to PCI Express (PCIe), 10G/25G/50G/100G/200G/ 400G Ethernet and other major standards

What’s in the Box

  • Intel Stratix 10 Transceiver Signal Integrity Development Board TX Edition
    – Intel Stratix 10 TX 1ST280EY2F55E2VGS1
    – Two full-duplex transceiver channels with 2.4 mm SMA connectors
    – 24 full-duplex transceiver channels to FMC+ connector
    – Eight full-duplex transceiver channels to OSFP optical interface
    – 16 full-duplex transceiver channels to both QSFP-DD 1×2 and QSFP-DD 2×1 optical interfaces
    – Eight transceiver channels to QSFP-DD 1×1 optical interface
    – Four full-duplex transceiver channels to MXP 0, MXP 1, MXP 2, and MXP 3 high-density connectors
    – Ethernet PHY

  • AC adapter power supply and 24-pin to 6-pin power adapter cable

  • USB type A to B cable

  • FMC+ loopback daughtercard

  • Ethernet cable

  • Printed documentation

Download the latest development kit software tools from www.altera.com and unzip the software package to anywhere on your computer.
Directory Structure

Using the Transceiver Signal Integrity Demonstration
The Transceiver Signal Integrity Demonstration consists of a Java-based GUI and an FPGA design. To run the demonstration follow these steps:

  1. Connect the Intel FPGA Download Cable from your PC to the board.
  2. If the Intel FPGA Download Cable driver is not installed on your PC, install the driver using the instructions in the user guide.
  3. Connect 2.4 mm SMA cables from one or more channels on the board to an oscilloscope capable of displaying the data rates you wish to observe. Make sure SW5.1 is set to ON position and power up the board.
  4. Launch the BoardTestSystem.exe file, located at stratix10TX_1st280yf55_si\examples\boardtest system. For optimal viewing, your screen resolution must be 1024×768 or greater.
  5. Set PMA options in the Transceiver Channel Controls section.
  6. Observe the resulting eye diagram on the oscilloscope and monitor the link statistics shown on the screen.

For information on bit error rate (BER) calculation, equalization settings, and other details regarding this demonstration, refer to the user guide. Visit the Transceiver Signal Integrity Development Kit page ( www.altera.com/products/boards_and_kits/dev-kits/altera/kits-s10-tx- si.html ) for the latest documentation and designs.

** Electromagnetic inter ference caused by any modification made to the kit contents is the sole responsibilit y of the user. This equipment is designated for use only in an industrial research environment.
Without proper anti-static handling, the board can be damaged. Therefore, use anti-static handling precautions when touching the board.
FCC NOTICE:
This kit is designed to allow:**

  1. Product developers to evaluate electronic components, circuitr y, or software associated with the kit to determine whether to incorporate such items in a finished product and
  2. Software developers to write software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or other wise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under FCC Part 5 of CFR Title 47.

© Intel Corporation. All rights reserved. Intel, the Intel logo, the Intel Inside mark and logo, the Intel. Experience What’s Inside mark and logo, Altera, Arria, Cyclone, Enpirion, Intel Atom, Intel Core, Intel Xeon, MAX, Nios, Quartus and Stratix are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. Other marks and brands may be claimed as the property of others. Intel reserves the right to make changes to any products and services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.

L01-44549-00

Documents / Resources

| intel Transceiver Signal Integrity Development Kit Stratix10 Tx Edition [pdf] User Guide
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