ams TMD3719 Flicker Detection User Guide

ams TMD3719 Flicker Detection

Introduction

The TMD3719 features ambient light and color (RGB) sensing, proximity and flicker detection. The device integrates direct detection of ambient light flicker for 4 selectable frequency bins. There are two flicker detection modes; On-chip mode and data sampling mode. During the data sampling mode, the flicker detection engine can buffer data in a FIFO for calculating other flicker frequencies externally. In this document, the registers necessary to configure and the usage of both modes will be discussed.
Flicker Detection Registers
The TMD3719 registers necessary to make the flicker function work are summarized in this section. These registers can also be found in the datasheet.
The values of all registers and fields that are listed as reserved or are not listed, must not be changed at any time.
FD_CFG0 Register (Address 0x40)

FD_CFG0

1. If FD_MODE = 1 (register 0x82 [6]) then the number of samples changes from 1024 to unlimited.

FD_CFG5 Register (Address 0x45)
FD_CFG5 Register

1.  Select which modulator channels should be connected/used by the on_ chip flicker engine. Note that the bitstreams are added before the engine evaluates the data. The register bits are one hot encoded where bit 0 means modulator 0, and so on.

FD_CFG7 Register (Address 0x47)

FD_CFG7 Register
FD_CFG7 Register (Address 0x48)
FD_CFG8 Register

ENABLE Register (Address 0x80)

ENABLE Registe
MEAS_MODE1 Register (Address 0x82) MEAS_MODE1 Register
MOD_GAIN_0_1 Register (Address 0x89)
MOD_GAIN_0_1 Register
MOD_GAIN_2_3 Register (Address 0x8A)
**MOD_GAIN_2_3 Register
MOD_GAIN_4_5 Register (Address 0x8B)
**MOD_GAIN_4_5 Register
MOD_GAIN_6_7 Register (Address 0x8C)
MOD_GAIN_6_7 Register 

CONTROL Register (Address 0xF6)

CONTROL Register
FIFO_MAP2 Register (Address 0xFA
FIFO_MAP2 Register
FIFO_STATUS Register (Address 0xFB)
FIFO_STATUS Register
FIFO Buffer Data Register (Address 0xFC – 0xFF)
**FIFO Buffer Data Register**

Flicker Detection Modes

On-Chip Mode
Flicker function can be activated by the flicker enable bit in register 0x80 bit 6 (MEAS_MODE1.FDEN). Writing a 1 activates flicker detection. Writing a 0 disables flicker detection. The time to measure for flicker is set by using register FD_CFG0.FD_TIME (0x40 bits [1:0]). The sampling time can be set to 50/100/200 milliseconds for a frequency bin resolution of 20/10/5 Hz, respectively. Also, a user defined FD_TIME can be defined by FD_SAMPLE_TIME in registers FD_CFG7 (0x47 bits [7:0]) and FD_CFG8 (0x48 [1:0]) in combination with FD_SAMPLES of register FD_CFG0 (0x40 bits [4:3]). When setting register FD_CFG0.FD_TIME (0x40 bits [1:0]) to one of the preset sampling times, registers FD_CFG7 (0x47) and FD_CFG8 (0x48) are set with a preset value for sample time. These preset values are shown in . Registers FD_CFG7 (0x47) and FD_CFG8 (0x48) combine to make a 10-bit value.
Flicker Sampling Time Configurations

1. When selecting 50 ms/100 ms/200 ms, register FD_SAMPLES gets overwritten with 128.
2. Unlimited, if FD_MODE = 1, FIFO_WRITE_FD_DATA = 1, and FIFO_MODE > 0 else 1024.
3. FD_TIME = FD_SAMPLES (FD_SAMPLE_TIME + 1) modclk; modclk = 2.71 µs.

For example: FD_CFG0 (0x40) = 0x01(default) – This selects FD_TIME as 100 ms. Therefore, FD_SAMPLES = 128 and FD_SAMPLE_TIME = 287.
The on-chip flicker function uses the Goertzel Algorithm embedded in the device.
TMD3719 GUI
**Explanation of Fields in the Above GUI Image
**

1. Can be used to select different combinations using number of samples (0x40 [4:3]) and sample time (0x47, 0x48).
2. If fd_mode = 1, fifo_write_fddata = 1, and fifo mode > 0 else 1024.

Data Sampling Mode
This section gives guidance on configuring flicker for 16-bit sampling mode and accessing flicker detection data from the FIFO. This section shows an example of a specific flicker configuration. Adjustment to the configuration could be made for a different application. FIFO access can be read out with single reads starting at FDATA0 (0xFC). 4 consecutive I2C addresses have to be read to get a full data set. Upon reading FDATA3 (0xFF), then reading FDATA0 again (I2C address wrap around) it automatically decreases the FIFO_STATUS.FIFO_LVL (0xFB). If reading beyond the end of the FIFO, data will return 0x00. There is no under-run flag, this is not as error condition.
Configuring Flicker Detection:

1. Configure ENABLE (0x80) = 0x01 – (Enable PON).
2.  Configure FD_CFG0 (0x40) = 0x02 – (FD_TIME = 200 ms, FD_SAMPLES = 128).
3. Configure MOD_GAIN
   •  MOD_GAIN_0_1 (0x89) = 0x02 – (8x)
   •  MOD_GAIN_2_3 (0x8A) = 0x02 – (8x)
   • MOD_GAIN_4_5 (0x8B) = 0x02 – (8x)
   •  MOD_GAIN_6_7 (0x8C) = 0x02 – (8x)
4. Configure FD_CFG5 (0x45) = 0x00 – (All flicker channels active).
5. Configure MEAS_MODE1 (0x82) = 0x43 – (FD_MODE = sampling mode, FIFO_MODE = 16 bits).
6. Configure FIFO_MAP2 (0xFA) = 0x08 (Write data to FIFO).

Clearing the FIFO:

1. Read ENABLE register (0x80) contents and save it to a variable ‘A’.
2.  Set ENABLE register (0x80) to 0x1, only PON is enabled.
3. Read CONTROL register (0xF6) and save it to a variable ‘B’.
4. Set variable ‘B’ bit 1 (FIFO_CLR) to 1, leave other bits same.
5. Write ‘B’ back to CONTROL register (0xF6).
6. Write variable ‘A’ to ENABLE register (0x80) to recover the original state.
7. Configure ENABLE (0x80) = 0x41 (PON = 1, FDEN=1).

Polling Flicker Data

1.  Read FIFO_STATUS (0xFB).
2.  Check FIFO_OV (0xFB [7]) – FIFO buffer overflow, if flag is set information has been lost.
3. Check FIFO_LVL (0xFB [6:0]) – FIFO level, indicates number of entries available.
4. If FIFO_OV = 1 then;
5.  Clear FIFO.
6.  Delay 50 ms.
7.  If FIFO_LVL is not 0 then;
8. Poll FIFO buffer data FDATA (0xFC, 0xFD, 0xFE, 0xFF).

Polling of the FIFO should be done such that the FIFO does not overflow. FIFO capacity is 256 bytes, the highest FIFO level is 256/4 = 64. If 200 ms is selected for FD_TIME, FD_SAMPLES would be equal to 128 and while sampling the FIFO at 200 ms. The FIFO would more than likely overflow creating loss of data since 128 samples
(256 bytes) is the full depth of the FIFO. If the FIFO sampling frequency was reduced to 100 ms, the number of samples would be 64 (128 bytes), which is only half of the FIFO size then you will not have FIFO overflow. Therefore, to calculate the appropriate sample time, determine what will fill half of the FIFO or at most 2/3 of the FIFO and use that time as the sampling period.
Summary / Results
There are two modes for configuring the flicker function in this device, on- chip and data sampling. On-chip flicker detection uses an embedded algorithm and data sampling uses FIFO to access data. ams OSRAM provides a robust flicker detection functionality in many devices, the primary application for the flicker detection function would be flicker-immune camera operation. These efforts can make it easier to minimize flicker-induced problems.
Revision Information

•  Page and figure numbers for the previous version may differ from page and figure numbers in the current revision.
• Correction of typographical errors is not explicitly mentioned.

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