msi G4101 Global Server User Guide
- June 16, 2024
- MSI
Table of Contents
**msi G4101 Global Server User Guide
**
QUICK START GUIDE ****
CPU
1 x AMD EPYC™ 9004 Series Processor, cores Up to 128C, TDP 500W
Front Panel Connector
JFP1
2 241
23
1| VDD_33_DUAL| 2| P3V3_AUX| 3| N/A| 4| P3V3_AUX
5| FP_PWR_LED_B_R_N| 6| FP_ID_LED_B_R_N| 7| VDD_33_RUN| 8| SYS_ERR_LED#_N
9| FP_HDD_ACT_LED_N| 10| SYS_FLT_LED#_N| 11| FP_PWR_BTN_L_R| 12| VDD_33_DUAL
13| GND| 14| LAN_NIC_0_ACT_N_R| 15| FP_RST_BTN_L_R| 16|
SMB_BMC_HSBP_STBY_LVC3_SDA
17| GND| 18| SMB_BMCHSBP STBY_LVC3_SCL| 19| FP_ID_BTN_N_R| 20|
FP_CHASSIS_INTRUSION (TP)
21| GND| 22| VDD_33_DUAL| 23| NMI_BTN_N_R| 24| LAN_NIC_1_ACT_N_R
CPU and Heatsink Installation
Connectors, Jumpers and LED Indicators
| Name | Description |
|---|---|
| JMCIO1~8 | MCIO 8i connectors |
| M2_1~2 | M.2 slots (M Key, PCIe 3.0 x4/x2, 22110/ 2280) |
| PCIE_SLOT1~4 | PCIe 5.0 x 16 slots (Gen 5 x16 signal) |
| PCIE_SLOT5~6 | PCIe 4.0 x 16 slots (Gen 4 x8/x16 signal) |
| JPWR_MB1~4 | 6-pin 12V power connectors (for MB PWR) |
| JPWR_MB5 | 6-pin 12V power connector (for BP PWR) |
| JPWR_MB6, JPWR_MB8 | 4-pin power connectors (5V) |
| JPWR_MB7, JPWR_MB9 | 4-pin power connectors (3V) |
| JPWR_HDD1 | HDD/SATA power connector (on PDB) |
| SYS_FAN1~8 | System/CPU fan power connectors |
| CPU_FAN1~2 | CPU pump power connectors |
| WATER_LEAKING1 | CPU pump water leak detection connector |
| DOM1 | USB 3.2 Gen 1 Type-A connector |
| JREAR1, JFUSB1 | USB 3.2 port box headers |
| JVGA | Front VGA header |
| LAN1 | GbE RJ45 Port (for mgmt.) |
| JFP1 | Front panel connector |
| JTPM1 | SPI TPM module box header |
| J95X8 | 95X8 I/O board header |
| JIPMB1 | IPMB box header |
| JPSU1 | PDB header |
| BP_I2C_1, PDB_I2C_1 | I2C headers |
| JCOM1 | COM port box header |
| JBTN1 | Power button header |
| JRST1 | Reset button header |
| JUID | UID button header |
| JCHASSIS1 | Chassis intrusion header |
| BMC_HB_LED | BMC Heartbeat LED |
| SEG_LED1~4 | Port 80 Debug LEDs |
| Name | Description |
| --- | --- |
| JRTC_CLR1 | CMOS clear (default pin 1-2 normal) |
| JUID_SEL1 | UID/ BMC reset button (default pin 1-2 UID button) |
| JSEL_BMC1 | BMC selection (default pin 2-3 BMC1) |
| JSATA_NVME_SW1 | JMCIO1~2 SATA/ NVMe signal setting(pin 1-2 SATA signal / pin |
2-3 NVMe signal, default)
Memory
The server board supports RDIMM/ 3DS RDIMM, and DIMM speeds up to 4800MT/s.
Channel Qty. of DDR5| L| K| J| I|
H| G| ____C P U| A| B| C|
D| E| F
---|---|---|---|---|---|---|---|---|---|---|---|---|---
12| V| V| V| V| V| V| V| V| V| V| V| V
10| | V| V| V| V| V| V| V| V| V| V|
8| | V| | V| V| V| V| V| V| | V|
6| | | | V| V| V| V| V| V| | |
4| | | | V| | V| V| | V| | |
2| | | | | | V| V| | | | |
1| | | | | | | V| | | | |
“V” indicates DIMMs are populated with DDR5.
Key Parameters for DIMM Configuration
| Parameter | Possible Values |
|---|---|
| # of DIMMs Populated Per Channel | 1DPC (1 DIMM per channel) |
| DIMM Type | RDIMM, 3DS RDIMM |
| **** DIMM Construction | RDIMM |
supported
2R (2 ranks)
3DS RDIMM
| 2S2R (4 ranks)
2S4R (8 ranks)
2S8R (16 ranks)
Important
- There should be at least 1 DDR5 DIMM populated.
- Paired memory installation for Max performance.
- Populate the same DIMM type in each channel, specifically: 1. Use the same DIMM size; 2. Use the same number of ranks per DIMM.
- We don’t suggest other memory installation.