Microsemi SmartFusion2 MSS Peripheral DMA Configuration User Manual
- June 9, 2024
- Microsemi
Table of Contents
SmartFusion2 MSS
Peripheral DMA (PDMA) Configuration
Configuration Options
The Peripheral DMA (PDMA) engine offloads the ARM® Cortex™-M3 processor from data movement tasks. The PDMA allows data transfer from various MSS peripherals to memory, memory to various peripherals, and memory to memory. The data transfers can also be targeted to user logic/RAM in the FPGA fabric. For complete details please refer to the Microsemi SmartFusion2 User’s Guide.
Configuration Options
Use Fabric to MSS DMAREADY_FIC_0 and/or DMAREADY_FIC_1 – The DMAREADY_FIC_0 and DMAREADY_FIC_1 signals correspond to the ready signals from a soft peripheral in the FPGA fabric accessed respectively through the Fabric Interface Controller (FIC) 0 and 1. If the channel is configured for peripheral DMA and the direction is from the soft peripheral to memory, this signal indicates that data is available within the soft peripheral to be read out.
If the channel is configured for peripheral DMA and the direction is from memory to the soft peripheral, this signal indicates that there is space within the soft peripheral for data to be written to it. Refer to the Microsemi SmartFusion2 User’s Guide for more details.
You can enable the DMAREADY_FIC_0 and DMAREADY_FIC_1 signals in this configurator. The signals are then available to be used in the design (Figure 1).
Figure 1 · MSS PDMA Configurator
A - Product Support
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References
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