onsemi FDD10AN06A0 Mosfet N-Channel Powertrench Owner’s Manual

onsemi FDD10AN06A0 Mosfet N-Channel Powertrench

Product Specifications

• Model Number: FDD10AN06A0
• Drain to Source Voltage: 60 V
• Gate to Source Voltage: 50 A
• Power Dissipation: 10.5 mW

Product Features
This N-Channel MOSFET is designed for various applications that require efficient power management and control.

Product Applications

• Power supply units
• Motor control systems
• Inverters and converters

Product Usage Instructions

Installation

1. Ensure the device is properly grounded before installation.
2. Connect the drain, gate, and source terminals as per the circuit requirements.
3. Refer to the datasheet for specific pin configurations.

Operation

1. Apply the appropriate gate voltage to control the switching of the MOSFET.
2. Monitor the drain current and voltage to ensure safe operation within specified limits.

Maintenance

1. Avoid exceeding the maximum ratings specified for voltage, current, and power dissipation.
2. Regularly inspect the device for any signs of damage or overheating.

Frequently Asked Questions (FAQ)

• Q: What is the maximum drain current this MOSFET can handle?
  A: The maximum drain current rating for this MOSFET is 50 A.

• Q: How should I determine the proper gate voltage for switching this MOSFET?
  A: Refer to the datasheet for the Gate to Source Threshold Voltage (VGS(TH)) specification to ensure reliable switching operation.

• Q: Can this MOSFET be used in high-power applications?
  A: Yes, this MOSFET is capable of handling power dissipation up to 10.5 mW, making it suitable for high-power applications.

MOSFET – N-Channel, POWERTRENCH,
60 V, 50 A, 10.5 m,
FDD10AN06A0

Features

• RDS(on) = 9.4 (Typ.), VGS = 10 V, ID = 50 A
• Qg(tot) = 28 nC (Typ.), VGS = 10 V
• Low Miller Charge
• Low Qrr Body Diode
• UIS Capability (Single Pulse and Repetitive Pulse)
• This Device is Pb−Free, Halide Free and is RoHS Compliant

Applications

• Motor / Body Load Control
• ABS Systems
• Powertrain Management
• Injection Systems
• DC−DC Converters and Off−line UPS
• Distributed Power Architectures and VRMs
• Primary Switch for 12 V and 24 V Systems

MOSFET MAXIMUM RATINGS (TC = 25°C, unless otherwise noted)

Continuous (TC < 115°C, VGS = 10 V) Continuous (Tamb = 25°C, VGS = 10 V,

RSJA = 52°C/W)

Pulsed

| 50

11

| A
| Figure 4|
EAS| Single Pulse Avalanche Energy (Note 1)| 429| mJ
PD| Power Dissipation| 135| W
Derate above 25°C| 0.9| W/°C
TJ, TSTG| Operating and Storage Temperature| −55 to 175| °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
1. Starting TJ = 25°C, L = 8.58 mH, IAS = 10 A.

10 V

| 50 A

MARKING DIAGRAM

ORDERING INFORMATION
See detailed ordering and shipping information on page 12 of this data sheet.

FDD10AN06A0

THERMAL CHARACTERISTICS (TC = 25°C, unless otherwise noted)

ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)

Symbol| Parameter| Test Condition| Min| Typ| Max| Unit
---|---|---|---|---|---|---

OFF CHARACTERISTICS

ON CHARACTERISTICS

DYNAMIC CHARACTERISTICS

SWITCHING CHARACTERISTICS (VGS = 10 V)

DRAIN−SOURCE DIODE CHARACTERISTICS

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

TYPICAL CHARACTERISTICS (TC = 25°C, unless otherwise noted)

TEST CIRCUITS AND WAVEFORMS

THERMAL RESISTANCE VS. MOUNTING PAD AREA

The maximum rated junction temperature, TJM, and the thermal resistance of the heat dissipating path determines the maximum allowable device power dissipation, PDM, in an application. Therefore the application’s ambient temperature, TA (°C), and thermal resistance RJA (°C/W) must be reviewed to ensure that TJM is never exceeded. Equation 1 mathematically represents the relationship and serves as the basis for establishing the rating of the part.

In using surface mount devices such as the TO−252 package, the environment in which it is applied will have a significant influence on the part’s current and maximum
power dissipation ratings. Precise determination of PDM is complex and influenced by many factors:

1. Mounting pad area onto which the device is attached and whether there is copper on one side or both sides of the board.
2. The number of copper layers and the thickness of the board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the duty cycle and the transient thermal response of the part, the board and the environment they are in.

onsemi provides thermal information to assist the designer’s preliminary application evaluation. Figure 21 defines the RJA for the device as a function of the top copper (component side) area. This is for a horizontally positioned FR−4 board with 1 oz copper after 1000 seconds of steady state power with no air flow. This graph provides the necessary information for calculation of the steady state junction temperature or power dissipation. Pulse applications can be evaluated using the onsemi device Spice thermal model or manually utilizing the normalized maximum transient thermal impedance curve.
Thermal resistances corresponding to other copper areas can be obtained from Figure 21 or by calculation using Equation 2 or 3. Equation 2 is used for copper area defined in inches square and Equation 3 is for area in centimeters square. The area, in square inches or square centimeters is the top copper area including the gate and source pads.

PSPICE ELECTRICAL MODEL rev July 2002

• SUBCKT FDD10AN06A0 2 1 3 ; rev July 2002

• Ca 12 8 7e−10

• Cb 15 14 7e−10

• Cin 6 8 1.8e−9

• Dbody 7 5 DbodyMOD

• Dbreak 5 11 DbreakMOD

• Dplcap 10 5 DplcapMOD

• Ebreak 11 7 17 18 67.2

• Eds 14 8 5 8 1

• Egs 13 8 6 8 1

• Esg 6 10 6 8 1

• Evthres 6 21 19 8 1

• Evtemp 20 6 18 22 1

• It 8 17 1

• Lgate 1 9 3.2e−9

• Ldrain 2 5 1.0e−9

• Lsource 3 7 1.2e−9

• RLgate 1 9 32

• RLdrain 2 5 10
  RLsource 3 7 12

• Mmed 16 6 8 8 MmedMOD

• Mstro 16 6 8 8 MstroMOD Mweak 16 21 8 8

• MweakMOD Rbreak 17 18 RbreakMOD 1

• Rdrain 50 16 RdrainMOD 1.35e−3

• Rgate 9 20 3.6

• RSLC1 5 51 RSLCMOD 1e−6

• RSLC2 5 50 1e3

• Rsource 8 7 RsourceMOD 6e−3

• Rvthres 22 8 RvthresMOD 1

• Rvtemp 18 19 RvtempMOD 1

• S1a 6 12 13 8 S1AMOD

• S1b 13 12 13 8 S1BMOD

• S2a 6 15 14 13 S2AMOD

• S2b 13 15 14 13 S2BMOD

• Vbat 22 19 DC 1

• ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))(PWR(V(5,51)/(1e−6250),7))}

• .MODEL DbodyMOD D (IS=2E−11 N=1.06 RS=3.3e−3 TRS1=2.4e−3 TRS2=1.1e−6

• + CJO=1.25e−9 M=5.3e−1 TT=4.2e−8 XTI=3.9)

• MODEL DbreakMOD D (RS=2.7e−1 TRS1=1e−3 TRS2=−8.9e−6)

• MODEL DplcapMOD D (CJO=4.7e−10 IS=1e−30 N=10 M=0.44)

• MODEL MmedMOD NMOS (VTO=3.5 KP=5.5 IS=1e−30 N=10 TOX=1 L=1u W=1u RG=3.6)

• MODEL MstroMOD NMOS (VTO=4.25 KP=80 IS=1e−30 N=10 TOX=1 L=1u W=1u)

• MODEL MweakMOD NMOS (VTO=2.92 KP=0.03 IS=1e−30 N=10 TOX=1 L=1u W=1u RG=36 RS=0.1)

• MODEL RbreakMOD RES (TC1=9e−4 TC2=5e−7)

• MODEL RdrainMOD RES (TC1=2.5e−2 TC2=7.8e−5)

• MODEL RSLCMOD RES (TC1=1e−3 TC2=3.5e−5)

• MODEL RsourceMOD RES (TC1=1e−3 TC2=1e−6)

• MODEL RvthresMOD RES (TC1=−5.3e−3 TC2=−1.3e−5)

• MODEL RvtempMOD RES (TC1=−2.6e−3 TC2=1.3e−6)

• MODEL S1AMOD VSWITCH (RON=1e−5 ROFF=0.1 VON=−8 VOFF=−5)

• MODEL S1BMOD VSWITCH (RON=1e−5 ROFF=0.1 VON=−5 VOFF=−8)

• MODEL S2AMOD VSWITCH (RON=1e−5 ROFF=0.1 VON=−2 VOFF=−1.5)

• MODEL S2BMOD VSWITCH (RON=1e−5 ROFF=0.1 VON=−1.5 VOFF=−2)

• ENDS

NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub−Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.

• SABER ELECTRICAL MODEL
• REV July 2002
• template FDD10AN06A0 n2,n1,n3
• electrical n2,n1,n3
• {
• var i iscl
• dp..model dbodymod = (isl=2e−11,nl=1.06,rs=3.3e−3,trs1=2.4e−3,trs2=1.1e−6,cjo=1.25e−9,m=5.3e−1,tt=4.2e−8,xti=3.9) dp..model dbreakmod = (rs=2.7e−1,trs1=1e−3,trs2=−8.9e−6)
• dp..model dplcapmod = (cjo=4.7e−10,isl=10e−30,nl=10,m=0.44)
• m..model mmedmod = (type=_n,vto=3.5,kp=5.5,is=1e−30, tox=1)
• m..model mstrongmod = (type=_n,vto=4.25,kp=80,is=1e−30, tox=1)
• m..model mweakmod = (type=_n,vto=2.92,kp=0.03,is=1e−30, tox=1,rs=0.1) sw_vcsp..model s1amod =
• (ron=1e−5,roff=0.1,von=−8,voff=−5)
• sw_vcsp..model s1bmod = (ron=1e−5,roff=0.1,von=−5,voff=−8)
• sw_vcsp..model s2amod = (ron=1e−5,roff=0.1,von=−2,voff=−1.5)
• sw_vcsp..model s2bmod = (ron=1e−5,roff=0.1,von=−1.5,voff=−2)
• c.ca n12 n8 = 7e−10
• c.cb n15 n14 = 7e−10
• c.cin n6 n8 = 1.8e−9
• dp.dbody n7 n5 = model=dbodymod
• dp.dbreak n5 n11 = model=dbreakmod
• dp.dplcap n10 n5 = model=dplcapmod
• spe.ebreak n11 n7 n17 n18 = 67.2
• spe.eds n14 n8 n5 n8 = 1
• spe.egs n13 n8 n6 n8 = 1
• spe.esg n6 n10 n6 n8 = 1
• spe.evthres n6 n21 n19 n8 = 1
• spe.evtemp n20 n6 n18 n22 = 1
• i.it n8 n17 = 1
• l.lgate n1 n9 = 3.2e−9
• l.ldrain n2 n5 = 1.0e−9
• l.lsource n3 n7 = 1.2e−9
• res.rlgate n1 n9 = 32
• res.rldrain n2 n5 = 10
• res.rlsource n3 n7 = 12
• m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u
• m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u
• m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u
• res.rbreak n17 n18 = 1, tc1=9e−4,tc2=5e−7
• res.rdrain n50 n16 = 1.35e−3, tc1=2.5e−2,tc2=7.8e−5
• res.rgate n9 n20 = 3.6
• res.rslc1 n5 n51 = 1e−6, tc1=1e−3,tc2=3.5e−5
• res.rslc2 n5 n50 = 1e3
• res.rsource n8 n7 = 6e−3, tc1=1e−3,tc2=1e−6
• res.rvthres n22 n8 = 1, tc1=−5.3e−3,tc2=−1.3e−5
• res.rvtemp n18 n19 = 1, tc1=−2.6e−3,tc2=1.3e−6
• sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod
• sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod
• sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod
• sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod
• v.vbat n22 n19 = dc=1
• equations {
• i (n51−>n50) +=iscl
• iscl: v(n51,n50) = ((v(n5,n51)/(1e−9+abs(v(n5,n51))))((abs(v(n5,n51)1e6/250))** 7)) }

SPICE ELECTRICAL MODEL

• REV 23 July 2002
• FDD10AN06A0T
• CTHERM1 TH 6 3.2e−3
• CTHERM2 6 5 3.3e−3
• CTHERM3 5 4 3.4e−3
• CTHERM4 4 3 3.5e−3
• CTHERM5 3 2 6.4e−3
• CTHERM6 2 TL 1.9e−2
• RTHERM1 TH 6 5.5e−4
• RTHERM2 6 5 5.0e−3
• RTHERM3 5 4 4.5e−2
• RTHERM4 4 3 1.5e−1
• RTHERM5 3 2 3.37e−1
• RTHERM6 2 TL 3.5e−1
• SABER ELECTRICAL MODEL
• SABER thermal model FDD10AN06A0T template thermal_model th tl
• thermal_c th, tl
• {
• ctherm.ctherm1 th 6 =3.2e−3
• ctherm.ctherm2 6 5 =3.3e−3
• ctherm.ctherm3 5 4 =3.4e−3
• ctherm.ctherm4 4 3 =3.5e−3
• ctherm.ctherm5 3 2 =6.4e−3
• ctherm.ctherm6 2 tl =1.9e−2
• rtherm.rtherm1 th 6 =5.5e−4
• rtherm.rtherm2 6 5 =5.0e−3
• rtherm.rtherm3 5 4 =4.5e−2
• rtherm.rtherm4 4 3 =1.5e−1
• rtherm.rtherm5 3 2 =3.37e−1
• rtherm.rtherm6 2 tl =3.5e−1
• }

ORDERING INFORMATION

Device| Device Marking| Package| Reel Size| Tape Width| Shipping †
---|---|---|---|---|---
FDD10AN06A0| FDD10AN06A0| DPAK3 (TO−252 3 LD)

(Pb−Free, Halide Free)

| 330 mm| 16 mm| 2500 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

DPAK3 6.10×6.54×2.29, 4.57P CASE 369AS
ISSUE B

GALLOUL NOTES : UNLESS OTHERWISE SPECIFIED

• A) THIS PACKAGE CONFORMS TO JEDEC, TO-252, ISSUE F, VARIATION AA.
• B> ALL DIMENSIONS ARE IN MILLIMETERS.
• C DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2018.
• D> SUPPLIER DEPENDENT MOLD LOCKING HOLES OR CHAMFERED A CORNERS OR EDGE PROTRUSION.
• E FOR DIODE PRODUCTS, L4 IS 0.25 MM MAX PLASTIC BODY
• F> STUB WITHOUT CENTER LEAD. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR EXTRUSIONS.
• G› LAND PATTERN RECOMMENDATION IS BASED ON IPC7351A STD TO228P991X239-3N.

*This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “”, may or may not be present. Some products may not follow the Generic Marking.

• XXXX = Specific Device Code
• A = Assembly Location
• Y = Year
• WW = Work Week
• ZZ = Assembly Lot Code

DOCUMENT NUMBER: 98AON13810G Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
DESCRIPTION: DPAK3 6.10×6.54×2.29, 4.57P PAGE 1 OF 1

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ADDITIONAL INFORMATION

TECHNICAL PUBLICATIONS:
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Website: www.onsemi.com
ONLINE SUPPORT : www.onsemi.com/support
For additional information, please contact your local Sales Representative at www.onsemi.com/support/sales

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