NXP S32G-VNP-GLDBOX Semiconductors User Guide

NXP S32G-VNP-GLDBOX Semiconductors

Get to know the S32G-VNP-GLDBOX

S32G-VNP-GLDBOX Reference Design Overview

The S32G-VNP-GLDBOX (GoldBox) is a compact, highly-optimized and integrated reference design board with enclosure featuring the S32G Vehicle Network Processor. This board can provide reference for a variety of typical automotive applications such as:

• Service-oriented gateway, vehicle compute nodes
• Domain controller, safety controller
• Vehicle black-box
• FOTA

Figure 1.1 shows the S32G-VNP-GLDBOX. 1.2 S32G-VNP-GLDBOX Block Diagram

1.3 S32G-VNP-GLDBOX Hardware Resources

The resources of the GoldBox are listed as below:

• Processor
  ➢ Four Arm Cortex-A53 cores (with optional cluster lockstep)
  ➢ Three, dual-core lockstep Arm Cortex-M7 cores
  ➢ Hardware Security Engine (HSE) supports SHE/EVITA
  ➢ CAN, LIN and FlexRay offload with Low Latency Communications Engine (LLCE)
  ➢ Gigabit Ethernet Packet Forwarding Engine (PFE)
  ➢ 8 MB Embedded System RAM with ECC
  ➢ 32KB Standby RAM with ECC

• External Storage
  ➢ 1 x NOR Flash (64MB)
  ➢ 1 x SD card slot
  ➢ 1 x eMMC (32GB)
  ➢ 1 x LPDDR4 (4GB)

• Ethernet—12ports
  ➢ 1 x 100BASE-TX
  ➢ 6 x 100BASE-T1
  ➢ 5 x 1000BASE-T

• PCIe
  ➢ 1 x M.2 M-key slot
  ➢ 1 x M.2 E-key slot
  ➢ 1 x PCIe X1 socket

• LIN
  ➢ 4 x LLCE LIN
  ➢ 1 x LINFlexD
  • CAN/CAN FD
  ➢ 16 x LLCE CAN/CAN FD
  ➢ 2 x FlexCAN /CAN FD

• FlexRay
  ➢ 1 x LLCE FlexRay

• USB
  ➢ 1 x USB 2.0 port as host/device mode
  • Scalable interface
  ➢ 1 x DSPI
  ➢ 5 x ADC
  ➢ 1 x I2C

• RTC
  ➢ Support for external RTC

• Debug and Trace
  ➢ 1 x 20-pin JTAG for S32G
  ➢ 1 x 10-pin JTAG for SJA1110A
  ➢ 1 x Aurora Trace
  ➢ 2 x UART

S32G-VNP-GLDBOX Hardware Packages

Hardware Package Overview
The following section describes the hardware package overview of S32G-VNP- GLDBOX. Hardware and accessories are needed as shown in the figure 2.1.

Hardware Connection Instruction
To connect any cable to the GoldBox, follow the instructions shown in figure 2.2.

S32G-VNP-GLDBOX Switch Setting

Default Switch Setting
Figure 3.1 shows the default switch setting of the S32G-VNP-GLDBOX.

Switch Setting for Power Selection
Figure 3.2 shows the switch setting for power selection.

Switch Setting for SD card Boot
Figure 3.3 shows the switch setting for SD card boot.

Switch Setting for eMMC Boot
Figure 3.4 shows the switch setting for eMMC boot.

Switch Setting for NOR Flash Boot
Figure 3.5 shows the switch setting for NOR Flash boot.

Switch Setting for Serial Boot
Figure 3.6 shows the switch setting for serial boot.

S32G-VNP-GLDBOX Connectors

Connectors Overview
Figure 4.1 shows the part of important connectors of the S32G-VNP-GLDBOX.

Table 4.1 shows the connectors of the S32G-VNP-GLDBOX and their corresponding signals.

Specific Connector Instruction
Figure 4.2 shows the LLCE CAN, FlexCAN, LLCE FlexRay, ADC, LINFlexD and LLCE LIN connectors.

Figure 4.3 shows the Ethernet connectors.

S32G-VNP-GLDBOX Set Up

Following steps show how to run Linux BSP on CortexA53 core:

1. Download and install the terminal emulator, if not installed already. About the terminal tool, you can choose any one which is familiar to you, such as Tera Term, Putty and so on.
2. Download and install the FT232R USB-to-UART driver, if not installed already. Go to FT232R USB-to-UART driver link .Scroll down and select correct version. Follow the installation guides to install the driver.
3. Set S32G-VNP-GLDBOX in SD card boot mode(refer to the Figure 3.2).
4. Plug the SD card in J3 slot. The SD card has pre-loaded Linux BSP image which runs on CortexA53 cores.
5. Connect the UART0 port(J2) of board and PC by UART cable. Then open serial terminal and configure COM port in PC. Select the corresponding COM port which can be found in “Device Manager” of the PC and set 115200 as the baud rate. The configuration result is shown in the figure 5.1.
6. Connect power supply though J176 port described in Table 4.1. Open the power switch(refer to figure 3.2), the running logs will appear in the console as shown in Figure 5.2.

Note: For other boot mode, building project, making image and so on, refer to S32G-VNP-GLDBOX Reference Manual and S32G-VNP-GLDBOX Software Enablement Guide.

When see the console as shown in the Figure 5.2, it means that the Linux BSP runs successfully. Please input “root” to log in system. And if need to run the M7 project, please refer to the S32G-VNP-GLDBOX Software Enablement Guide.

Appendix A

• Documents
  — S32G Data Sheet
  — S32G Reference Manual
  — GoldBox Fact sheet
  — S32G-VNP-GLDBOX Reference Manual
  — S32G-VNP-GLDBOX Software Enablement Guide
  — Auto_Linux_BSP_XX.X_S32G274A_User_Manual
  — Auto_Linux_BSP_XX.X_S32G274A_Quick_Start

• Useful links
  — S32 Design Studio
  — S32 Debug Probe

• Support https://community.nxp.com/

• Enablement Tools
  — IDE: S32 Design Studio, Yocto , EB tresosTM
  — Software: Linux BSP, FreeRTOSTM , Real-Time Drivers(RTD)
  — Compiler: Green Hills, gcc
  — Debugger: Lauterbach, S32G Debug Probe

How To Reach Us

Home Page: nxp.com
Web Support: nxp.com/support

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NXP makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does NXP assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters that may be provided in NXP data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including “typicals,” must be validated for each customer application by customer’s technical experts. NXP does not convey any license under its patent rights nor the rights of others. NXP sells products pursuant to standard terms and conditions of sale, which can be found at the following address: nxp.com/SalesTermsandConditions.

While NXP has implemented advanced security features, all products may be subject to unidentified vulnerabilities. Customers are responsible for the design and operation of their applications and products to reduce the effect of these vulnerabilities on customer’s applications and products, and NXP accepts no liability for any vulnerability that is discovered. Customers should implement appropriate design and operating safeguards to minimize the risks associated with their applications and products.

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