NXP PCA9421UK-EVM Evaluation Board User Manual

NXP PCA9421UK-EVM Evaluation Board

Specifications

• Product Name: PCA9421UK-EVM evaluation board
• Revision: 1.0
• Date: 8 November 2023

Product Information

This user manual provides guidelines on how to use the PCA9421-EVM evaluation board manufactured by NXP Semiconductors. The board is intended for engineering development or evaluation purposes only.

Finding kit resources and information on the NXP website

NXP Semiconductors provides online resources for this evaluation board and its supported device(s) at http://www.nxp.com. The information page for the PCA9421UK-EVM evaluation board is at http://www.nxp.com/PCA9421UK-EVM. The information page provides overview information, documentation, parametric, ordering information, and a Getting Started tab. The Getting Started tab provides quick-reference information applicable to using the PCA9421UK-EVM evaluation board, including the downloadable assets referenced in this document.

CAUTION: This device is sensitive to ElectroStatic Discharge (ESD). Therefore, care should be taken during transport and handling. You must use a ground strap or touch the PC case or other grounded source before unpacking or handling the hardware.

Minimum system requirements

This evaluation board requires a Windows PC workstation. Meeting these minimum specifications should produce great results when working with this evaluation board.

Getting to know the hardware

The PCA9421UK-EVM evaluation board features an on-chip LDO regulator and various other components for powering voltage rails in the system. It is offered in a WLCSP package and a QFN package.

Key features

• On-chip LDO regulators
• Fm+ I2C-bus interface
• Chip enable
• Interrupt signal

FAQ

• Q: What is the purpose of the PCA9421UK-EVM evaluation board?
• A: The PCA9421UK-EVM evaluation board is designed for engineering development or evaluation purposes only.
• Q: Where can I find resources and information about the PCA9421UK-EVM evaluation board?
• A: Resources and information about the PCA9421UK-EVM evaluation board can be found on the NXP website at http://www.nxp.com/PCA9421UK-EVM.
• Q: What are the static handling requirements for the PCA9421UK-EVM evaluation board?
• A: The PCA9421UK-EVM evaluation board is sensitive to ElectroStatic Discharge (ESD). It is recommended to use a ground strap or touch a grounded source before unpacking or handling the hardware.
• Q: What are the minimum system requirements for using the PCA9421UK-EVM evaluation board?
• A: The PCA9421UK-EVM evaluation board requires a Windows PC workstation that meets the specified minimum system requirements.

Document information

evaluation board

IMPORTANT NOTICE

For engineering development or evaluation purposes only

NXP provides the product under the following conditions: This evaluation kit is for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY.
It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs and supply terminals. This evaluation board may be used with any development system or other source of I/O signals by connecting it to the host MCU computer board via off-the-shelf cables. This evaluation board is not a Reference Design and is not intended to represent a final design recommendation for any particular application. The final device in an application heavily depends on proper printed-circuit board layout and heat-sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality. The product provided may not be complete in terms of required design, marketing, and or manufacturing-related protective considerations, including product safety measures typically found in the end device incorporating the product. Due to the open construction of the product, it is the responsibility of the user to take all appropriate precautions for electric discharge. To minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. For any safety concerns, contact NXP sales and technical support services.

Finding kit resources and information on the NXP website

NXP Semiconductors provides online resources for this evaluation board and its supported device(s) at http://www.nxp.com.
The information page for the PCA9421UK-EVM evaluation board is at http://www.nxp.com/PCA9421UK-EVM. The information page provides overview information, documentation, parametrics, ordering information and a Getting Started tab. The Getting Started tab provides quick-reference information applicable to using the PCA9421UK-EVM evaluation board, including the downloadable assets referenced in this document.

Collaborate in the NXP community
The NXP community is for sharing ideas and tips, asking and answering technical questions, and receiving input on just about any embedded design topic. The NXP community is at http://community.nxp.com.

Getting ready
Working with the PCA9421UK-EVM evaluation board requires the kit contents.

Kit contents/packing list
The kit contents include:

• Assembled and tested the PCA9421UK-EVM evaluation board in an anti-static bag
• USB to MPSSE Serial cable for I2C communication
• USB 2.0 Cable
• Spare jumpers

Static handling requirements
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling. You must use a ground strap or touch the PC case or other grounded source before unpacking or handling the hardware.

Minimum system requirements
This evaluation board requires a Windows PC workstation. Meeting these minimum specifications should produce great results when working with this evaluation board.

• 5.0 V power supply or USB with enough current capability (1.5 A or above for maximum performance)
• PCA9421 GUI installed on a Windows PC
• Multimeters to measure regulator outputs
• Oscilloscope (optional)
• USB-enabled computer running Windows XP, Vista, 7, 8, or 10

Getting to know the hardware

Device description
The PCA9421 is a highly integrated Power Management IC (PMIC), targeted to provide a full power management solution for low-power microcontroller applications or other similar applications. The device integrates two step- down (buck) DC-DC converters which have I2C programmable output voltage. Both buck regulators have integrated high-side and low-side switches and related control circuitry, to minimize the external component counts; a Pulse- Frequency Modulation (PFM) approach is utilized to achieve better efficiency under light load conditions. Other protection features such as overcurrent protection, under-voltage lockout (UVLO), etc., are also provided. By default, the input for these regulators is powered by either VIN or VIN_AUX, whichever is greater.
In addition, two on-chip LDO regulators are provided to power up various voltage rails in the system. Other features such as Fm+ I2C-bus interface, chip enable, interrupt signal, etc. are also provided. The chip is offered in 2.09 mm x 2.09 mm, 5 x 5 bump, 0.4 mm pitch WLCSP package; and 3 mm x 3 mm, 24-pin QFN package.

Key features

• Two step-down DC-DC converters
• Very low quiescent current
• Programmable output voltage
• SW1: core buck converter, 0.5 V to 1.5 V output, 25 mV/step, and a fixed 1.8 V, up to 250 mA
• SW2: system buck converter, 1.5 V to 2.1 V/2.7 V to 3.3 V output, 25 mV/step, up to 500 mA
• Low-power mode for extra power saving
• Two LDOs
• Programmable output voltage regulation
• LDO1: always-on LDO, 1.70 V to 1.90 V output, 25 mV/step, up to 1 mA
• LDO2: system LDO, 1.5 V to 2.1 V/2.7 V to 3.3 V output, 25 mV/step, up to 250 mA
• 1 MHz I2C-bus target interface
• -40 °C to +85 °C ambient temperature range
• Offered in 5 x 5 bump-array WLCSP and 24-pin QFN package

Board description
Table 1 describes the main elements on the board.

Table 1. PCA9421UK-EVM board description

output
12| PMIC-OUT| All regulators’ output voltages
13| SW1| Button connected to ON pin
14| I2C-PU| Logic voltage selection for I2C
15| MODE-PU| Logic voltage selection for MODESEL0&1 function
16| FTDI-CTRL| I2C interface
17| VREG_IN| Input selection for an external LDO between VIN_AUX and USB input

Jumper and switch definitions
Figure 3 shows the location of jumpers and switches on the evaluation board.

Table 2 describes the function and settings for each jumper and switch.

Table 2. Jumper and switch definitions

Jumper/ Switch| Description| Description| Connection/Result
---|---|---|---
SW1| ON| Open| Connect the ON pin to the ground when pressed. Causes wake-up event of PMIC

J5

| ****

FTDI-CTRL

|  | I2C interface connection with FTDI cable. Orange colour for SCL, Yellow and Green colour for SDA

J6

| ****

Voltage monitor

|  | Measure voltages for PCA9421UK 1: VIN_AUX

2: BUCK2 output

3: BUCK1 output

4: LDO2 output

5: LDO1 output

J7

| Logic configuration for MODESEL0| [1-2]| Logic high
[2-3]| Logic low

J8

| Pullup configuration for MODE function| [1-2]| Pullup to external LDO output
[2-3]| Pullup to LDO2 output

J9

| Logic configuration for MODESEL1| [1-2]| Logic high
[2-3]| Logic low

J10

| Pullup configuration for I/O voltage| [1-2]| Pullup to external LDO output
[2-3]| Pullup to LDO2 output

J11

| Logic voltage configuration for INTB| [1-2]| Pullup to external LDO output
[2-3]| Pullup to LDO2 output

J13

|  | [1-2]| Pullup to USB input
[2-3]| Pullup to VIN_AUX

Evaluation board connections

Definitions
Connect wires on the following pins as shown in Figure 4, and make sure the power supply is turned off during the wiring stage:

• VIN Input – Powered by USB Micro B connector.
• FTDI Connector – Connect to FTDI USB to I2C cable (Yellow/Green to SDA, Orange to SCL, and Black to GND)

Schematic, board layout and bill of materials
The schematic, board layout and bill of materials for the PCA9421UK-EVM evaluation board are available at http://www.nxp.com/PCA9421UK-EVM.

Placement

Layout guideline

The following guidelines for PCA9421UK are arranged from most critical to least critical priority:

• Place ASYS input capacitor (C2) as close to ASYS and PGND as possible.
• Place VIN_AUX input capacitor (C3) as close to VIN_AUX and PGND as possible. The input capacitor delivers a high di/dt current pulse when the high-side MOSFET turns on. Parasitic inductance in the power input traces must be minimized for high efficiency and reliability.
• Minimize the trace length from LX1, LX2’s output capacitor PGND1, PGND2 terminal to the input capacitor’s GND terminal. This minimizes the area of the current loop when the high-side MOSFET is conducting. Keep all sensitive signals, such as feedback nodes, outside of these current loops with as much isolation as the design allows.
• Minimize the trace impedance from LX1, and LX2 to their respective inductor and from each inductor to the output capacitor for LX1 and LX2. This minimizes the area of each current loop and minimizes LX trace resistance and stray capacitance to achieve optimal efficiency. Keep all sensitive signals, such as feedback nodes outside of these current loops and away from the LX switching voltage with as much isolation as the design allows.
• Create a PGND plane on the 2nd layer of the PCB immediately below the power components and bumps carrying high switching currents. This reduces parasitic inductance in the traces carrying high currents and shields signal on inner PCB layers from the switching waveforms on the top layer of the PCB.
• Connect the feedback terminal (SW1_OUT, SW2_OUT) to the local output capacitors for LX1 and LX2. The SW1_OUT and SW2_OUT connection to the local output capacitors should be placed as close to the PCA9421UK as possible to minimize the effects of voltage drop in the output trace connected to the load.
• Create a small AGND island for the VIN bypass capacitors. Connect this AGND island to the PCA9421UK PGND plane for LX1 and LX2 between the PGND terminals of the SW1_OUT, and SW2_OUT output capacitors.
• This results in the most accurate sensing of the output voltage by the local feedback loop (OUT to AGND).
• Each of the PCA9421UK bumps has approximately the same ability to remove heat from the die. Connect as much metal as possible to each bump to minimize the θJA associated with the PCA9421UK.

PCA9421UK-EVM BOM list

Table 3. Bill of Materials (BOM)

Ref| Description| Size (inch)| Manufacture| Part Number| Notes
---|---|---|---|---|---
C18| CAP CER 0.1μF 50V 10% X7R| 0402| MURATA| GRM155R71H104KE14D|
C3, C10,C17, C19| CAP CER 1.0μF 16V 10% X7R| 0603| MURATA| GRM188R71C105KE15|
C15| CAP CER 0.47μF 16V 10% X7R AEC-Q200| 0603| MURATA| GCM188R71C474KA55D|
C14, C16| CAP CER 10μF 10V 20% X7R| 0603| MURATA| GRM188Z71A106MA73|
C4, C6| CAP CER 10.0μF 16V 10% X7R| 0805| MURATA| GRM21BZ71C106KE15|
C1, C8, C20| CAP CER 2.2μF 16V 10% X7R| 0603| MURATA| GRM188Z71C225KE43|
C2| CAP CER 4.7μF 16V 10% X7R| 0603| MURATA| GRM188Z71C475KE21|
L1, L2| IND PWR 2.2μH@1MHz 2.5A 20%| 2016| Samsung Electro-Mechanics| CIGT201610EH2R2MNE|

L3, L4

| IND FER BEAD 330OHM@100 MH

Z 2.5A 25% SMT

|  | ****

TDK

| ****

MPZ2012S331AT000

|
U1| PMIC| SOT23-5| NXP| PCA9421UK_WLCSP25|
R1| RES MF 20.0K 1/10W 1%| 0603| BOURNS| CR0603-FX-2002ELF|
R2-R5| RES MF 10.0K 1/10W 1%| 0603| YAGEO AMERICA| RC0603FR-0710KL|

R7, R9

| RES MF ZERO OHM 1/10W — AE

C-Q200

| ****

0603

| ****

PANASONIC

| ****

ERJ-3GEY0R00V

|
SW1| SW SPST PB SMT 16V 20MA|  | ALPS ELECTRIC (USA) INC.| SKRPABE010|
BT1| BATTERY HOLDER SMD| CR2025/ 2032| Linx Technologies| BAT-HLD-001|
TP11-TP14, TP17-TP19| TEST POINT PC MULTI-PURPOSE BLK TH|  | KEYSTONE ELECTRONICS| 5011|
TP1-TP9, TP15, TP16, TP20| TEST POINT PC MULTI-PURPOSE RED TH|  | KEYSTONE ELECTRONICS| ****

5010

|
J7-J11, J13| HDR 1×3 TH 100MIL SP 343H AU 100L|  | SAMTEC| TSW-103-07-F-S|
J4, J6| HDR 1X6 TH 100MIL SP 338H AU 100L|  | SAMTEC| TSW-106-07-F-S|
J5| HDR 2X5 TH 100MIL CTR 338H AU 100L|  | SAMTEC| TSW-105-07-F-D|
J2| HDR 1X10 TH 100MIL CTR 338H|  | SAMTEC| TSW-110-07-F-S|
Ref| Description| Size (inch)| Manufacture| Part Number| Notes
---|---|---|---|---|---
 | AU 100L|  |  |  |
J1, J3| HDR 1X8 TH 100MIL SP 338H AU 100L|  | SAMTEC| TSW-108-07-F-S|
__

J12

| CON 5 USB MICRO_

B RA SKT SMT 0.65MM SP 102H AU

|  | WURTH ELEKTR ONIK EISOS GM BH & CO. KG| __

629105136821

|
C5, C7| CAP CER 4.7 uF 16V 10 % X7R| 0603| MURATA| GRM188Z71C475KE21| Not Installed
C9, C11-C13| CAP CER 0.1 uF 16V 10 % X7R| 0201| MURATA| GRM033Z71C104KE14| Not Installed
JP1-JP11| HDR 1X2 TH 100MIL SP 338H AU 100L|  | SAMTEC| TSW-102-07-F-S| Not Installed
J15-J18| HDR 1×3 TH 100MIL SP 343H AU 100L|  | SAMTEC| TSW-103-07-F-S| Not Installed
R8, R10| RES MF 10.0K 1/10W 1%|  | YAGEO AMERICA| RC0603FR-0710KL| Not Installed

Installing and configuring software tools

• Unzip the provided PCA9421 Evaluation Kit GUI file into the selected folder. No need to install it. If a password is asked during unzipping, type “NXP”
• Install the FTDI cable driver from the website https://www.ftdichip.com/Drivers/D2XX.htm.
• Run the file PCA9421.exe. The interface is shown in Figure 6.

When the GUI is launched, it looks for a PCA9421UK-EVM target board connected via the USB cable. If connected, the GUI panels display “Connected” on the bottom right.

GUI description
As shown in Figure 7, the GUI is a user-friendly tool which allows access to the on-chip registers to perform write/read commands manually or automatically (depending on GUI setting). Below is a quick guide of the key blocks that the GUI provides.

1. Write All Registers: Click the write button on the GUI to perform a “write” command to all the designated registers on PCA9421UK based on the current GUI setting. It is recommended to disable auto-refresh before clicking the write all command since some of the settings might be updated by the auto-refresh if turned on.

2. Read All Registers: Click the red button on the GUI to perform a “read” command and update all the register values reflected on the GUI.

3. Auto Refresh: Sets the auto-refresh timer for the Interrupts and Status registers. By choosing different options from the drop-down menu, the GUI performs the backend automatic read and refresh functions accordingly.
   • 1/second – Read all registers 1 time per second (1Hz)
   • 2/second – Read all registers 2 times per second (2Hz)
   • 4/second – Read all registers 4 times per second (4Hz)
   • Disabled – Disable the auto-read

4. Device information: It shows the device ID, device revision and its slave address information. Note that the GUI selects the slave address configured on the evaluation automatically.

5. Function Selection Tab: All function-related registers are grouped into eight different tabs including “Top level control”, “Interrupts”, “Charging Control”, “Charging Status” and “Group A-D setting”. Click the tab to access the related registers.

6. Set/Read Setting: Set/Read the registers on the selected function tab.

7. Interrupts: Related to register 0x01 (TOP_INT), 0x02 (SUB_INT0), 0x04 (SUB_INT1) and 0x06 (SUB_INT2). When related events happen, the unmasked interrupt bits are set and the GUI highlights the checkboxes and changes the background colour to RED.

8. Clear Interrupt: Related to register 0x02 (SUB_INT0), 0x04 (SUB_INT1) and 0x06 (SUB_INT2). The clear interrupt button is used to CLEAR the interrupt bits. In the case multiple interrupt bits are set at the same time, the button clears all set interrupt bits.

9. Connections Status: When valid communication between GUI and the hardware is established, it shows “connected”, otherwise it shows “disconnected”. The cable used is also shown on the right side of the connection status bar.

Revision history

Table 4. Revision history

Legal information

Definitions
Draft — A draft status on a document indicates that the content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included in a draft version of a document and shall have no liability for the consequences of the use of such information.

Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of the use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including – without limitation – lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that the customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards the customer for the products described herein shall be limited under the Terms and conditions of the commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied before the publication hereof.
Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is the customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third- party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by the customer’s third-party customer(s). The customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products to avoid a default of the applications and the products or of the application or use by the customer’s third party customer(s). NXP does not accept any liability in this respect.

Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at https://www.nxp.com/profile/terms unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions about the purchase of NXP Semiconductors products by the customer.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require prior authorization from competent authorities.
Suitability for use in non-automotive qualified products — Unless this document expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested under automotive testing or application requirements. NXP Semiconductors accepts no liability for the inclusion and/or use of non-automotive qualified products in automotive equipment or applications. If customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document, including the legal information in that document, is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
Security — Customer understands that all NXP products may be subject to unidentified vulnerabilities or may support established security standards or specifications with known limitations. The customer is responsible for the design and operation of its applications and products throughout their lifecycles to reduce the effect of these vulnerabilities on the customer’s applications and products. Customer’s responsibility also extends to other open and/or proprietary technologies supported by NXP products for use in the customer’s applications. NXP accepts no liability for any vulnerability. Customers should regularly check security updates from NXP and follow up appropriately. Customer shall select products with security features that best meet the rules, regulations, and standards of the intended application and make the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, and security-related requirements concerning its products, regardless of any information or support that may be provided by NXP. NXP has a Product Security Incident Response Team (PSIRT) (reachable at [email protected]) that manages the investigation, reporting, and solution release to security vulnerabilities of NXP products.
NXP B.V. — NXP B.V. is not an operating company and it does not distribute or sell products.

Trademarks

• Notice: All referenced brands, product names, service names, and trademarks are the property of their respective owners.
• NXP — wordmark and logo are trademarks of NXP B.V.

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © 2023 NXP B.V. All rights reserved. For more information, please visit https://www.nxp.com.

References

• D2XX Drivers - FTDI

Read User Manual Online (PDF format)

Download This Manual (PDF format)

Download this manual  >>