RENESAS RL78-G14 Family SHA Hash Function Library Installation Guide

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| Sample project for RL78/G23

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Product Specifications

API Function

SHA Library for the RL78 supports the following functions.

Table 2. SHA Library API Functions

Note: When combined with RL78/G24 FAA, this function is not supported.

How to use library functions

When using the library function, it is necessary to specify the file to be built as follows according to the API to be used. When combined with RL78/G24 FAA, refer to 2.3, How to use library functions (When combined with RL78/G24 FAA).

Table 3. File to be build

How to use library functions (When combined with RL78/G24 FAA)

FAA (The Flexible Application Accelerator) is an application accelerator employing a Harvard architecture that was developed by Renesas Electronics Corporation. Using the FAA for SHA hash operation processing boosts the processing speed of the SHA Library Note.

Note: When combined with RL78/G24 FAA, only SHA-256 is supported.
Note: When combined with RL78/G24 FAA, only CC-RL compiler is supported.

When combined with FAA, generate code for SHA hash operation processing for FAA in the Smart configurator. Combine the generated code with the code in the libsrc folder included in this library package. In addition to the FAA SHA Library code, specify the code in Table 4 below as the build target.

Table 4. File to be build when combined with RL78/G24 FAA

How to generate code

FAA SHA Library generates code using the Smart configurator

For more information on how to operate the Smart Configurator, please refer to the following document.

• RL78 Smart Configurator User’s Guide: e² studio (R20AN0579)
• RL78 Smart Configurator User’s Guide: CS+ (R20AN0580)

1. Add the Flexible Application Accelerator component (referred to below as the FAA component).
   The character string specified for Configuration name: when adding the component will be reflected in the code names generated by the Smart Configurator. The initial value of the configuration name is Config_FAA.

2. Download FAA SHA Library.
   Click the Update FAA modules button to display the FAA modules download screen and select FAA SHA Library to download.

3. Select SHA256 in the function to perform code generation. The code is generated in \src\smc_gen\Config_FAA. For details on the generated code, refer to 2.3.3, Generated Code Details.

Build Settings

After generating code with the Smart Configurator, perform the following build settings before building.

1. Add the files in Table 4 to the build target.
2. Specify R_CONFIG_FAA_SHA256 in the macro definition of the compiler’s preprocessor.

Generated Code Details

The following is a detailed description of the code generated by the Smart Configurator.

Table 5. Generated Code Details

Note: 1. “XXX” in the function name represents the configuration name. The configuration name is specified in Smart Configurator when adding the FAA component. For details, refer to 2.3.1,.How to generate code.

Error Code

In the FAA SHA Library, the following error code is added to the return value of the R_Sha256_HashDigest function.

For details of API functions, refer to Renesas Microcomputer SHA Hash Function Library: User’s Manual(R20UW0101).

Table 6. Error Code

performing SHA hash operation because the FAA processor was already running.

Notes

• The following macro specifications cannot be used with RL78. COMPILE_EMPHASIS_SPEED

CC-RL

Development environment

Please use the same or a later version of the toolchain listed below:

• Integrated Development Environment:
• CS+ for CC V8.05.00
• e2 studio 2021-04
• C compiler:
• CC-RL V1.09.00

ROM / RAM / Stack Size and Performance

The various sizes and performance when building with the following options are described for reference. Compiler options
-cpu=S3 -memory_model=medium –Odefault Link options
-NOOPtimize

Table 7. ROM, RAM Size

Table 8. Stack Size

Table 9. Performance

Note: Input message is 1 block with padding processing.

CC-RL(When combined with RL78/G24 FAA)

Development environment

Please use the same or a later version of the toolchain listed below:

• Integrated Development Environment:
• CS+ for CC V8.10.00
• e2 studio 2023-07
• C compiler:
• CC-RL V1.12.01
• DSP assembler:
• FAA Assembler V1.04.02

ROM / RAM / FAACODE / FAADATA / Stack Size and Performance

The various sizes and performance when building with the following options are described for reference. Compiler options

• cpu=S3 -memory_model=medium –Odefault Link options
• NOOPtimize

Table 10. ROM, RAM, FAACODE, FAADATA Size

API| ROM size [byte]| RAM size [byte]| FAACODE [byte]| FAADATA [byte]
---|---|---|---|---
R_Sha256_HashDigest| 1073| 0| 684| 524

Table 11. Stack Size

Table 12. Performance

system clock = 32MHz

IAR Embedded Workbench

Development environment

Please use the same or a later version of the toolchain listed below:

• Integrated Development Environment:
  IAR Embedded Workbench for Renesas RL78 version 4.21.1

• C compiler:
  IAR C/C++ Compiler for Renesas RL78 : 4.20.1.2260

ROM / RAM / Stack Size and Performance

The various sizes and performance when building with the following options are described for reference.

Compiler options
–core=S3 –code_model=far –data_model=near –near_const_location=rom0 -e -Oh –calling_convention=v2

Table 13. ROM, RAM Size

Table 14. Stack Size

Table 15. Performance

Note: Input message is 1 block with padding processing.

LLVM

Development environment

Please use the same or a later version of the toolchain listed below:

• Integrated Development Environment:
e2 studio 2022-01
• C compiler:
LLVM for Renesas RL78 10.0.0.202203

ROM / RAM / Compiler option / Performance

The various sizes and performance when building with the following options are described for reference.
Compiler options
CPU Type : S3-core
Optimization Level : Optimize size (-Os)

Table 16. ROM, RAM Size

Table 17. Stack Size

Table 18. Performance

Note: Input message is 1 block with padding processing.

Revision History

| Description|
---|---|---
Rev.| Date| Page| Summary
1.00| Oct 16, 2012| —| First edition issued
1.01| Sep 30, 2014| | Improved document.
| | | Fixed problem when input pointer is an odd address.
| | —| Added support for the small model and the large model.
1.02| Apr 01, 2015| —| Supported IAR Embedded Workbench.
1.03| Jul 01, 2016| —| Supported CC-RL.
| | | Supported IAR Embedded Workbench 7.4(v2.21.1).
2.00| Apr 21, 2021| —| Changed the library provision form from Lib Format to C source
2.01| Jun 30, 2022| —| Supported LLVM.
2.02| Aug 01, 2023| —| Added library for RL78/G24 FAA.

General Precautions in the Handling of Microprocessing Unit and Microcontroller Unit Products

The following usage notes are applicable to all Microprocessing unit and Microcontroller unit products from Renesas. For detailed usage notes on the products covered by this document, refer to the relevant sections of the document as well as any technical updates that have been issued for the products.

1. Precaution against Electrostatic Discharge (ESD)
   A strong electrical field, when exposed to a CMOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop the generation of static electricity as much as possible, and quickly dissipate it when it occurs. Environmental control must be adequate. When it is dry, a humidifier should be used. This is recommended to avoid using insulators that can easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work benches and floors must be grounded. The operator must also be grounded using a wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions must be taken for printed circuit boards with mounted semiconductor devices.

2. Processing at power-on
   The state of the product is undefined at the time when power is supplied. The states of internal circuits in the LSI are indeterminate and the states of register settings and pins are undefined at the time when power is supplied. In a finished product where the reset signal is applied to the external reset pin, the states of pins are not guaranteed from the time when power is supplied until the reset process is completed. In a similar way, the states of pins in a product that is reset by an on-chip power-on reset function are not guaranteed from the time when power is supplied until the power reaches the level at which resetting is specified.

3. Input of signal during power-off state
   Do not input signals or an I/O pull-up power supply while the device is powered off. The current injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements. Follow the guideline for input signal during power-off state as described in your product documentation.

4. Handling of unused pins
   Handle unused pins in accordance with the directions given under handling of unused pins in the manual. The input pins of CMOS products are generally in the high-impedance state. In operation with an unused pin in the open-circuit state, extra electromagnetic noise is induced in the vicinity of the LSI, an associated shoot-through current flows internally, and malfunctions occur due to the false recognition of the pin state as an input signal become possible.

5. Clock signals
   After applying a reset, only release the reset line after the operating clock signal becomes stable. When switching the clock signal during program execution, wait until the target clock signal is stabilized. When the clock signal is generated with an external resonator or from an external oscillator during a reset, ensure that the reset line is only released after full stabilization of the clock signal. Additionally, when switching to a clock signal produced with an external resonator or by an external oscillator while program execution is in progress, wait until the target clock signal is stable.

6. Voltage application waveform at input pin
   Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (Max.) and VIH (Min.) due to noise, for example, the device may malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed, and also in the transition period when the input level passes through the area between VIL (Max.) and VIH (Min.).

7. Prohibition of access to reserved addresses
   Access to reserved addresses is prohibited. The reserved addresses are provided for possible future expansion of functions. Do not access these addresses as the correct operation of the LSI is not guaranteed.

8. Differences between products
   Before changing from one product to another, for example to a product with a different part number, confirm that the change will not lead to problems.
   The characteristics of a microprocessing unit or microcontroller unit products in the same group but having a different part number might differ in terms of internal memory capacity, layout pattern, and other factors, which can affect the ranges of electrical characteristics, such as characteristic values, operating margins, immunity to noise, and amount of radiated noise. When changing to a product with a different part number, implement a system evaluation test for the given product.

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References

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