multiLane AT4039E GUI Bit Error Ratio Tester User Manual

multiLane AT4039E GUI Bit Error Ratio Tester

Product Information

• Product Name: AT4039E GUI User Manual
• Product Type: Bit Error Ratio Tester

Features

• 4-Lane testing capability
• Supports data rates of 23-29 & 46-58 GBaud
• Capable of testing at 400G
• Supports NRZ and PAM4 modulation schemes

INTRODUCTION

This is the user operation manual for the AT4039E. It covers the installation of its software package and explains how to operate the instrument for pattern generation and error detection; how to control the clocking system, inputs/outputs and all the available measurements.

API and SmarTest Documents

• This manual supports the instrument AT4039E and it is compatible with the Advantest V93000 HSIO test head extender frame/twinning.
• All APIs are available for Linux and tested under Smartest 7. For the list of APIs and how to use them please refer to the “API” folder on the AT4039E webpage.
• This manual does not explain how to operate the instrument using SmarTest environment. Refer to Advantest’s website below for SmarTest document noting that it may change without notice and also require login privileges provided through Advantest: https://www.advantest.com/service-support/ic-test-systems/software-information-and-download/v93000-software-information-and-download

Product Software
The instrument includes the following software:

• AT4039E GUI.

Instrument GUI runs on Windows XP (32/64 bit), Windows 7,8 and 10.

NOTE. These applications require the Microsoft .NET Framework 3.5.

• If the Microsoft.NET Framework 3.5 is needed, it can be downloaded through this link: http://download.microsoft.com/download/2/0/e/20e90413-712f-438c-988e-fdaa79a8ac3d/dotnetfx35.exe.
• For more products updates, check the following webpage: https://multilaneinc.com/products/at4039e/

Minimum PC Requirements
The Windows PC properties for the AT4039E GUI application should meet the following specifications:

• Windows 7 or greater
• Minimum 1 GB RAM
• 1 Ethernet card to establish connection with the device
• USB connector
• Pentium 4 processor 2.0 GHz or greater
• NET Framework 3.5 sp1

NOTE: It is recommended to connect the BERT via Ethernet to one PC only to prevent conflict from multiple user commands.
NOTE: I t is not recommended to hook up the instrument to a slow network or to connect to it through WiFi

Installation

This section addresses installation and bring-up of the instrument, addressing the following topics:

• System start-up
• Connection guide

First Steps: When you first receive the instrument, it has a pre- configured IP address from the factory. This IP address is printed on a label on the instrument. You may choose to keep this IP or to change it. If you need to change the IP address refer to “How to change IP and update firmware” section.

Connect through Ethernet:

• Connect the PC to the RJ45 connectors located on the side of the V93000 twinning frame through an Ethernet cable. Ethernet is the only way to control the Multilane cassettes.
• In order to connect via Ethernet, you need to know the IP address of the instrument you need to connect to. Check labeling on the cassette shell.
• A simple ping using the windows command line interface is recommended to check if your controlling terminal is able to reach the instrument.
  • To change the IP address of the board, you need to install the USB drivers (refer to section USB Driver Installation).

The instrument is now powered up and connected through the right IP address. Next, you need to configure the signal generated.

GUI Overview

In your instrument’s GUI, there are several control fields that are each explained below.

Instrument Connect Field

The first thing you want to do is to make sure you are connected to the instrument. If you are, the connect button will read Disconnect and the green LED lights up.

PLL Lock and Temperature Status Field

Keep an eye on the LEDs and temperature readings on this field. TX Lock means that the PLL of the PPG is locked. RX lock goes green only if a signal of correct polarity and PRBS kind is detected on the error-detector.
If the temperature reaches 65 ͦC, the electronics will auto shut off.

Reading the installed Firmware Revision
The installed firmware version is displayed in the upper right corner of the GUI.

Line Rate Configuration (Applies to all channels at once)

This is where you set the bitrate for all 4 channels. You can also select the clock input. The clock is internal by default. You should only change to external clock feed in when you need to synchronize two or more AT4039Es to each other in a slave-master fashion; This is achieved by setting the correct jumper configuration on the AT4000 backplane. After changing from internal to external clock and vice versa, you have to click apply for changes to take effect (this takes a few seconds).

Mode & Clock Out Settings (Apply to all channels at once)

Description
The “Ref” denotes the frequency of the clock output. This is a function of the bitrate and will vary according to your clock-out settings under the “Mode” menu. Knowing the clock frequency being output by the BERT is helpful when you want to trigger an oscilloscope. Some oscilloscopes require a clock frequency above 2 GHz. To get the AT4039E to output that, go under mode settings and select the Clock out to be “Monitor”. Choose the denominator so that the result is within the scope range. In the case of the AT4025 , the Ref Clk is used to generate clock from the AT4039E side.

To switch between NRZ and PAM-4 coding, use the TX Mode setting, then click Apply. The options Gray Mapping and DFE pre-coding are only available in PAM4 mode. DFE Pre-coding sends a pre-amble for a DFE receiver to sync to before the actual PRBS pattern is transmitted, to avoid DFE error propagation. The decoder implements a 1+D scheme in response to an ?=??+? encoding. Currently the DFE precoding is automatic and not user selectable. Gray Mapping enables use of PRBSxxQ defined in IEEE802.3bs. When Gray mapping is enabled, the PRBS13 and PRBS31 under the pattern select menu turn into PRBS13Q and PRBS31Q respectively. Gray mapping basically re-arranges the symbol mapping to the following: 00 → 0 01 → 1 11 → 2 10 → 3

Pre-Channel Settings

You can adjust these settings on a per channel basis. These are:

Description
The AT4039E can output a wide range of pre-defined patterns. In addition to the PRBS patterns, there are linearity and jitter test patterns. Also, on top of the pre-defined patterns the user has the possibility of defining his/her own pattern – more on this further below.

Note: error detection only works on the PRBS patterns existing in the RX pattern drop down list. It isn’t possible to do error detection on custom defined patterns.

The custom pattern is made up of 2 fields with 16 hexadecimal characters each. One must fill out both fields with all 32 hex characters. Every hex character is 4 bits wide, making up 2 PAM4 symbols; example 0xF is 1111 so in Gray-coded PAM domain this results in 22, assuming the PAM levels are denoted 0, 1, 2 and 3 Example 2: to transmit a stair signal 0123, fill out the fields with repetitions of 1E In the RX Pattern menu, one can browse all the patterns with which error detection is possible. Note that TX and RX pattern must be the same to acquire RX lock and consequently be able to do measurements. Also the pattern polarity is very important and makes all the difference between having RX PLL lock or no lock at all. You can ensure correct polarity by connecting the TX-P side of the cable to the RX-P and the TX-N to the RX-N. if you do not respect this rule, you can still invert polarity from the GUI on the RX side only.

Inner and Outer eye level controls trim the high and low values of the middle PAM eye. Possible control values range from 500 to 1500 for the inner eye control and from 1500 to 2000 for the outer eye. Optimal values are typically in the middle of the range. Example of tweaking the Outer eye settings is shown below

The default amplitude control is calibrated in millivolt values but does not allow you to change the equalizer settings. If you need to change the FFE tap settings, please go to then enable ‘Advanced Settings’. This enables you to control pre- and post-emphasis values for each channel, but amplitude values will not be shown in millivolt. By default, three taps are shown and can be edited. Think of the amplitude as a digital equalizer with main tap, pre- cursor (pre-emphasis) and post-cursor (post-emphasis). In the regular case, pre- and post-cursors are set to zero; the amplitude is controlled using the main tap. The main, pre- and post-taps use digital values ranging between -1000 and +1000. Increasing and decreasing the pre and post cursors will also affect the amplitude. Please ensure that the sum of pre-, post and main cursors is ≤ 1000 to have optimal performance. If the sum of taps exceeds 1000, linearity of the TX signal cannot be maintained.

Pre-cursor effect on a pulse

Post-cursor effect on a pulse

The user can also edit a 7 taps coefficients instead of just 3 taps by clicking on more setting and then checking the box of 7 tep

After applying the settings, the seven-tap control will be available for editing under the amplitude menu. Any one of the 7 taps can be defined as main tap; in this case, taps preceding it will be pre-cursors. Likewise, taps following the main tap will be post-cursors.

The slicer is the default mode. The reflection canceller consumes more power but is useful for strenuous channels containing transitions of impedanceError insertion is carried out on a block by block basis. Each block is 64 bits, divided into 32 MSBs and 32 LSBs.

Example Inner and Outer Settings Effect:

Taking Measurements

Bit Error Ratio Reading
To be able to start BER measurements, the instrument ports should be in the loopback mode, which means TX port should be connected to the RX port and the PPG and ED patterns should match. One does not necessarily need to supply a PRBS from the same physical instrument – the source can be a different instrument and the error-detector of the AT4039E can derive its own clock from the received data (no need for a separate clock link). However, if Gray coding is used in the source, one should tell the receiver to expect Gray coding as well. If there is a match in pattern, polarity, and coding but still no lock, there could be an MSB/LSB swap on one side.

BER Control

A BER measurement can run in continuous mode and will not stop until the user intervenes and clicks the stop button. BER can also be set to run until a target value is reached or until a certain number of bits has been transmitted (units of 10 gigabits). The Timer lets the user set a time for the BER to stop.

BER Table of Results
The summary of BER measurements is shown in the following pane:

BER Graph

Plots BER values collected on the graph

Histogram Analysis
The histogram is the tool of choice to troubleshoot the link. You can think of it as a scope built into the receiver and it works even if you do not have pattern lock. For both NRZ and PAM signals, the histogram graph is shown as follows:

• The thinner the peaks the better the performance of the PAM signal and the less the jitter. These peaks can be enhanced using the pre/post-emphasis available.
• The same analogy applies as that of the PAM histogram.

Signal to Noise Ratio Analysis

SNR is a quantitative way to measure the strength of the received signal – it is given in dB.

Log file System
In the AT4039E BERT there is a log file system, where every exception handled or unhandled by the GUI will be saved. After the first run, the GUI creates a file in the main directory/exception log, and saves all the existed exceptions. In case the user had a problem with the software, he can send the exception file to our team.

Note : the exception file will be deleted automatically after every 1 week of work.

Saving and Loading Settings
The instrument always saves the last used settings in non-volatile memory. These settings are automatically restored the next time you connect to the BERT. In addition, you can create and save your own set of setup files and can revert to them when needed. Look for the Save/Load menu in the menu bar of the GUI.

How to Change IP Address and Update Firmware

For info regarding changing IP address and updating firmware of the AT4039E, kindly download “Maintenance” folder from https://multilaneinc.com/products/at4039e/. The folder consists of the following:

• ML Maintenance GUI
• USB Driver
• User Guide

multilaneinc.com

References

• Your request has been blocked. This could be due to several reasons.
• AT4039E | MultiLane
• advantest.com/service-support/ic-test-systems/software-information-and-download/v93000-software-information-and-download

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