NXP UM11855 Evaluation Board User Manual

: June 9, 2024
: NXP

UM11855

NVT4558-4858-EVB evaluation board

Rev. 1.0 — 10 March 2023 User

manual

Document information

Information	Content
Keywords	NVT4858, NVT4558, Level Shifter, Level Translator, SD card, SIM

card, NVT4858 user manual, NVT4757 user manual, NVT4858 evaluation board, NVT4858 evaluation board
Abstract| The NVT4858 is an SD 3.0 compliant dual voltage level translator with auto-direction control. The NVT4558 is a SIM SIO-7816 Smart Card compliant dual voltage level translator with auto-direction control. This document is intended to help the users to quickly setup, configure and operate the evaluation board in the users’ hardware platform.

NXP logo1

NXP Semiconductors

Revision history

Rev	Date	Description
v.1.0	20230310	Initial version

Important notice

NXP provides the enclosed product(s) under the following conditions:

This evaluation kit is intended for use of ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered to a printed circuit board to make it easier to access inputs, outputs, and supply terminals. This evaluation board may be used with any development system or other source of I/O signals by simply connecting it to the host MCU or computer board via off-the-shelf cables. This evaluation board is not a Reference Design and is not intended to represent a final design recommendation for any particular application. Final device in an application will be heavily dependent on proper printed circuit board layout and heat sinking design as well as attention to supply filtering, transient suppression, and I/O signal quality.

The goods provided may not be complete in terms of required design, marketing, and or manufacturing related protective considerations, including product safety measures typically found in the end product incorporating the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. For any safety concerns, contact NXP sales and technical support services.

1 Introduction

The NVT4558/NVT4858 are dual supply translating transceivers with auto direction sensing, enabling bidirectional voltage level translation. VCCA on the host side can be supplied at any voltage between 1.08 V and 1.98 V and VCCB on the card side can be supplied at any voltage between 1.62 V and 3.6 V.

The NVT4858 supports SD 3.0 SDR104, SDR50, DDR50, SDR25, SDR12 and SD 2.0 High-Speed (50 MHz) and Default-Speed (25 MHz) modes. The NVT4558 is compliant with all ETSI, IMT-2000 and ISO-7816 SIM/ Smart card interface requirements

This document is intended to help the users to quickly setup, configure and operate the NVT4558-4858-EVB evaluation board in the users’ hardware platform.

2 Finding kit resources and information on the NXP web site

NXP Semiconductors provides online resources for this evaluation board and its supported device(s) on http://www.nxp.com.

The information page for NVT4558-4858-EVB evaluation board is at http://www.nxp.com/NVT4558-4858-EVB. The information page provides overview information, documentation, software and tools, parametrics, ordering information and a Getting Started tab. The Getting Started tab provides quick-reference information applicable to using the NVT4558-4858-EVB evaluation board, including the downloadable assets referenced in this document.

2.1 Collaborate in the NXP community

The NXP community is for sharing ideas and tips, ask and answer technical questions, and receive input on just about any embedded design topic.

The NXP community is at http://community.nxp.com.

3 Getting ready

Working with the NVT4558-4858-EVB evaluation board requires the kit contents.

3.1 Kit contents

Assembled and tested evaluation board in an anti-static bag
Quick Start Guide

4 Getting to know the hardware

As default, NVT4558-4858-EVB evaluation board is loaded with the NVT4858 (SD level shifter) as well as the NVT4558 (SIM level shifter) along with one SD card socket and one SIM card socket.

The demo board is designed to be a stand-alone board to allow the users to evaluate the performance of the NVT4858 or the NVT4558. There are four 100 mil headers, and the connections to all of the pins of the NVT4858 and the NVT4558 are available at these headers. In addition, there is one SIM card socket and one SD card socket available on the board. The SIM card, or the SD card that is inserted in the socket can be directly accessed by the SD host controller or the SIM controller via the 100 mil headers on the host interface side of the level shifter.

NXP UM11855 - Figure 1

Figure 1. NVT4558-4858-EVB evaluation board

NXP UM11855 - Figure 2

Figure 2. NVT4558-4858-EVB evaluation board block diagram

4.1 SIM level shifter and host controller interface

Please refer to Figure 1 to find the location of connectors and jumpers on the evaluation board.

NXP UM11855 - Figure 3

Figure 3. NVT4558 host interface

4.2 NVT4558 to SIM controller interface via J3

User can connect the NVT4558-4858-EVB evaluation board to the SIM controller via J3 with a 14-pin ribbon cable. The pin map for the SIM interface header is shown below.

Table 1. SIM controller interface header

J3 on NVT4858-4558-EVB	SIM controller	Comment
2 – NVT4558_VCCA	VCC	Level Shifter VCCA (1.08V – 2.0V)
3 – SIM_RST	SIM RST	SIM reset
4 – NO CONNECT	–	NO CONNECT
7 – SIM_DETECT	GPIO	SIM card insert detection, active low, pull-up on host

4.3 SIM interface resistor loading options

The SIM interface of NVT4558 (U2) can be routed to a 4-pin header, or to the SIM card socket. When the interface is routed to the header (J25), this option allows the user an easy way to scope out the SIM signals and this is the default configuration.

If the SIM interface of NVT4558 must be routed to the SIM socket (J1) to access the SIM card, then R63, R64, R65 must be removed and R60, R61, R62 must be stuffed.

NXP UM11855 - Figure 4

Figure 4. NVT4558 SIM socket loading option

4.4 SD level shifter host controller interface

NXP UM11855 - Figure 5

Figure 5. NVT4858 host interface

4.5 NVT4858 to SIM controller interface via J7

Table 2. SD controller interface header

J7 on NVT4558-4858-EVB	SD host controller	Comment
2 – SD_PWR_EN	GPIO	0 = turn off SD card power

4.6 SD interface resistor loading options

The SD card interface of NVT4558 (U7) can be routed to an 8-pin header, or to the SD card socket. When the interface is routed to the header (J26), this option allows the user an easy way to scope out the SD signals; this is the default configuration.

If the SD interface of NVT4858 must be routed to the SD socket (J19) to access the SD card, then R54, R55, R56, R57, R58, R59 must be removed and R48, R49, R50, R51, R52, R53 must be stuffed.

NXP UM11855 - Figure 6

Figure 6. SD socket loading option

5 Errata list

Table 3.Errata list

Date	Errata Description	Demo Impact	Solution
–	None	None	None

6 Legal information

6.1 Definitions

Draft — A draft status on a document indicates that the content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included in a draft version of a document and shall have no liability for the consequences of use of such information.

6.2 Disclaimers

Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors.

In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including – without limitation – lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.

NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.

Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.

Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer.

In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages.

Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose.

Translations — A non-English (translated) version of a document, including the legal information in that document, is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.

Security — Customer understands that all NXP products may be subject to unidentified vulnerabilities or may support established security standards or specifications with known limitations. Customer is responsible for the design and operation of its applications and products throughout their lifecycles to reduce the effect of these vulnerabilities on customer’s applications and products. Customer’s responsibility also extends to other open and/or proprietary technologies supported by NXP products for use in customer’s applications. NXP accepts no liability for any vulnerability.

Customer should regularly check security updates from NXP and follow up appropriately. Customer shall select products with security features that best meet rules, regulations, and standards of the intended application and make the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, and security related requirements concerning its products, regardless of any information or support that may be provided by NXP.

NXP has a Product Security Incident Response Team (PSIRT) (reachable at PSIRT@nxp.com) that manages the investigation, reporting, and solution release to security vulnerabilities of NXP products.

6.3 Trademarks

Notice: All referenced brands, product names, service names, and trademarks are the property of their respective owners.

NXP — wordmark and logo are trademarks of NXP B.V.

User manual Rev. 1.0 — 10 March 2023

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

Date of release: 10 March 2023
Document identifier: UM11855