Microsemi UG0938 Gamma Correction User Guide
- June 10, 2024
- Microsemi
Table of Contents
UG0938
User Guide
Gamma Correction
UG0938 Gamma Correction
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Revision History
The revision history describes the changes that were implemented in the
document. The changes are listed by revision, starting with the most current
publication.
1.1 Revision 1.0
The first publication of this document.
Introduction
A camera sensor converts the light intensity of a pixel into equivalent
digital value. The digital value is directly proportional to the light
intensity of a pixel and hence has a linear relationship. However, a human eye
perceives the images as a logarithmic function of intensity instead of a
linear function. If the images from a camera sensor are directly displayed on
a display device, then the scene will appear unnatural because of the
differences between the camera sensor and human eye perception. To compensate
this, the image from the camera sensor goes through the gamma correction.
Gamma correction uses an exponent function to compensate for the logarithmic
perception by using the below equation: Dout = (Din)γEquation 1
where,
D out represents output image data (RGB). Represented in the range of 0 to 1.
D in represents input image data (RGB). Represented in the range of 0 to 1.
γ represents the gamma correction factor. A fixed gamma correction factor of
0.4545 corresponding to a gamma of 2.2 is implemented in the IP.
The Gamma correction IP is implemented using a LUT for exponent function.
The width of the input data determines the number of entries in the LUT. For
example, 8-bit input data would require 2 8 (256) entries in the LUT.
This section describes the inputs and outputs and configuration parameters of
the Gamma Correction IP.
2.1 Key Features
- LUT based gamma correction
- Fixed gamma factor of 2.2
- Supports data width of 8 and 10
2.2 Supported Families ®
- PolarFire SoC ®
- PolarFire
- RTG4™
- IGLOO 2 ®
- SmartFusion 2
2.3 Inputs and Outputs
Figure 1 • Inputs and Outputs
The following table lists the input and output ports of the Gamma Correction
IP.
Table 1 • Input and Output Ports
| Port Name | Direction | Width | Description |
|---|---|---|---|
| SYS CLK I | Input | 1 bit | System clock. |
| RESETN I | Input | 1 bit | Active low asynchronous reset signal. |
| DATA VALID I | Input | 1 bit | Input data valid signal. This signal should be |
asserted when the data is valid.
RED _I| Input| 8 bits| Input Red pixel data.
GREEN _I| Input| 8 bits| Input Green pixel data.
BLUE _I| Input| 8 bits| Input Blue pixel data.
DATA VALID 0| Output| 1 bit| Output data valid signal. This signal is asserted
when the output data is valid.
REDO| Output| 8 bits| Output Red pixel data.
GREEN _O| Output| 8 bits| Output Green pixel data.
BLUE _O| Output| 8 bits| Output Blue pixel data.
2.4 Configuration Parameters
The following table lists the configuration parameters used in the hardware
implementation of the Gamma correction. These parameters are generic and can
be varied based on the application requirement.
Table 2 • Configuration Parameters
| Parameter Name | Description |
|---|---|
| G_DATA_WIDTH | Represents bitwidth of input and output data. Current version |
supports 8-bit and 10-bit input and output data.
Testbench
A testbench is provided to check the functionality of the Gamma Correction IP.
To ensure that the testbench works correctly, the configuration parameters
listed in Table 3 must be configured at the beginning of the testbench file.
Table 3 • Testbench Configuration Parameters
| Name | Description |
|---|---|
| CLKPERIOD | Clock period |
| g_DATAWIDTH | Width of each pixel |
| HEIGHT | Vertical resolution |
| WIDTH | Horizontal resolution |
| IMAGE_FILE_NAME | Input image file |
3.1 License
Gamma-Correction clear RTL is license locked and the obfuscated RTL available
for free.
3.1.1 Obfuscated
Complete RTL code is provided for the core, allowing the core to be
instantiated with the SmartDesign tool. Simulation, synthesis, and layout can
be performed within Libero® System-on-Chip (SoC). The RTL code for the core is
obfuscated.
3.1.2 RTL
Complete RTL source code is provided for the core.
The following steps describe how to simulate the core using the testbench. The
packaged testbench will gamma correct an input image.
-
In the Design Flow window, expand Create Design. Right-click Create SmartDesign testbench and click Run, as shown in the following figure.
Figure 2 • Design Flow
SmartDesign testbench is created, and a canvas appears
to the right of the Design Flow pane. -
In the Libero SoC Catalog (View > Windows > Catalog), expand Solutions-Video, and drag the Gamma-Correction IP core onto the SmartDesign testbench canvas.
Figure 3 • Libero SoC Catalog
-
Select the default component name and click OK.
-
In the Gamma-Correction Configurator GUI window, update the G_DATA_WIDTH and click OK.
Figure 4 • Configurator
-
On Design Hierarchy tab, right-click GAMMA_CORRECTION_C0 and click Set As Root.
-
Select all the ports on the GAMMA_CORRECTION_C0 instance, right-click, and select Promote to Top Level, as shown in the following figure.
**Figure 5 • GAMMA_CORRECTION_C0 Instance Figure 6 • SmartDesign Toolbar
**-
Click Generate Component from the SmartDesign toolbar.
-
Go to the Files tab and select simulation > Import Files…, as shown in the following figure.
Figure 7 • Import Files
-
Import the Input Image file “CFA_RGB_in.txt” from the following path:
..\\component\Microsemi\SolutionCore\Gamma- Correction\1.0.0\Stimulus. To import a different file, browse the folder that contains the required file, and click Open. The imported file is listed under simulation as shown in the following figure.
Figure 8 • Simulation
-
On Stimulus Hierarchy tab, right-click gamma_correction_test testbench file and click Open Interactively from Simulate Pre-Synth Design.
Figure 9 • Stimulus Hierarchy
The ModelSim tool appears with the test bench file
loaded onto it, as shown in the following figure.
Figure 10 • ModelSim tool
-
If the simulation is interrupted because of the runtime limit in the DO file, use the run -all command to complete the simulation. By default, the output image file is placed in the Files/simulation directory and uses the CFA_RGB_out.txt.
Simulation Results
4.1 Timing Diagram
The following is the timing diagram for Gamma Correction IP showing video data
and output image.
Figure 11 • Gamma Correction IP
4.2 Input Image
Figure 12 • Input Image
4.3 Output Image
Figure 13 • Output Image
Resource Utilization
Gamma correction is implemented on PolarFire FPGA (MPF500T -1FCG1152I
package). The following table shows the resource utilization report after
synthesis.
Table 4 • Gamma Correction IP Resource Utilization
| Gamma Correction IP | LUT | DFF | RAM1K20 | MACC |
|---|---|---|---|---|
| G_DATA_WIDTH=8 | 354 | 26 | 0 | 0 |
| G_DATA_WIDTH=10 | 1439 | 32 | 0 | 0 |
©2020 Microsemi, a wholly owned subsidiary of Microchip Technology Inc. All
rights reserved. Microsemi and the Microsemi logo are registered trademarks of
Microsemi Corporation. All other trademarks and service marks are the property
of their respective owners.
Microsemi Proprietary UG0938 Revision 1.0
Resource Utilization
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50200938. 1.0 11/20
References
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