Ossila Push-Fit Test Board 20 x 15 mm User Manual

June 9, 2024
Ossila

Ossila Push-Fit Test Board 20 x 15 mm

Ossila-Push-Fit-Test-Board-20-x-15-mm-product

Product Information

OFET Test Boards

The OFET Test Boards from Ossila are designed to simplify the measurement of OFET devices by eliminating the need for probe stations. These test boards are compatible with pre-patterned OFET substrates, prefabricated OFET test chips, and devices fabricated using Ossila’s OFET evaporation masks.

There are two types of OFET Test Boards available:

  • Low Density OFET Test Board (Product Code: P2013)
  • High Density OFET Test Board (Product Code: P2014)

Low Density OFET Test Board (P2013)

The Low Density OFET Test Board is designed for use with low density OFET structures (i.e. those with a small number of OFETs per unit area). The board features 16 pads which can be used for contacting and measuring the devices. The pitch between the pads is 2.54mm.

High Density OFET Test Board (P2014)

The High Density OFET Test Board is designed for use with high-density OFET structures (i.e. those with a large number of OFETs per unit area). The board features 64 pads which can be used for contacting and measuring the devices. The pitch between the pads is 0.8mm.

Measurement Error and Noise

The OFET Test Boards are designed to enable high-accuracy measurements of OFET devices. However, there are several factors that can affect measurement accuracy, including:

  • Noise in the measurement system
    • <li.Improper grounding or shielding
    • <li.Incorrect placement of contacts
    • <li.Incorrect test setup conditions

It is important to carefully follow the usage instructions provided in the user manual to ensure accurate measurements.

Related Products

Ossila offers a range of related products, including pre-patterned OFET substrates, prefabricated OFET test chips, and OFET evaporation masks. These products are designed to work seamlessly with the OFET Test Boards to simplify the measurement of OFET devices.

Product Usage Instructions

Before using the OFET Test Boards, please read and follow the safety precautions provided in the user manual. It is important to handle the boards with care to avoid damage.

Low Density OFET Test Board (P2013)

  1. 1. Attach the pre-patterned OFET substrate or prefabricated OFET test chip to the board using a double-sided tape.
  2. Attach gold wires to the source and drain electrodes of the OFET device using conductive epoxy.
  • <li.Attach the gate electrode using a conductive adhesive.
    • Connect the board to a measurement system using shielded cables and ensure proper grounding.
    • <li.Measure and record the electrical characteristics of the device.

High Density OFET Test Board (P2014)

  1. 1. Attach the pre-patterned OFET substrate or prefabricated OFET test chip to the board using double-sided tape.
  2. Attach gold wires to the source and drain electrodes of the OFET device using conductive epoxy.
  • <li.Attach the gate electrode using a conductive adhesive.
  • Connect the board to a measurement system using shielded cables and ensure proper grounding.
    • <li.Select the appropriate pitch adapter for your device from the pitch adapter kit (sold separately).
    • <li.Place the adapter onto the test board, aligning the pins with the pads on the board.
    • <li.Place the device onto the adapter and align it with the pins on the adapter.
    • <li.Measure and record the electrical characteristics of the device.

Overview

Ossila-Push-Fit-Test-Board-20-x-15-mm-
fig-1

The Ossila OFET Test Boards are designed to work with our pre-patterned OFET substrates, prefabricated OFET test chips, and devices fabricated using Ossila’s OFET evaporation masks, eliminating the need for probe stations and simplifying the measurement of OFET devices.

EU Declaration of Conformity

We

  • Company Name: Ossila BV
  • Postal Address: Biopartner 3 building, Galileiweg 8
  • Postcode: 2333 BD Leiden
  • Country: The Netherlands
  • Telephone number: +31 (0)71 3322992
  • Email Address: [email protected]

declare that the DoC is issued under our sole responsibility and belongs to the following product:

Product: Low Density OFET Test Board (P2013A1), OFET Test Board for High Density OFETs (P2014A1)
Serial number: E222-xxxx, E481-xxxx, P2013A1-xxxx, P2014A1-xxxx

Object of declaration

  • Low-Density OFET Test Board (E222, P2013A1)
  • OFET Test Board for High Density OFETs (E481, P2014A1)

The object of declaration described above is in conformity with the relevant Union harmonization legislation:

  • EMC Directive 2014/30/EU
  • RoHS Directive 2011/65/EU

Signed

  • Name: Dr James Kingsley
  • Place: Leiden
  • Date: 16/11/2021

Safety

Warning

  • When using the test board without an interlocked electrical test cage or enclosure the maximum operating voltage is ±50 VAC and ±70 VDC.
  • When using the test board with an interlocked electrical test cage or enclosure the absolute maximum operating voltage is ±100 V and the absolute maximum operating current is ±100 mA.
  • Do NOT touch the test board or operate the switches while voltage or current is applied to the test board.

Use of Equipment

The Ossila OFET Test Boards are designed to be used as instructed. They are intended for use under the following conditions:

  • Indoors in a laboratory environment (Pollution Degree 2)
  • Altitudes up to 2000m
  • Temperatures of 5°C to 40°C; maximum relative humidity of 80% up to 31°C.

Hazard Icons

The following symbols can be found at points throughout the rest of the manual. Note and read each warning before attempting any associated operations associated with it:

Symbol /Associated Hazard

  • Electrical shock

General Hazards

Before installing or operating the Ossila OFET Test Boards there are several health and safety precautions which must be followed and executed to ensure safe installation and operation.

Servicing

If servicing is required, please return the unit to Ossila Ltd. The warranty will be invalidated if:

  • Modification or service has been carried out by anyone other than an Ossila engineer.
  • The Unit has been subjected to chemical damage through improper use.
  • The Unit has been operated outside the usage parameters stated in the user documentation associated with the Unit.
  • The Unit has been rendered inoperable through accident, misuse, contamination, improper maintenance, modification, or other external causes.

Health and Safety – Servicing

Servicing should only be performed by an Ossila engineer. Any modification or alteration may damage the equipment, cause injury, or death. It will also void your equipment’s warranty.

Operation

Test boards should be secured to prevent them from moving during measurement, ideally away from sources of electromagnetic or electrostatic noise. If you are performing a measurement greater than ±50 VAC or ±70 VDC test boards must be secured inside an interlocked electrical test cage or enclosure.

Low Density OFET Test BoardOssila-Push-Fit-Test-Board-20-x-15-mm-
fig-3

  1. Using low-capacitance coaxial cables, connect the gate and source/drain connectors to the gate and drain channels of a multi-channel source-measure unit respectively.
    • Alternatively, the test board can be connected to two single-channel source-measure units.
  2. Remove the lid and insert the OFET into the device holder, ensuring the gate and drain contacts are facing down and in contact with the correct pins.
    • The gate pins are the pins closest to the BNC connectors.
  3. Replace the lid, switch the gate switches to the ‘On’ position, and ensure that source/drain and ground switches are in the ‘Off’ position.
    • Note: The switches have two levers on them, when changing the state of a switch both levers should be set to the desired state.
  4. Set the source/drain and ground switch of the device to measure to the ‘On’ position.
  5. Run your measurement.

_ Warning: _Do NOT operate the switches or touch the test board while voltage or current is applied to the test board.

OFET Test Board for High Density OFETsOssila-Push-Fit-Test-Board-20-x-15
-mm-fig-4

  1. Using low-capacitance coaxial cables, connect the gate and source/drain connectors to the gate and drain channels of a multi-channel source-measure unit respectively.
    • Alternatively, the test board can be connected to two single channel source-measure units.
  2. Remove the lid and insert the OFET into the device holder, ensuring the gate and drain contacts are facing down and in contact with the correct pins.
    • The gate pins are the pins closest to the BNC connectors.
  3. Replace the lid, switch the gate switches to the ‘On’ position, and ensure that source/drain switches are in the ‘Off’ position.
    • Note: The switches have two levers on them, when changing the state of a switch both levers should be set to the desired state.
  4. Set the source/drain switch of the device to measure to the ‘On’ position.
  5. Run your measurement.
    • Warning: Do NOT operate the switches or touch the test board while voltage or current is applied to the test board.

Measurement Error and Noise

Measurement accuracy defines how close the measured quantity (current/voltage) is to the actual value. While the accuracy primarily depends on the intrinsic accuracy of the source-measure unit (SMU), several external factors, including setup and measurement settings, can severely degrade the quality of the acquisition. Any test fixture (such as coaxial (BNC) cables, substrate holder etc) introduces additional noise and leakage currents, mainly due to the internal leakage resistances, parasitic capacitances and electromagnetic/electrostatic pickup, making high-precision measurement of low value current/voltage challenging and expensive. To complicate matters, some organic semiconductor compounds require high voltages (±100 V and higher) to yield current of the order of a few hundred nanoampere, a condition that imposes stringent requirements on the insulating properties of the test board, coaxial cable and switches. On the other end of the spectrum, high performance semiconductors with large ON/OFF ratio requires the capability of maintaining high accuracy while acquiring current varying across several measurement ranges of the SMU.

In the following, we will briefly outline some of the more common factors affecting the accuracy and reliability of OFET characterization.

High Accuracy Measurements

Let us first introduce a few concepts and definitions that are commonly used when describing the “precision” of a measurement apparatus. For more details, please refer to Low-Level Measurements Handbook, 6th Ed., and Keighley. The content of this paragraph is mainly based on this publication.

Accuracy: defines how close the measured value is to the actual value. Generally, a SMU data sheet explicitly states the accuracy as the sum of a constant offset plus a term depending on the measured quantity (% of measured quantity). These values are determined under some precise operational conditions (temperature, time elapsed from the last factory calibration, etc) and, most importantly, depend on the measurement range.

Sensitivity: is the minimum quantity that the SMU can detect. Again, this depends on the measurement range, temperature, etc.

Resolution: is the smallest change that the SMU can output or measure. As above, the resolution can depend on the measurement range and is guaranteed if, and only if, certain conditions are met (temperature, calibration etc). For a SMU, the output and input resolution can be different.

Reproducibility:  refers to the capability of a measurement apparatus to yield the same value over time. Ageing, poor maintenance, temperature variations are detrimental to the reproducibility of the measurement outcomes.

Uncertainty: is the estimated error that accompanies any measurement. Let us suppose that a SMU is used to estimate the unknown electrical resistance R by applying a voltage V and measuring both voltage V and current I across the resistor. If δV and δI are the independent and random errors associated to the voltage and current measurements, respectively, the uncertainty of the resistance =⁄ is given by:

In general, (for dependent and/or non-random error):

The formulas above can be easily generalised to any quantity Q calculated as the product of the measured quantities, x, y, l, m…, as in =()()⁄ [Introduction to error analysis, JR Taylor, 2nd edition.]

Factors Affecting Measurement Accuracy

Measurement Setting:  Generally, a SMU allows the user to set the appropriate measurement range, i.e., the maximum current that the SMU is expected to measure. Currents exceeding the measurement range are not allowed and the SMU will therefore stop increasing the voltage and output a compliance warning. Each measurement range corresponds to a different SMU circuitry optimised to generate and measure signal falling in the chosen range. Usually, the higher the range, the lower the accuracy and the resolution of the SMU. Therefore, for a fixed-range measurement of an I-V sweep spanning several orders of magnitudes, the accuracy of the “OFF” current is limited by the accuracy of the minimum range required to measure the large “ON” current.

PLC rejection: The PLC (Power Line Cycle) is the oscillation of the electrical current supplied through the power grid, which is 50 or 60 Hz depending on the location. Make sure that the SMU is capable of efficiently rejecting the PLC oscillations of the power supply; otherwise, especially for low currents, PLC can manifest itself into an oscillating behaviour of the current/voltage reading.

Settling Time:  Any physical system requires a finite time to respond to an external input and reach a new equilibrium state. In the context of current/voltage measurement this transient time is often referred to as settling time, and it depends on the resistivity and capacitive components of the measurement apparatus (SMU, cable and test fixture) and on “speed” of the device under test. The SMU settling time are specified in the SMU User’s guide for any measurement range. Note, however, that the SMU can require a longer time to settle if the load current is close to the upper limit of the chosen range.

Coaxial cable: Low resistance, low capacitance, shielded coaxial cables are required for fast and accurate measurement, Figure 5.1. The cables must be kept away from ES/EM noise sources and vibrations. Vibrations of the cable can in fact induce carriers in the dielectric due to the rubbing of the dielectric against the external jacket of the cable (triboelectric effect), or as effect of the mechanical stress on the dielectric itself, see Figure 5.2. The “noise” induced by vibration-generated charges in the dielectric become non-negligible when measuring low (few nA) currents.

Ossila-Push-Fit-Test-Board-20-x-15-mm-fig-7

Right: Coaxial cable: the shield is connected to the LOW (or to the ground) output of the SMU, while the central conductor is connected to the HIGH output. Left side: equivalent circuit of coaxial cable. A coaxial cable can be modelled as a sequence of RLC circuit in series, where Rd, RL and C stand for resistive, inductive and capacitive element of the circuit.Ossila-
Push-Fit-Test-Board-20-x-15-mm-fig-8

Teflon or PTFE insulated coaxial cables are ideal for measuring currents less than 10-14 Amp. Cables with polyethylene insulation also have low leakage resistance and will give good performance. In any case, the coaxial cable should be chosen to have low capacitance per unit length and kept as short as possible.

Vibration and mechanical stress exerted on the dielectric of a coaxial cable can induce charges generated at the Jacket/Dielectric interface (triboelectric effect), or inside the dielectric itself (piezoelectric current). Negligible for high current measurement, these spurious currents can degrade the accuracy of low- level current acquisitions.

Metal/Metal Heterojunction:  Any temperature difference between two parts of a conductive material results in a potential drop across the material itself (Seebeck effect). The Seebeck effect is quantified by the Seebeck coefficient, which has the unit of μV/°C and expresses the potential drop for a 1 °C of temperature difference. The coefficient depends on the type of metal(s) and on the temperature of the conductor itself. Typical values range from few μV/°C for Al, Au and Cu, to hundreds of μV/°C for Si. For standard OFET characterisation with driving voltage larger than 1 V, the error introduced by Seebeck is negligible. On the contrary, for low-voltage driving potential (<0.1 V), the Seebeck effect can affect the measurement accuracy, especially for study of the temperature-dependence semiconductor properties such as the field-effect mobility. Such low-voltage measurements are common for graphene-based devices.

Temperature and Humidity:  The precision of the SMU is stated with respect to a specific calibration temperature; to this respect, the User is advised to carefully read the SMU manual and familiarise with the concept of temperature coefficient for current-voltage sweep. In general, if the SMU temperature is more than five degrees centigrade lower or higher than the factory specifications, the User should correct the reading using the appropriate equation and temperature coefficients as stated in the SMU’s user manual. In addition, the temperature effects are responsible for variations in the resistance of any resistor R used in the measurement setup. Humidity can increase spurious current by reducing the dielectric capacitance and increasing leakage resistance.Ossila-Push-Fit-Test-Board-20-x-15-mm-
fig-9

Ground Loop:  A ground loop is an unwanted potential difference between two points of the measurement set that are supposed to be at the same potential. For example, if the ground of the DUT and the ground of the SMU are not the same, a ground loop will exist between the DUT and the SMU. A ground loop can also be found between two SMUs grounded to the “building” ground. Usually, there is a small difference of potential between any power sockets, therefore two SMUs grounded to two different sockets can present a ground loop. This potential difference generates a spurious current, which in turn introduces an error in the measurement. For OFET measurements, make sure that the ground of the drain and the ground of the gate are at the same potential. On the probe station and the manuals board, both the gate and drain are grounded through the ground plane, thus minimising any ground loops. However, if you use long BNC cables it is good practice to connect the ground (low) together. In addition, SMU with an internal ground (LOW output) independent of the building ground minimise ground loop.

Electrostatic Interference and RF: A charged body (such as human being or charged plastic object) can interfere with the measurement apparatus and introduce errors of the order of nA, in particularly when carrying out a high resistance measurement as the externally-induced charge does not dissipate quickly. These errors are usually negligible for current in the range of μA or larger; however, they can potentially disrupt the measurement of the low OFF transistor currents, where the simple movement of a human hand close to the DUT can result in detectable “spikes”. Although the board is shielded using a double ground plane, the pins are exposed. It is therefore good practice to position the DUT at least 1 meter away from electrically charged body. In addition to DC electrostatic noise, AC noise (due to PLC frequency) and RF noise can degrade the accuracy of low current/voltage measurement. The double ground plane is designed to reject EMC noise; however, the source of intense AC noise such as pumps and mobile phone screens must be kept (at least) 1 meter away from SMU, coaxial cables and DUT.

Test set-up conditions

  • Care must be taken to ensure that the bottom of the board is well isolated from any conductive surface, both for safety reason and to minimize leakage currents.
  • Do NOT operate the switches or touch the test boards when a voltage or current is applied.
  • Do NOT apply voltages above ±50 VAC or ±70 VDC unless the test board is secured inside an interlocked electrical test cage or enclosure.
  • The absolute maximum values to be applied to the test board are ±100 V and ±100 mA.

Related Products

Silicon Oxide Substrates and Wafers

  • Silicon substrates designed for use as FET substrates.
    • Product codes: S146 / S147 / S148

Platinum OFET Test Chips, High Density

  • Prefabricated FET test chips, for easy and rapid characterisation.
    • Product codes: S403 / S404

Evaporation Stack for OFETs, Low Density

  • Evaporation stack for thermal evaporation of OFETS. For use with low-density deposition masks.
    • Product code: E281

Evaporation Stack for OFETs, High Density

  • Evaporation stack for thermal evaporation of OFETS. For use with high-density deposition masks.
    • Product code: E312

Flat Tip Tweezers

  • Provides a good substrate grip without scratching.
    • Product code: C121

ITO Glass Substrates, 20 x 15 mm, OFET and Sensing

  • Pre-patterned ITO substrates for rapid fabrication and characterisation of OFETs.
    • Product code: S161 / S162

Source-Drain Deposition Mask, Low Density

  • Shadow masks for deposition of source drain contacts for low-density OFETs.
    • Product codes: E291 / E292

Source-Drain Deposition Mask, High Density

  • Shadow masks for deposition of source-drain contacts for high-density OFETs.
    • Product code: E321 / E322 / E323

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