NXP S32G3 Vehicle Network Processor User Manual

S32G3 Vehicle Network Processor
User Manual

NXP Vehicle Network Processor S32G3-Migration Considerations from Rev 1.0 to Rev 1.1
by: NXP Semiconductors

Introduction

The purpose of this Engineering Bulletin is to summarize the changes to the latest Revision of the S32G3.
S32G3 Rev 1.1 incorporates errata fixes and other design improvements as detailed in this document.

S32G3 part identification updates

Updated BSDL files with the modified ‘IDCODE_REGISTER’ should be used with S32G3 Rev 1.1.

S32G3 Rev 1.1 enhancements over Rev 1.0

The S32G3 Rev 1.1 implements errata fixes and security related updates over Rev 1.0.
The following errata are fixed on S32G3 Rev 1.1:
a) ERR051271 – BootROM: Serial boot may take more than expected time to initialize
b) ERR051257 – Boot ROM: The boot sequence can hang if the QSPI interrupt pin transitions low during boot.
c) ERR051166 – Core: A Cortex-M7 application core can enter a hung state if an interrupt is received shortly after execution of a wait instruction.
d) ERR051303 – XRDC: PFE assigned Domain IDs not as documented
Please refer to the ‘Mask Set Errata for Mask 0P72B’ for applicable errata on S32G3 Rev 1.0 and ‘Mask Set Errata for Mask 1P72B’ for applicable errata on S32G3 Rev 1.1.
Security related updates: In addition to these errata fixes, the S32G3 Rev 1.1 implements an improved authentication scheme over IVT, ST_DCD, DCD, AppBL and the device specific HSE firmware image.

S32G3 hardware design consideration

This section provides details about the hardware considerations of the fixes done on the S32G3 Rev 1.1.

• ERR051271: The workaround to this errata requires you to generate an INV_RESET_B (invert of RESET_B) signal and tie it to BOOTMOD2 pin for serial boot mode. In the new Rev of silicon, this is no longer necessary. Hence you can remove the circuit on S32G3 Rev 1.1, and simply tie this pin to HIGH. For existing hardware, in case the workaround is already implemented, the external circuit to generate INV_RESET_B signal becomes a do not care and even if the output of this circuit is tied to the BOOTMOD2 pin the serial boot mode works as expected.
• ERR051257: The hardware workaround to this errata requires the user to disconnect the external ECC reporting signal coming from the QSPI flash from the S32G3 QSPI interrupt pin. This mechanism leads to the application losing the capability to sense the signal and take corrective action based on it. In the new Rev of silicon this dependency is removed and new hardware designs can now connect the ECC out signal from the QSPI flash to S32G3 QSPI interrupt input pin.
  In case the QSPI flash does not support ECC out signal or application does not intend to use it, the workaround requires the QSPI interrupt pin to be pulled high. It is no longer required for the S32G3 Rev 1.1. You can remove the pull up or use the pin for other requirements. For existing hardware with the pin pulled high, keeping the connection as it is has no impact.

S32G3 software considerations

This section provides details about the software considerations of the fixes implemented on the S32G3 Rev 1.1.

• ERR051257: The software workaround for this errata requires you to input a DCD that configures the QSPI interrupt pin to the default GPIO functionality. The BootROM in S32G3 Rev 1.1 no longer configures the QSPI interrupt pin and leaves it in the default GPIO mode. As such, the DCD steps become redundant and can be removed. For applications that have implemented the workaround you can decide to leave the DCD implementation as is. The DCD instructions become redundant in this case.
• ERR051166: The errata workaround requires application software to follow a set of instructions before any Cotrex-M7® executes a WFI/WFE instruction. A complementary set of instructions are also implemented on the debugger side. For the S32G3 Rev 1.1, this workaround is not necessary. As such, a S32G3 Rev 1.1 compliant debugger must be used and the application should also remove steps related to the workaround. Leaving the steps as it is in the application with the debugger not implementing the workaround can lead to debugger connect issues.
• ERR051303: The DID values for PFE HIF have changed on S32G3 Rev 1.1. The user application now uses the new DID values for any XRDC based isolation on the PFE HIF.

Security related updates: In addition to the errata fixes, the S32G3 Rev 1.1 will also operate with an updated set of system images. It also requires a new HSE firmware version to create these images. The change is reflected in the HSE boot data image GMAC generation service structure (hseBootDataImageSignSrv_t).
The device-specific HSE FW image structure (aka “blue FW image”) is also changed, however there is no change to the NXP distributed HSE FW image format (aka “pink FW image”). It should also be noted that the S32G3 Rev 1.1 will not be able to install HSE FW older than x.2.x.x. These devices must only be used with the HSE FW version x.2.x.x or later. The new HSE FW version on the other hand will be backwards compatible and be able to support the S32G3 Rev 1.0 for existing development purpose. NXP plans to qualify only S32G3 Rev 1.1 for production.
You must always ensure to check the release notes of NXP provided software to confirm if the latest Rev is supported by the software. Refer to the document “S32G Software Offering” from My NXP > Secure Files to obtain information on compatible NXP SW releases. For errata impact on various NXP SW deliverables, refer to the document ‘Analysis of NXP software – S32G3 Errata’ available from My NXP > Secure Files.

S32G3 tools considerations

This section provides details about the tools considerations of the fixes implemented on the S32G3 Rev 1.1.

• ERR051166: Please check with your debugger tool vendor for the correct version of the tool that will work with S32G3 Revision 1.1.
• Security related updates: The new authentication scheme requires you to provide a random vector (IV) with the system images IVT, ST_DCD, DCD and AppBL. The HSE service that computes GMAC over these system images also returns a random vector. All this requires a new IVT tool that can support insertion of these random vector with different system images. The updated IVT Tool will be available as part of S32DS 3.5 Update 1. In case a different tool is being used, the user must adapt the tool to these changes.

Reuse of existing evaluation boards for S32G3 Rev 1.1

There is no impact to the use of the S32G-VNP-EVB3 with S32G3 Rev 1.1 Silicon. You can simply remove the older version of silicon from the EVB socket and replace with the new version.
A new version of the RDB3 will be released (S32G-VNP-RDB3 Rev F) with the S32G3 Rev 1.1 part mounted on the board.

References

1. S32G3 Reference Manual
2. S32G3 Data Sheet
3. S32G3 Hardware Design Guide
4. Mask Set Errata for Mask 0P72B
5. Mask Set Errata for Mask 1P72B

Legal information

Definitions
Draft — A draft status on a document indicates that the content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included in a draft version of a document and shall have no liability for the consequences of use of such information.
Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including – without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.
Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer.
Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities.
Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer.
In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages.
Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose.
Translations — A non-English (translated) version of a document, including the legal information in that document, is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
Security — Customer understands that all NXP products may be subject to unidentified vulnerabilities or may support established security standards or specifications with known limitations. Customer is responsible for the design and operation of its applications and products throughout their life cycles to reduce the effect of these vulnerabilities on customer’s applications and products. Customer’s responsibility also extends to other open and/or proprietary technologies supported by NXP products for use in customer’s applications. NXP accepts no liability for any vulnerability. Customer should regularly check security updates from NXP and follow up appropriately.
Customer shall select products with security features that best meet rules, regulations, and standards of the intended application and make the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, and security related requirements concerning its products, regardless of any information or support that may be provided by NXP.
NXP has a Product Security Incident Response Team (PSIRT) (reachable at [email protected]) that manages the investigation, reporting, and solution release to security vulnerabilities of NXP products.
Suitability for use in automotive and/or industrial applications — This NXP product has been qualified for use in automotive and/or industrial applications. It has been developed in accordance with ISO 26262 respectively IEC 61508, and has been ASIL- respectively SIL-classified accordingly. If this product is used by customer in the development of, or for incorporation into, products or services (a) used in safety critical applications or (b) in which failure could lead to death, personal injury, or severe physical or environmental damage (such products and services hereinafter referred to as “Critical Applications”), then customer makes the ultimate design decisions regarding its products and is solely responsible for compliance with all legal, regulatory, safety, and security related requirements concerning its products, regardless of any information or support that may be provided by NXP. As such, customer assumes all risk related to use of any products in Critical Applications and NXP and its suppliers shall not be liable for any such use by customer. Accordingly, customer will indemnify and hold NXP harmless from any claims, liabilities, damages and associated costs and expenses (including attorneys’ fees) that NXP may incur related to customer’s incorporation of any product in a Critical Application.

Trademarks

Notice: All referenced brands, product names, service names, and trademarks are the property of their respective owners.
NXP — word mark and logo are trademarks of NXP B.V.
AMBA, Arm, Arm7, Arm7TDMI, Arm9, Arm11, Artisan, big.LITTLE, Cordio, Core Link, Core Sight, Cortex, Design Start, DynamIQ, Jazelle, Keil, Mali, Mbed, Mbed Enabled, NEON, POP, Real View, Secur Core, Socrates, Thumb, Trust Zone, ULINK, ULINK2, ULINK-ME, ULINK-PLUS, ULINKpro, μVision,
Versatile — are trademarks or registered trademarks of Arm Limited (or its subsidiaries) in the US and/or elsewhere. The related technology may be protected by any or all of patents, copyrights, designs and trade secrets. All rights reserved.

Airfast — is a trademark of NXP B.V.
Altivec — is a trademark of NXP B.V.
CodeWarrior — is a trademark of NXP B.V.
ColdFire — is a trademark of NXP B.V.
ColdFire+ — is a trademark of NXP B.V.
CoolFlux — is a trademark of NXP B.V.
CoolFlux DSP — is a trademark of NXP B.V.
DESFire — is a trademark of NXP B.V.
EdgeLock — is a trademark of NXP B.V.
EdgeScale — is a trademark of NXP B.V.
EdgeVerse — is a trademark of NXP B.V.
elQ — is a trademark of NXP B.V.
Embrace — is a trademark of NXP B.V.
Freescale — is a trademark of NXP B.V.
GreenChip — is a trademark of NXP B.V.
HITAG — is a trademark of NXP B.V.| ICODE and I-CODE — are trademarks of NXP B.V.
Immersiv3D — is a trademark of NXP B.V.
I2C-bus — logo is a trademark of NXP B.V.
JCOP — is a trademark of NXP B.V.
Kinetis — is a trademark of NXP B.V.
Layerscape — is a trademark of NXP B.V.
MagniV — is a trademark of NXP B.V.
Mantis — is a trademark of NXP B.V.
MCCI — is a trademark of NXP B.V.
MIFARE — is a trademark of NXP B.V.
MIFARE Classic — is a trademark of NXP B.V.
MIFARE FleX — is a trademark of NXP B.V.
MIFARE4Mobile — is a trademark of NXP B.V.
MIFARE Plus — is a trademark of NXP B.V.
MIFARE Ultralight — is a trademark of NXP B.V.
---|---
MiGLO — is a trademark of NXP B.V.
MOBILEGT — is a trademark of NXP B.V.
NTAG — is a trademark of NXP B.V.
NXP SECURE CONNECTIONS FOR A SMARTER WORLD — is a trademark of NXP B.V.
PEG — is a trademark of NXP B.V.
Plus X — is a trademark of NXP B.V.
POR — is a trademark of NXP B.V.
PowerQUICC — is a trademark of NXP B.V.
Processor Expert — is a trademark of NXP B.V.
QorIQ — is a trademark of NXP B.V.
QorIQ Qonverge — is a trademark of NXP B.V.
SafeAssure — is a trademark of NXP B.V.| SafeAssure — logo is a trademark of NXP B.V.
SmartLX — is a trademark of NXP B.V.
SmartMX — is a trademark of NXP B.V.
StarCore — is a trademark of NXP B.V.
Symphony — is a trademark of NXP B.V.
Synopsys & Designware — are registered trademarks of Synopsys, Inc.
Synopsys — Portions Copyright
© 2021 Synopsys, Inc. Used with permission.
All rights reserved.
Tower — is a trademark of NXP B.V.
TriMedia — is a trademark of NXP B.V.
UCODE — is a trademark of NXP B.V.
VortiQa — is a trademark of NXP B.V.
Vybrid — is a trademark of NXP B.V.

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.
© NXP B.V. 2023.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
All rights reserved.
Date of release: 03/2023
Document identifier: EB00931
Document Number: EB00931
Rev. 1 , 03/2023

Read User Manual Online (PDF format)

Download This Manual (PDF format)

Download this manual  >>