ANALOG DEVICES ADRF5049-EVALZ Evaluation Board Photograph User Guide

ANALOG DEVICES ADRF5049-EVALZ Evaluation Board Photograph

User Guide | EVAL-ADRF5049 UG-2091
Evaluating the ADRF5049, Silicon SP4T Switch, Nonreflective, 9 kHz to 45 GHz

FEATURES

• Full featured evaluation board for the ADRF5049
• Simple connection to test equipment
• Thru line for calibration

EQUIPMENT NEEDED

• DC power supplies
• Network analyzer

GENERAL DESCRIPTION

The ADRF5049 is a SP4T, nonreflective switch manufactured in the silicon process.
This user guide describes the ADRF5049-EVALZ evaluation board, which was designed to simply evaluate the features and perform-ance of the ADRF5049. A photograph of the evaluation board is shown in Figure 1.
Note that the ADRF5049 IC is populated on the ADRF5042 bare evaluation board; however, the whole assembly is the ADRF5049-EVALZ.
The ADRF5049 data sheet provides full specifications for the ADRF5049. Consult the ADRF5049 data sheet in conjunction with this user guide when using the ADRF5049-EVALZ.

ADRF5049-EVALZ EVALUATION BOARD PHOTOGRAPH

EVALUATION BOARD HARDWARE

OVERVIEW
The ADRF5049-EVALZ is a connectorized board, assembled with the ADRF5049 and its application circuitry. All components are placed on the primary side of ADRF5049-EVALZ. An assembly drawing for the ADRF5049-EVALZ is shown in Figure 9, and an evaluation board schematic is shown in Figure 8.

BOARD LAYOUT
The ADRF5049-EVALZ was designed using RF circuit design tech-niques on a 4-layer printed circuit board (PCB). The PCB stack-up is shown in Figure 2.

• The outer copper layers are 1.5 oz (2.2 mil) thick and the inner layers are 0.5 oz (0.7 mil) thick.
• The top dielectric material is 8 mil Rogers 4003, which provides 50 Ω controlled impedance and optimizes the high frequency performance. All RF traces are routed on the top layer, and the second layer is used as the ground plane for RF transmission lines. The remaining two layers are also ground planes filled with
• FR4 material to manage the thermal rise during high power operations and are supported with dense and filled vias to the PCB bottom for thermal relief. The overall board thickness is approximately 62 mil for mechanical strength.
• The RF transmission lines are designed using a coplanar wave-guide (CPWG) model with a width of 14 mil and ground spacing of 7 mil to have a characteristic impedance of 50 Ω. Ground via fences are arranged on both sides of a CPWG to improve isolation between nearby RF lines and other signal lines.
• The exposed ground pad of the ADRF5049, which is soldered on the PCB ground pad, is the main thermal conduit for heat dissipation. The PCB ground pad is densely populated with filled, through vias to provide the lowest possible thermal resistance path from the top to the bottom of the PCB. The connections from the package ground leads to ground are kept as short as possible.

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POWER SUPPLY AND CONTROL INPUTS

• The ADRF5049-EVALZ has two power supply inputs, four control inputs, and a ground, as shown in Table 1. The dc test points are populated on VDD, VSS, V1, V2, EN, LS, and GND. A 3.3 V supply is connected to the DC test point on VDD and a −3.3 V supply is connected to the DC test point on VSS. Ground reference can be connected to GND. Connect the control inputs, V1, V2, EN, and LS, to 3.3 V or 0 V. The typical total current consumption for the ADRF5049 is 0.67 mA.
• The VDD and VSS supply pins of the ADRF5049 are decoupled with 100 pF capacitors.

RF INPUTS AND OUTPUTS
The ADRF5049-EVALZ has seven edge-mounted, 2.92 mm con-nectors for the RF inputs and outputs, as shown in Table 2.
The through calibration line, connecting the THRU1 and THRU2 RF connectors, calibrates out the board loss effects from the measurements of the ADRF5049-EVALZ to determine the device performance at the pins of the IC.

TEST PROCEDURE

BIASING SEQUENCE
To bias up the ADRF5049-EVALZ, perform the following steps:

1. Ground the GND test point.
2. Bias up the VDD test point.
3. Bias up the VSS test point
4. Bias up the V1, V2, EN, and LS test points.
5. Apply an RF input signal.

The ADRF5049-EVALZ is shipped fully assembled and tested. Figure 3 provides a basic test setup diagram to evaluate the
s-parameters using a network analyzer. Perform the following steps to complete the test setup and to verify the operation of the ADRF5049-EVALZ:

1. Connect the GND test point to the ground terminal of the power supply.

2. Connect the VDD test point to the voltage output terminal of the
   + 3.3 V supply. Note that the current must be 0.15 mA.

3. Connect the VSS test point to the voltage output terminal of the
   − 3.3 V supply. Note that the current must be 0.52 mA.

4. Connect the V1, V2, EN, and LS test points to the voltage output terminal of the 3.3 V supply. The ADRF5049 can be configured in different modes by connecting the control test points to 3.3 V or 0 V, as shown in Table 3.

5. Connect a calibrated network analyzer to the RFC, RF1, RF2, RF3, and RF4 2.92 mm connectors. If network analyzer port count is not enough, terminate unused RF ports with 50 Ω. Sweep the frequency from 10 MHz to 45 GHz and set the power to –5 dBm.

6. The ADRF5049-EVALZ is expected to have an insertion loss of 2.2 dB at 40 GHz. See the expected results in Figure 4.

Additional test equipment is needed to fully evaluate the ADRF5049-EVALZ functions and performance.

• For third-order intercept point evaluation, use two signal generators and a spectrum analyzer. A high isolation power combiner is also recommended.
• For power compression and power handling evaluations, use a 2-channel power meter and a signal generator. A high enough power amplifier is also recommended at the input. Test accessories, such as couplers and attenuators, must have enough power handling.
• The ADRF5049-EVALZ comes with a support plate attached to the bottom side. To ensure maximum heat dissipation and to reduce thermal rise on the ADRF5049-EVALZ during high power evaluations, this support plate must be attached to a heat sink using thermal grease.
• Note that the measurements performed at the 2.92 mm connectors of the ADRF5049-EVALZ include the losses of the 2.92 mm con-nectors and the PCB.
• The thru line must be measured to calibrate out the effects on the ADRF5049-EVALZ. The thru line is the summation of an RF input line and an RF output line that are connected to the ADRF5049-EVALZ and equal in length.

EXPECTED RESULTS

EVALUATION BOARD SCHEMATIC AND ARTWORK

ORDERING INFORMATION

BILL OF MATERIALS

ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.

Legal Terms and Conditions

By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
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