DIODES AP3302A Regulation Controllers and Switchers User Guide

DIODES AP3302A Regulation Controllers and Switchers

Product Information

Specifications

• Product Name: QC4/4+ 27W Class A Charger EV1 Board
• Release: 1.2
• Key Components: AP3302A, APR345, WT6615F
• Compatibility: QC3.0, QC2.0, USB PD3.0, PPS
• Efficiency Standards: DOE6, CoC Tier 2

Product Usage Instructions

Chapter 1: Summary

General Description
The QC4/4+ 27W Class A Charger EV1 Board is designed for efficient charging with advanced features.

Key Features

• SSR Topology Implementation with Opto-coupler for Accurate Step Voltage Controlling.
• QC4+ Offers QC3.0/QC2.0 Backward Compliance.
• Supports USB PD3.0 Function and PPS (3V-11V@20mV).
• Meets DOE6 and CoC Tier 2 Efficiency Requirements.

Chapter 2: Power Supply Specification
Details about the power supply specifications and test results are provided in this section.

Chapter 3: Schematic
This section provides the schematic details of the EV1 Board for reference.

Chapter 4: The Evaluation Board (EVB) Connections
Instructions on connecting and setting up the EVB for use.

Chapter 5: Testing the Evaluation Board
Guidelines on testing the EVB for input and output characteristics along with efficiency measurements.

FAQ (Frequently Asked Questions)

• Q: What are the main features of the QC4/4+ 27W Class A Charger EV1 Board?
  A: The main features include SSR Topology Implementation, QC3.0/QC2.0 Backward Compliance, USB PD3.0 Support, and PPS Compatibility.

• Q: What standards does the charger meet?
  A: The charger meets DOE6 and CoC Tier 2 Efficiency Requirements.

Chapter 1. Summary

General Description
The 27W QC4/4+ Class A charger Evaluation Board EV1 is composed of three main parts, AP3302A offers the QR PWM switching control & working under the DCM mode with peak current controlling, APR345 is a Synchronous Rectification Controller, and the WT6615F is USB PD and Qualcomm Quick Charge 4/4+ Controller for implementing quick charger decoder functions. Based on monitoring D+ & D- and CC1 & CC2 signals, WT6615F will interprets desired voltage and current setting, and then feedback information to primary side AP3302A controller for providing well regulated voltage and current as well as related power protections.

key Features
System Key Features

• SSR Topology Implementation with an Opto-coupler for Accurate Step Voltage Controlling
• QC4+ Offers QC3.0/QC2.0 Backward Compliance
• Supports the USB PD3.0 Function and PPS (3V-11V@20mV)
• Meet DOE6 and CoC Tier 2 Efficiency Requirements
• <75mW No-Load Standby Power

AP3302A Key Features

• Quasi-Resonant Operation with Valley Lock under all Lines and Load Conditions
• Switching Frequency: 22kHz-120kHz
• Non-audible-noise QR Controlling
• Soft Start Process during the Start-up Turn-on Moment
• During the burst mode operation and Low start-up operating quiescent currents, 75mW standby power can be achieved
• Built-in Jittering Frequency Function which is the EMI emission can be improved
• Internal Auto Recovery OCP, OVP, OLP, OTP Power Protection, cycle by cycle current limit, also with DC polarity & transformer short and Brown out Protection

APR345 Key Features

• Synchronous Rectification Working at DCM, CCM and QR Flyback
• Eliminate Resonant Ringing Interference
• Fewest External Components used

WT6615F Key Feature

• Type-C Source
• USB PD 3.0 v1.1 (PPS)
• BC1.2 DCP
• Qualcomm Quick Charge 4/4+
• Built in Shunt Regulator for Constant Voltage and Constant Current
• Programmable OVP/UVP/OCP/OTP
• Internal Discharge MOS
• Internal Vbus Load Switch Driver
• 3V- 30V Operation Voltage without External Regulator

Applications

• QC4/4+ Wall Chargers

Main Power Specifications (CV & CC Mode)

PPS Mode 3V-11V, 20mV/step, 50mA/step
**Per Step Voltage| Continuous  Mode  200mV,     3.6V- 12V
PPS 20mV, 3V-11V
Efficiency| 89%
Total           Output Power| 27W
Protections| OCP, OVP, UVP, OLP, OTP
XYZ Dimension| 40 x 40 x 25mm
ROHS Compliance**| Yes

Evaluation Board Picture

Chapter 2. Power Supply Specification

Specification and Test Results

Parameter| Test conditions| Min| Nom| Max| Eff / DoE VI| Eff / Tier2| Test Summary
---|---|---|---|---|---|---|---
VACIN Input Voltage| –| 90 VRMS| 115/230| 264 VRMS| –| –| –
FLINE Frequency| –| 47Hz| 50/60| 64Hz| –| –| –
IIN Input Current| –| –| –| 1.5 ARMS| –| –| Pass

No load Pin

| At 230Vac /50Hz, @ 5V, Pin < 75mW| ****

–

| ****

–

| ****

75mW

| ****

–

| ****

–

| Pass, the test result is 58mW
3V/ 3A

@115Vac/230Vac Average efficiency

| ****

Board end

| ****

–

| ****

3V / 3A

| ****

–

| ****

77.87%

| ****

81.34%

| Pass, average efficiency is 83.6%
5V/ 3A

@115Vac/230Vac Average efficiency

| ****

Board end

| ****

–

| ****

5V/3A

| ****

–

| ****

81.39%

| ****

81.84%

| Pass, average efficiency is 87%
5V/ 3A

@115Vac/230Vac 10% efficiency

| ****

Board end

| ****

–

| ****

5V/0.3A

| ****

–

| ****

–

| ****

72.48%

| Pass, efficiency is 78.5%
9V/ 3A

@115Vac/230Vac Average efficiency

| ****

Board end

| ****

–

| ****

9V/3A

| ****

–

| ****

86.60%

| ****

87.30%

| Pass, average efficiency is 89.32%
9V/ 3A

@115Vac/230Vac 10% efficiency

| ****

Board end

| ****

–

| ****

9V/0.3A

| ****

–

| ****

–

| ****

76.62%

| Pass, efficiency is 80.6%
12V/ 2.25A

@115Vac/230Vac Average efficiency

| ****

Board end

| ****

–

| ****

12V/2.25A

| ****

–

| ****

86.20%

| ****

87.30%

| Pass, average efficiency is 88.89%

Compliance

Parameter| Test conditions| Min| Nom| Max| Test Summary
---|---|---|---|---|---
Standby Power (mW)| 5V Output| –| –| 75mW| Pass
Output Voltage Tolerance| 3V/0-3A| | 3V| | Pass
Output Voltage Tolerance| 5V/0-3A| 4.75V| 5V| 5.25V| Pass
Output Voltage

Tolerance

| 9V/0-3A| 8.55V| 9V| 9.45V| Pass
Output Voltage Tolerance| 12V/0-2.25A| 11.4V| 12V| 12.6V| Pass
Output Connector| USB Type C| –| –| –|
Temperature| 90Vac , 9V / 3A| –| –| –| Pass
Dimensions (W /D/ H)| 40mm x 40mm x 25mm| –| –| –| –
Safety| IEC/EN/UL 60950

Standard

| –| –| –| –
EMI/EMC| FCC/EN55022 Class B| –| –| –|

Chapter 3. Schematic

EV1 Board Schematic

Bill of Material (BOM)

Designator| Comment| Designator| Comment| Designator| Comment
---|---|---|---|---|---
BD1| MSB30KH| C33| 1µF/50V| R14| 5 mΩ 1206
C1, C2| 15µF/400V| CN1| TYPE C RECEPTACLE| R14A| 51Ω    1206
C3| 10nF/630V| CY1| 470pF Y1| R17| 4.7kΩ
C4| 100pF/50V| D1| GS1M| R18, R36| 10Ω
C5, C13| 2.2nF/250V| D2, D5| S07M| “R20”| 15kΩ
C6, C7| 2.2µF/100V| D3, D4, D6| 1N4148WS| R21| 2.7kΩ
C8| 680µF/16V| F1| T2AL/250VAC| R22| 47kΩ
C9, C11, C12| 4.7µF/50V| L2| 220µH| R24| 0kΩ
C10| 22µF/400V| LF1| 10mH| R25| 200kΩ
“C15”| 68nF/50V| NTC1, NTC2| 10kΩ NTC| |
C16| 10nF/50V| Q1| DMJ65H650SCT, TO220| R27, R31| 22Ω
C17| 1nF/200v| Q2| DMTH10H010SCT| R29, R30| 0.82Ω 1206
C18| 1µF/25V| Q3| DMN24H3D| R32| 49.9kΩ
C19,| 6.8nf/50V| Q4, Q5| DMP2007UFG| R33, R34| 5Ω
C21, C23| 100nF/50v| R1| 1kΩ| R38| 10Ω
C20| 470pF/50V| R2| 20kΩ| R39| 110KΩ
C22| 22nF/50v| R3, R4| 100kΩ| T1| TRANS-RM8
C24, C26| 10pF/50V| R5| 100kΩ| TVS1, TVS2，TVS3, TVS4| DESD5V0S1BA
C25, C27| 560pF/50V| R8, R12| 2Ω| U1| WT6615F–QFN16
C28| 47nF/50v| R9, R15| 51Ω 0603| U2| EL1019
C29| 220pF/50V| R10| 100kΩ| U3| AP3302A
C30| 1nF/50V| R11| 680Ω| U4| APR345
C31| 100nF/16V| R26| 1kΩ| ZD1 BZT52C20T| 20V Zener
C32| 10µF/10V| R13, R16| 1.8MΩ| –| –

NOTE:
For optimization of WT6615F QC4/4+ decoder performance, please adjust component values as below (different from component values used in the Section 3.2 System BOM above):

1. Minimize total resistance from D+/D- path to WT6615F: Change R33 and R34 from 51Ω to 5Ω
2. Improve discharge time of WT6615F: Change R1 from 10kΩ to 1kΩ

Schematics Description

AC Input Circuit & Differential Filter
There are three components in the section. The Fuse F1 protects against over- current conditions which occur when some main components failed. The LF1 is a common mode chock for the common mode noise suppression filleting because of the each coil with large impedance. The BD1 is rectifier, and basically converts alternating current & voltage into direct current & voltage. The C1, L2, C2, C3 & C10 are composted of the Pi filter for filtering the differential switching noise back to AC source.

AP3302A PWM Controller
The AP3302A PWM controller U1 and Opto-Coupler U2 and Q1 are the power converting core components. Connected to filtered output after bridge circuit, R13 & R16 resistor path will provide start-up voltage and current during starting up through Vcc (Pin 5). Subsequent VCC power will be provided by voltage feedback from middle-tapped auxiliary winding through two options, R12-D5 and R8-D2-Q3-D3, depending on desired output voltage. This design is to accommodate with the required wide voltage range to support various protocols (including QC 4/USB PD Programmable Power Supply PPS), from 3V to 12V.
Based on feedback of secondary side (Pin CATH of WT6615 Decoder) to primary side (FB pin of AP3302A) through Opto-coupler U2, AP3302A will switch ON and Off Q1 to regulate desired voltage and current on the secondary side.

APR345 Synchronous Rectification (SR) MOSFET Driver
APR345 operates in DCM mode in this design and drives the Q2 MOSFET based on the secondary side transformer on/off ‘s duty cycle. As the power loss with the APR345-controlled MOSFET Q2 is less than that with Schottky Diodes, the total efficiency can be improved.

WT6615F QC4/4+ Decoder & Protection on /off P MOSFET and Interface to Power Devices
The few sets of important pins provide critical protocol decoding and regulation functions in WT6615F:

1. CC1 & CC2 (Pin 6, 7): CC1 & CC2 (Configuration Channel 1 & 2) are defined by USB PD spec to provide the channel communication link between power source and sink devices.
2. D+ & D- (Pin 4, 5): While defined under USB PD for data transfer only, D+ and D- are used in QC4+ to provide voltage information and backward compatibility with QC2.0 and QC3.0 devices.
3. Constant Voltage (CV): The CV is implemented by sensing VCC (pin 15) via resistor divider and comparing with internal reference voltage to generate a CV compensation signal on the CATH pin (pin 14). The output voltages can be adjusted by firmware programming.
4. Constant Current (CC): The CC is implemented by sensing current sense resistor (R14, 5mΩ) and current sense amplifier, then comparing with internal programmable reference voltage to generate a compensation signal on CATH pin (pin 14)
5. Loop Compensation: C16, R21 & C20 form the voltage loop compensation circuit, and C15, R20 & C19 form the current  loop compensation circuit.
6. CATH (Pin 14): It is a key interface link from the secondary decoder (WT6615F) to the main regulator circuit (AP3302A). This pin is connected to the Opto-Coupler U2A cathode to feedback all sensed voltage and current for getting desired voltage and current set by CC1, CC2, D+, and D- signals.
7. GATE Driver (Pin 2) to PMOSFET Gate: The pin is used to turn on/off Vbus load switch (Q4 & Q5) to enable/disable voltage output to the Vbus. Two back to back PMOSFETs (Q4 & Q5) are required to prevent reverse current from the attached battery source.

Chapter 4. The Evaluation Board (EVB) Connections

EVB PCB Layout
The thickness for both sides of PCB board trace cooper is 2 Oz.

Quick Start Guide Before Connection

1. Before starting the QC4/4+ 27W EVB test, the end user needs to prepare the following tool, software and manuals. For details, please contact Weltrend Semiconductor local agent for further information.
   • Test Kit: WPD016 (Weltrend’s Qualcomm Quick Charge 4/4+ Test Kit)
   • Software: GUI v1.09 (file name: QC4_v1.09)
   • Software: Driver (folder name: libusb-driver)
   • Manual: USBPW_DOC26_WPD016_User_Guide_V1.0
   • Manual: USBPW_DOC28_WPD016_Driver Installation Guide_V1.0
2. Prepare a certified three-foot Type-C cable and a Standard-A to Micro-B Cable.
3. Connect the input AC L & N wires to AC power supply output “L and N “wires.
4. Ensure that the AC source is switched OFF or disconnected before the connection steps.
5. A type-C cable for the connection between EVB’s and WPD016’s Type-C receptacles.
6. Use 2 banana jack cables, one port of the cables are connected to E-load + & – terminals while the other port of the cables are connected to WPD016’s VBUS & GND holes.
7. A Standard-A to Micro-B cable to be connected to the WPD016’s Micro-B receptacle & PC Standard-A receptacle respectively.

System Setup

Connection with E-Load

WPD016 – Weltrend’s Qualcomm Quick Charge 4/4+ Test Kit

For details, please contact Weltrend Semiconductor local agent for WPD016 User Guide.

Input & Output Wires Connection

Chapter 5. Testing the Evaluation Board

Input & Output Characteristics
Input Standby Power

Input Power Efficiency at Different AC Line Input Voltage

Average Efficiency at Different Loading

Output CV & CC Mode Testing

QC Series Compatible Mode Testing

Mode Testing

QC 3.0 Continuous Mode 200mV/Step Testing

QC4/4+ CV Accuracy 20mV/Step Testing (PPS Support)

QC4/4+ CC Accuracy 50mA/Step Testing (PPS Support)

Key Performance Waveforms
AC Input Requirements
AC Brownout on/off

AC Line Slow Transients (Sag/Surge)

27W QC4/4+ System Start-up Time & Hold-up Time

Q1 /Q2 Main Switching Voltage MOSFET Stress on at 12V/ 2.25A Loading

System Output Ripple & Noise with @ 1.2m Cable End

Output Voltage Transition Time

Thermal Testing
Test Condition: Vin=90V Vo=9V Io=3A Open Frame

EMI (CE) Testing

Revision History

**Revisions| Change Item #| ****Reason for Changes| ****Items Changed**
---|---|---|---
Rev 1.0 (June

30, 2017) to

Rev1.1 (Oct 1,

| #1| Extended low operating voltage range down to 3V (PPS 3V-5.99V & 3V~11V requirement)| AP3302A (instead of AP3302) R32=49.9K (instead 56K)
**** Rev 1.0 (June

30, 2017) to

Rev1.1 (Oct 1,

| #2| Improved the voltage transition time to meet QC4 requirements (< 25mS)| Tune component values associated with CV and CC loop compensation filters

(C15=68nf, C16=10nf, C19=6.8nf, C20=470pf

R11=680Ω, R20=15K, R21=2.7K, R24=0Ω, ZD1=20Vz)

**** Rev 1.0 (June

30, 2017) to

Rev1.1 (Oct 1,

| **** #3| Improved Total resistance from D+/D- path to WT6615F

To Imrpve discharge time of WT6615F

| Change R33 and R34 from 51Ω to 5Ω Change R1 from 10kΩ to 1kΩ Change R39 from 51Ω to 110K
Rev 1.1 (Oct 1,

2017. to Rev1.2

(Dec 20, 2017)

| #4| Corrected typing mistake| **** DML60H650SCT to DMJ65H650SCT
Rev 1.1 (Oct 1,

2017. to Rev1.2

(Dec 20, 2017)

| #5| Corrected Pin 7 PCB layout mistake| Updated the main PCB layout with the two slits & the daughter cut board with two insert stands

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