ON Semiconductor AR0130CS Evaluation Board User Manual
- July 3, 2024
- ON Semiconductor
Table of Contents
AR0130CSSM00SPCAH-GEVB
AR0130CS Evaluation Board
User’s Manual
Evaluation Board Overview
The evaluation boards are designed to demonstrate the features of image sensors products from ON Semiconductor. This headboard is intended to plug directly into the Demo 2X system. Test points and jumpers on the board provide access to the clock, I/Os, and other miscellaneous signals.
Features
-
Clock Input
♦ Default – 27 MHz Crystal Oscillator
♦ Optional Demo 2X Controlled MClk -
Two Wire Serial Interface
♦ Selectable Base Address -
Parallel Interface
-
ROHS Compliant
www.onsemi.com
EVAL BOARD USER’S MANUAL Figure 1. AR0130CS Evaluation Board
Block Diagram
Figure 2. Block Diagram of AR0130CSSM00SPCAH−GEVB
AR0130CSSM00SPCAH−GEVB
Top View
Figure 3. Top View of the Board − Default Jumpers
Bottom View
Figure 4. Bottom View of the Board − Connectors
AR0130CSSM00SPCAH−GEVB
Jumper Pin Locations
The jumpers on headboards start with Pin 1 on the leftmost side of the pin. Grouped jumpers increase in pin size with each jumper added.
Figure 5. Pin Locations for a Single Jumper. Pin 1 is Located at the Leftmost Side and Increases as it Moves to the Right
Figure 6. Pin Locations and Assignments of Grouped Jumpers.
Pin 1 is Located at the Top-Left Corner and Increases in a Zigzag Fashion
Shown in the Picture
Jumper/Header Functions & Default Positions
Table 1. JUMPERS AND HEADERS
| Jumper/Header No. | Jumper/Header Name | Pins | Description |
|---|---|---|---|
| P1 | VPP | Open (Default) | For Connection to +VPP Power Supply |
| P2 | ATEST | Open (Default) | For Testing |
| P3 | SADDR | 2−3 | I2C Address Set to 0x30 |
| 1−2 | I2C Address Set to 0x20 | ||
| P4 | TEST | Closed (Default) | Normal Operation |
| Open | Test Mode | ||
| P5 | Shutter/Trigger | Open | For Connection to External Shutter/Trigger |
| P6 | STANDBY | 2−3 (Default) | Normal Operation |
| 1−2 | Standby Mode | ||
| P7 | FLASH | Open (Default) | For Connection to External Flash |
| P8 | O_EN | 1−2 (Default) | Normal Operation |
| 2−3 | Parallel Data Output Disabled | ||
| P9 | VDDIO | 1−2 (Default) | 1.8 V Operation of Sensor |
| 2−3 | 2.8 V Operation of Sensor | ||
| P10 | Clock Select | 1−3 (Default) | Internal Clock |
| 3−5 | Demo 2X Clock | ||
| 3−4 | External Clock | ||
| P11 | Master Clock | 1−2, 3−4 (Default) | Demo 2X IIC |
| 2−3 | External IIC | ||
| P12 | EEPROM Addr. Sel | 3−4 Open & 1−2 Closed (Default) | EEPROM Address Set to |
0xA8
3−4 Open & 1−2 Closed| EEPROM Address Set to 0xAC
3−4 Open & 1−2 Closed| EEPROM Address Set to 0xA4
3−4 Open & 1−2 Closed| EEPROM Address Set to 0xA0
Interfacing to ON Semiconductor Demo 2X Baseboard
The ON Semiconductor Demo 2X baseboard has a similar 26-pin connector and
13-pin connector which mate with J3 and J4 of the headboard. The four mounting
holes secure the baseboard and the headboard with spacers and screws.
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ADDITIONAL INFORMATION
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