UM3247 Industrial Digital Output Expansion Board User Manual
- June 28, 2024
- ST
Table of Contents
UM3247 Industrial Digital Output Expansion Board User Manual
Introduction
The X-NUCLEO-OUT17A1 is an industrial digital output expansion board for STM32 Nucleo. It provides a powerful and flexible environment for the evaluation of the driving and diagnostic capabilities of the IPS8200HQ-1 octal high-side, smart power, solidstate relay in a digital output module connected to 1.0 A industrial loads.
The X-NUCLEO-OUT17A1 interfaces with the microcontroller on the STM32 Nucleo via STISO620 and STISO621 and Arduino® UNO R3 connectors.
The user can select which driving mode controls the IPS8200HQ-1: parallel
(SEL2 = L by JP21 = open) or SPI (SEL2 = H by JP21 = closed).
In the case of SPI selection, the user can select the communication protocol
between 8 bits (SEL1 = L by JP22 = open) or 16 bits (SEL1 = H by JP22 =
closed).
The VCC supply pin of the IPS8200HQ-1 is provided by the connector CN1, while the loads (driven by the eight output channels of the IPS8200HQ-1) can be connected between the connectors CN2, CN3, CN4, CN12, and the pin 2 of the connector CN1.
The on-board digital isolators (STISO620 and STISO621) feature the 2.8k VRMS (4k VPK) galvanic isolation between the two application sides: logic and process sides.
The logic side is the application side of the MCU and it is supplied by the VISO_L rail (3.3 or 5.0 V). VISO_L can be supplied by an external power supply connected to CN13 or, alternatively by the pin 4 (SW1 = close 1-2) or pin 5 (SW1 = close 2-3) of CN6.
The process side is the application side of the industrial loads and it is
supplied by the VCC and VISO_P rails. The VISO_P (3.3 or 5.0 V) is usually
supplied by the VREG rail (JP31 = closed) that can be generated by the step-
down embedded in the IPS8200HQ-1 (SW17 = close 1-2, JP20 = closed, JP15 =
closed and JP28 = close 2-4 (VREG = 3.3 V) or JP28 = 1-3 (VREG = 5.0 V)).
Alternatively, VREG can be provided by an external power supply connected to
CN14 (SW17 = close 2-3, JP20 = open, JP15 = open).
In parallel driving mode (active with the default jumper and switch settings)
the application board can work even without any Nucleo board: in this case,
the user must provide the process side voltage (usually 24 V) by the CN1 and
the VISO_L (usually 3.3 V) by the CN13. The INX signals, available on CN5[1,
2, 3], CN8[4] and CN9[3, 5, 7, 8], drives on/off the correspondent OUTX
connected to the loads on the process side.
The INX pins can be driven low/high swinging between 0V and VISO_L. The
activation of each OUTX (OUT1… OUT8) can be monitored by the green LEDs DOX
(DO1… DO8).
The activation of the three diagnostic pins (TWARN, PGOOD, FAULT) can be visualized on the correspondent red LEDs (D11, D12, D13, respectively) or monitored by an oscilloscope on TP6, TP7, and TP5.
Note: Although the pins CN8[5], CN5[9], CN5[10] are connected to the nets FAULT_L, PGOOD_L and TWARN_L, these pins cannot correctly report the status of the corresponding signals on the process side (FAULT, PGOOD, and TWARN) due to routing mistake on the same side.
The SPI driving mode can be set by changing the default configuration (JP21 = close; SW4, SW5, SW6, SW7, SW9, SW10, SW11, SW12, SW13, SW14, SW15, and SW20 = close 2-3, SW18 = close 1-2). The SPI-8bits is the default mode (JP22 = open), while the SPI-16bits mode can be activated by JP22 = close.
In SPI driving mode it is also possible to activate the MCU freeze detection
feature by setting SW3 = close 2-3.
The expansion board can be connected to either a NUCLEO-F401RE or a NUCLEO-
G431RB development board. In this case the companion firmware X-CUBE-IPS
detects the selected configuration (GPIO, SPI-8bits, SPI-16bits) by reading
the signals SEL2_L and SEL1 from CN8[1] and CN8[6]. The activation of the MCU
freeze feature is detected by WDEN(in) on CN9[4].
It is also possible to evaluate a system composed of a X-NUCLEO-OUT17A1 stacked on other expansion boards. In fact, SPI driving mode allows the daisy- chaining communication with another X-NUCLEO-OUT17A1 stacked through the Arduino connectors: the two stacked boards must be configured with SW6, SW18 = close 2-3 on one board, and SW6, SW18 = close 1-2 on the other board.
Figure 1. X-NUCLEO-OUT17A1 expansion board
1 Getting started
1.1 Overview
The X-NUCLEO-OUT17A1 embeds the IPS8200HQ-1 intelligent power switch (IPS),
which features serial/parallel selectable interface on-chip, 8-bit and 16-bit
SPI interface for IC command and control diagnostic, Power Good diagnostic, IC
warning temperature detection, overcurrent and overtemperature protection for
safe output loads control.
The board is designed to meet the application requirements for the galvanic isolation between the user and power interfaces.
An optical isolation satisfies this requirement. The isolation is implemented through three dual channel digital isolators with 2 – 0 channel directionality (U3, U11, U12) for the input signals forward to the device, and four dual channel digital isolators with 1 – 1 channel directionality (U4, U6, U7, U10) for the diagnostic feedback signals of the device and the daisy chaining service lines.
The expansion board features:
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Based on the IPS8200HQ-1 octal high-side switch, which features:
– Operating range 10.5 to 36 V
– Operating output current ≤ 1.0 A
– Low power dissipation (RON(MAX) = 200 mΩ)
– Undervoltage lock-out
– Selectable driving modes parallel or 5 MHz SPI (8 or 16 bits)
– Embedded step-down converter
– 4×2 LED matrix for efficient status indication
– MCU freeze detection
– Fast decay for inductive loads
– Overload and overtemperature protections
– Loss of ground protection
– Junction Overtemperature and parity check diagnostic pin (FAULT)
– Case overtemperature diagnostic pin (TWARN)
– Supply voltage Level diagnostic pin (PGOOD)
– QFN48L 8×6 mm package -
Application board voltage operating range: 12 to 33 V
-
Extended voltage operating range (J9 open) up to 36 V
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Operating current: up to 1.0 A per channel
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Blue LED showing SPI mode selection
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Yellow LED showing SPI mode 16-bits selection
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Red LED for FAULT diagnostic pin (JP12 closed)
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Red LED for PGOOD diagnostic pin (JP13 closed)
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Red LED for TWARN diagnostic pin (JP27 closed)
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4 kVPK galvanic isolation guaranteed by STISO620 and STISO621
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Supply rail reverse polarity protection
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Compatible with STM32 Nucleo development boards
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Equipped with Arduino® UNO R3 connectors
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RoHS and China RoHS compliant
-
CE certified
1.2 Board configuration
A set of jumpers and switches is available to configure the board. Table 1
shows the configurations to be used respectively for Parallel 8 Channels Mode,
SPI 8 Channels Mode and Daisy Chain Mode.
Table 1. X-NUCLEO-OUT17A1
1.3 Digital section
The digital section is associated with the STM32 interface and the digital
supply voltage to and from the XNUCLEO- OUT17A1 expansion board.
Figure 2. X-NUCLEO-OUT17A1 expansion board: digital interface section
The dotted green line indicates the whole digital interface section. The pink rectangles identify the Arduino® UNO R3 connectors and the yellow ones identify STISO620 and STISO621 digital isolators.
The four Arduino® UNO R3 connectors:
- allow the expansion board to communicate with the STM32 Nucleo development microcontroller board accessing the STM32 peripheral and GPIO resources;
- provide the digital supply voltage between the STM32 Nucleo development board and the X-NUCLEOOUT17A1 expansion board, in either direction.
The five digital isolators (STISO620 and STISO621) provide 4 kVPK galvanic
isolation between logic and process sides of the expansion board.
Usually, the STM32 Nucleo development board supplies the expansion board by a
3.3 V or 5.0 V generated by the USB.
Alternatively, it is possible to supply the STM32 Nucleo development board
from the expansion board. In this case, an external supply voltage (7-12 V)
should be connected to the CN11 connector (not mounted by default) on the
expansion board and the ground loop should be closed by mounting D2 (enabling
the reverse polarity protection) or by closing JP11 (without reverse
polarity).
To supply the VIN voltage rail, it is necessary to:
- close the JP5 jumper between pins 2 and 3 and open the JP1 jumper on the NUCLEO-F401RE;
- open the JP5 jumper between pins 1 and 2 and close the JP5 jumper between pins 3 and 4 on the NUCLEO-G431RB.
Logic side is then supplied by the VISO_L rail (3.3 V or 5.0 V). VISO_L can be supplied by an external power supply connected to CN13 (SW1 open) or, alternatively by the pin 4 (SW1 = close 1-2) or pin 5 (SW1 = close 2-3) of CN6.
The user can select which driving mode controls the IPS8200HQ-1: parallel (SEL2 = L by JP21 = open) or SPI (SEL2 = H by JP21 = closed). In the case of SPI selection, the user can select the communication protocol between 8 bits (SEL1 = L by JP22 = open) or 16 bits (SEL1 = H by JP22 = closed).
1.4 Power section
The power section involves the power supply voltage (CN1, pin 1 for VCC, pin 2
for GND), the load connection (eight loads can be connected between each pin
of CN2, CN3, CN4, and CN12 and pin 2 of CN1), EMC protections (U2), and supply
reverse polarity protection (D1).
Figure 3. X-NUCLEO-OUT17A1 expansion board: power section
- IPS8200HQ-1
- Output and power supply connector
- Output channels – green LEDs
- FAULT (diagnostic pin) red LED
- PGOOD (diagnostic pin) red LED
- TWARN (diagnostic pin) red LED
- SEL2 H (SPI) blue LED
- SEL1 H (16 bits SPI data width) yellow LED
The process side is supplied by the VCC and VISO_P rails. The VISO_P (3.3 or
5.0 V) is usually supplied by the VREG rail (JP31 = closed) that can be
generated by the step-down embedded in the IPS8200HQ-1 (SW17 = close 1-2, JP20
= closed, JP15 = closed and JP28 = close 2-4 (VREG = 3.3 V) or JP28 = 1-3
(VREG = 5.0 V)).
Alternatively, VREG can be provided by an external power supply connected to
CN14 (SW17 = close 2-3, JP20 = open, JP15 = open).
For EMC:
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the SMC30J30CA transient voltage suppressor (U2), enabled by closing J9, is placed between VCC and GND tracks to protect the IPS8200HQ-1 against surge discharge on the supply rail path up to ±1 kV/2 Ω coupling;
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in the common mode surge testing, two single-layer capacitors (C11 and C12 – not included) must be soldered at the predisposed locations;
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the IPS8200HQ-1 output stages do not require additional EMC protections with respect to the IEC61000-4-2, IEC61000-4-3, IEC61000-4-4, IEC61000-4-5, IEC61000-4-8 standards.
The EMC performance of the X-NUCLEO-OUT17A1 is detailed below: -
for emission (when the DC input port of the board is powered by an AC-DC, DC-DC or battery with a cable that does not exceed a three-meter length), compliance with standards:
– EN IEC 61000-6-3:2021
– EN 55032:2015 +A1:2020 -
for immunity, compliance with standards:
– EN IEC 61000-6-1:2019
– EN 55035:2017 +A11:2020
1.5 Hardware requirements
The X-NUCLEO-OUT17A1 expansion board is designed to be used with the NUCLEO-
F401RE or NUCLEOG431RBSTM32 Nucleo development boards.
To function correctly, the X-NUCLEO-OUT17A1 must be plugged onto the matching
Arduino® UNO R3 connector pins on the STM32 Nucleo board as shown below.
Figure 4. X-NUCLEO-OUT17A1 and STM32 Nucleo stack
1.6 System requirements
To use the STM32 Nucleo development boards with the X-NUCLEO-OUT17A1 expansion
board, you need:
- a Windows PC/laptop (Windows 7 or above)
- a type A to mini-B USB cable to connect the STM32 Nucleo board to the PC when using a NUCLEOF401RE development board
- a type A to micro-B USB cable to connect the STM32 Nucleo board to the PC when using a NUCLEOG431RB development board
- the X-CUBE-IPS firmware and software package installed on your PC/laptop
1.7 Board setup
Step 1. Connect the mini-USB or micro-USB cable to your PC to use the X
-NUCLEO-OUT17A1 with NUCLEOF401RE or NUCLEO-G431RB development board
Step 2. Download the proper firmware (.bin) onto the STM32 Nucleo development board microcontroller through STM32 ST-LINK utility, STM32CubeProgrammer, and according with the information detailed in the table below. The X-NUCLEO-OUT17A1 can be used to control the IPS8200HQ device in three different operating modes available for the user in three different example projects:
Parallel_8_Channels (one board configured in parallel 8 channels mode, direct pin input interface), SPI_8_Channels (one board configured in SPI 8 channels mode, SPI input interface) and DaisyChain (two stacked boards properly configured in Daisy chain mode, SPI input interface with daisy chaining).
The binary files provided with the X-CUBE-IPS software package enable the user to choose the preferred control mode by selecting the binary file contained in the proper example project Binary folder, as reported in the following table
Table 2. Nucleo development boards binary files
Note: Additional details on each operating mode configuration are available inside the X-CUBE-IPS software package as reported in the below table:
Table 3. Additional information on board configuration
2. Schematic diagrams
Figure 5. X-NUCLEO-OUT17A1 circuit schematic (1 of 3)
Figure 6. X-NUCLEO-OUT17A1 circuit schematic (2 of 3)
Figure 7. X-NUCLEO-OUT17A1 circuit schematic (3 of 3)
3 Bill of materials
Table 4. X-NUCLEO-OUT17A1 bill of materials
4 Board versions
Table 5. X-NUCLEO-OUT17A1 versions
5 Regulatory compliance information
Notice for US Federal Communication Commission (FCC)
For evaluation only; not FCC approved for resale
FCC NOTICE – This kit is designed to allow:
(1) Product developers to evaluate electronic components, circuitry, or
software associated with the kit to determine whether to incorporate such
items in a finished product and
(2) Software developers to write software applications for use with the end
product.
This kit is not a finished product and when assembled may not be resold or otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter 3.1.2.
Notice for Innovation, Science and Economic Development Canada (ISED)
For evaluation purposes only. This kit generates, uses, and can radiate radio
frequency energy and has not been tested for compliance with the limits of
computing devices pursuant to Industry Canada (IC) rules.
Notice for the European Union
This device is in conformity with the essential requirements of the Directive
2014/30/EU (EMC) and of the
Directive 2015/863/EU (RoHS).
Notice for the United Kingdom
This device is in compliance with the UK Electromagnetic Compatibility
Regulations 2016 (UK S.I. 2016 No. 1091) and with the Restriction of the Use
of Certain Hazardous Substances in Electrical and Electronic Equipment
Regulations 2012 (UK S.I. 2012 No. 3032).
6 References
Freely available on www.st.com:
• IPS8200HQ-1 datasheet
• UM3035: “Getting started with X-CUBE-IPS industrial digital output software
for STM32 Nucleo”
• NUCLEO-F401RE documentation
• NUCLEO-G431RB documentation
Revision history
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